Re: [avr-chat] BLDC control with ATmega128?

[Rick Mann]

On Feb 5, 2006, at 5:02 AM, Rolf Magnus wrote:

> It also works with sensorless motors, using back-EMF sensing. An  
> ATmega128 is
> vastly oversized for this task. An ATtiny2313 or an ATmega8 are  
> enough.

We're using the '128 as the controller in our autonomous EM field- 
following robot. It manages the steering control loop. Because of the  
large number of available PWM generators, we decided that not only  
could it also drive our H-bridge, we could challenge ourselves to  
develop a brushless motor controller.

So, our '128 will be doing a lot more than just generating BLDC pwm  
signals. It will read up to 6 analog sensors do determine the car's  
position on the track, it will execute a PD control loop (2, in  
fact), and if we're lucky, it'll spend time memorizing the track so  
that it can run faster over the straight sections.

> See the following links (of which most are in german though):
>
> http://home.versanet.de/~b-konze/blmc_flea/blmc.htm
> http://www.bldc.de/forum/viewforum.php? 
> f=2&sid=9dd24b969162caf15865d948376cc1af
> http://www.speedy-bl.com/electr.htm
> http://www.rcgroups.com/forums/showthread.php?t=140454
>
> They are all about sensorless bldc motor controllers for RC models.

I'm sure those would be helpful, if I could only read them :-)

> There are also some application notes that can help, like Atmels  
> AVR443 and
> 444, where an ATmega48 is used. See:
>
> http://www.atmel.com/dyn/general/advanced_search_results.asp? 
> device=1&tools=1&faqs=1&datasheets=1&appNotes=1&userGuides=1&software= 
> 1&press=1&articles=1&flyers=1&checkAllReference=1&target=brushless

Thanks, I've read all of these already.

> irf.com also has some appnotes.

This I didn't know. I'll check them out.

> > I don't think there is any real advantage in using PWM for both  
> > the top side
> > and bottom side transistors for a BLDC motor
>
> irf's appnote an-1048 talks about this. Doing the PWM on all  
> transistors can
> have the advantage of an even distribution of switching losses (if  
> you use N
> channel fets on both high and low side and do proper gate driving).  
> Another
> alternative that also gives you an even distribution is to do the  
> PWM on the
> high side during half of a commutation cycle and on the low side  
> during the
> other half.

So, I decided that I would only use three of the 16-bit PWM  
generators, and use 3 GPIO lines (*not* on the other three PWM  
outputs; we'll use those for other things) for additional control  
over the half-bridges. One of the requirements in the class is  
external logic to prevent cross-conduction. Since we were already  
using IR MGDs, it made sense to use a chip like the IR2104, which  
imposes locked-antiphase switching. Used like this, each PWM output  
drives the input pin, and each GPIO drives the /shutdown pin.

Is there any problem with using locked-antiphase in a BLDC driver? I  
don't see one, but I'm not sure. In any case, this mode would switch  
all 6 FETs evenly, right? What's the advantage of this even  
distribution?

It occurs to me that we could modify the external logic (and code, of  
course), to provide any kind of switching scheme with this approach.  
Moreover, it seems that really only a single PWM generator is needed  
(plus 6 GPIOs, one for direction and one for /shutdown on each half- 
bridge), unless you want one half-bridge to operate a different PWM  
duty cycle than another, and I don't see what that would get you.

As our setup stands now, I only see setting different PWM waveforms  
to invert one half-bridge WRT another.

Am I correct? Thanks!

--
Rick