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Re: [PATCH V5 3/3] hw/riscv: virt: Enable booting S-mode firmware from p


From: Bernhard Beschow
Subject: Re: [PATCH V5 3/3] hw/riscv: virt: Enable booting S-mode firmware from pflash
Date: Tue, 11 Oct 2022 21:56:15 +0000

Am 4. Oktober 2022 09:23:51 UTC schrieb Sunil V L <sunilvl@ventanamicro.com>:
>To boot S-mode firmware payload like EDK2 from persistent
>flash storage, qemu needs to pass the flash address as the
>next_addr in fw_dynamic_info to the opensbi.
>
>When both -kernel and -pflash options are provided in command line,
>the kernel (and initrd if -initrd) will be copied to fw_cfg table.
>The S-mode FW will load the kernel/initrd from fw_cfg table.
>
>If only pflash is given but not -kernel, then it is the job of
>of the S-mode firmware to locate and load the kernel.
>
>In either case, update the kernel_entry with the flash address
>so that the opensbi can jump to the entry point of the S-mode
>firmware.
>
>Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
>Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
>---
> hw/riscv/boot.c         | 29 +++++++++++++++++++++++++++++
> hw/riscv/virt.c         | 18 +++++++++++++++++-
> include/hw/riscv/boot.h |  1 +
> 3 files changed, 47 insertions(+), 1 deletion(-)
>
>diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
>index 1ae7596873..fa8ad27da2 100644
>--- a/hw/riscv/boot.c
>+++ b/hw/riscv/boot.c
>@@ -338,3 +338,32 @@ void riscv_setup_direct_kernel(hwaddr kernel_addr, hwaddr 
>fdt_addr)
>         riscv_cpu->env.fdt_addr = fdt_addr;
>     }
> }
>+
>+void riscv_setup_firmware_boot(MachineState *machine)
>+{
>+    if (machine->kernel_filename) {
>+        FWCfgState *fw_cfg;
>+        fw_cfg = fw_cfg_find();
>+
>+        assert(fw_cfg);
>+        /*
>+         * Expose the kernel, the command line, and the initrd in fw_cfg.
>+         * We don't process them here at all, it's all left to the
>+         * firmware.
>+         */
>+        load_image_to_fw_cfg(fw_cfg,
>+                             FW_CFG_KERNEL_SIZE, FW_CFG_KERNEL_DATA,
>+                             machine->kernel_filename,
>+                             true);
>+        load_image_to_fw_cfg(fw_cfg,
>+                             FW_CFG_INITRD_SIZE, FW_CFG_INITRD_DATA,
>+                             machine->initrd_filename, false);
>+
>+        if (machine->kernel_cmdline) {
>+            fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
>+                           strlen(machine->kernel_cmdline) + 1);
>+            fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA,
>+                              machine->kernel_cmdline);
>+        }
>+    }
>+}
>diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
>index de2efccebf..a5bc7353b4 100644
>--- a/hw/riscv/virt.c
>+++ b/hw/riscv/virt.c
>@@ -1274,7 +1274,23 @@ static void virt_machine_done(Notifier *notifier, void 
>*data)
>     s->fw_cfg = create_fw_cfg(machine);
>     rom_set_fw(s->fw_cfg);
> 
>-    if (machine->kernel_filename) {
>+    if (drive_get(IF_PFLASH, 0, 1)) {
>+        /*
>+         * S-mode FW like EDK2 will be kept in second plash (unit 1).

Nitpicking: s/plash/pflash/ ?

Best regards,
Bernhard

>+         * When both kernel, initrd and pflash options are provided in the
>+         * command line, the kernel and initrd will be copied to the fw_cfg
>+         * table and opensbi will jump to the flash address which is the
>+         * entry point of S-mode FW. It is the job of the S-mode FW to load
>+         * the kernel and initrd using fw_cfg table.
>+         *
>+         * If only pflash is given but not -kernel, then it is the job of
>+         * of the S-mode firmware to locate and load the kernel.
>+         * In either case, the next_addr for opensbi will be the flash 
>address.
>+         */
>+        riscv_setup_firmware_boot(machine);
>+        kernel_entry = virt_memmap[VIRT_FLASH].base +
>+                       virt_memmap[VIRT_FLASH].size / 2;
>+    } else if (machine->kernel_filename) {
>         kernel_start_addr = riscv_calc_kernel_start_addr(&s->soc[0],
>                                                          firmware_end_addr);
> 
>diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h
>index a36f7618f5..93e5f8760d 100644
>--- a/include/hw/riscv/boot.h
>+++ b/include/hw/riscv/boot.h
>@@ -57,5 +57,6 @@ void riscv_rom_copy_firmware_info(MachineState *machine, 
>hwaddr rom_base,
>                                   uint32_t reset_vec_size,
>                                   uint64_t kernel_entry);
> void riscv_setup_direct_kernel(hwaddr kernel_addr, hwaddr fdt_addr);
>+void riscv_setup_firmware_boot(MachineState *machine);
> 
> #endif /* RISCV_BOOT_H */




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