Re: [PATCH v2 3/6] target/riscv: add support for zfinx

[Richard Henderson]

On 12/30/21 7:23 PM, Weiwei Li wrote:
> From: liweiwei<liweiwei@iscas.ac.cn>
>
>    - update extension check REQUIRE_ZFINX_OR_F
>    - update single float point register read/write
>    - disable nanbox_s check
>
> Co-authored-by: ardxwe<ardxwe@gmail.com>
> Signed-off-by: Weiwei Li<liweiwei@iscas.ac.cn>
> Signed-off-by: Junqiang Wang<wangjunqiang@iscas.ac.cn>
> ---
>   target/riscv/fpu_helper.c               |  89 +++----
>   target/riscv/helper.h                   |   2 +-
>   target/riscv/insn_trans/trans_rvf.c.inc | 314 ++++++++++++++++--------
>   target/riscv/internals.h                |  16 +-
>   target/riscv/translate.c                |  90 +++++++
>   5 files changed, 367 insertions(+), 144 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~