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From: | Richard Henderson |
Subject: | Re: [PATCH v4 10/17] target/riscv: support for 128-bit U-type instructions |
Date: | Sat, 30 Oct 2021 20:49:52 -0700 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 |
On 10/25/21 5:28 AM, Frédéric Pétrot wrote:
+static void gen_set_gpri(DisasContext *ctx, int reg_num, target_long imm) +{ + if (reg_num != 0) { + switch (get_ol(ctx)) { + case MXL_RV32: + tcg_gen_movi_tl(cpu_gpr[reg_num], imm); + tcg_gen_ext32s_tl(cpu_gpr[reg_num], cpu_gpr[reg_num]);
tcg_gen_movi_tl(gpr, (int32_t)imm); No extra ext32s required. Otherwise, Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
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