+static void gen_addv_mask_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b, TCGv_i32 m)
+{
+ TCGv_i32 t1 = tcg_temp_new_i32();
+ TCGv_i32 t2 = tcg_temp_new_i32();
+ TCGv_i32 t3 = tcg_temp_new_i32();
+
+ tcg_gen_andc_i32(t1, a, m);
+ tcg_gen_andc_i32(t2, b, m);
+ tcg_gen_xor_i32(t3, a, b);
+ tcg_gen_add_i32(d, t1, t2);
+ tcg_gen_and_i32(t3, t3, m);
+ tcg_gen_xor_i32(d, d, t3);
+
+ tcg_temp_free_i32(t1);
+ tcg_temp_free_i32(t2);
+ tcg_temp_free_i32(t3);
+}
+
+void tcg_gen_vec_add8_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b)
+{
+ TCGv_i32 m = tcg_constant_i32((int32_t)dup_const(MO_8, 0x80));
+ gen_addv_mask_i32(d, a, b, m);
+}