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From: | Richard Henderson |
Subject: | Re: [PATCH 21/33] target/ppc: moved stxv and lxv from legacy to decodtree |
Date: | Sat, 23 Oct 2021 13:46:13 -0700 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 |
On 10/21/21 12:45 PM, matheus.ferst@eldorado.org.br wrote:
+ if (ctx->le_mode) { + gen_addr_add(ctx, ea, ea, 8); + offset = -8; + } else { + offset = 8; + } + + if (store) { + get_cpu_vsrh(xt, rt); + tcg_gen_qemu_st_i64(xt, ea, ctx->mem_idx, mop); + gen_addr_add(ctx, ea, ea, offset); + get_cpu_vsrl(xt, rt); + tcg_gen_qemu_st_i64(xt, ea, ctx->mem_idx, mop); + } else { + tcg_gen_qemu_ld_i64(xt, ea, ctx->mem_idx, mop); + set_cpu_vsrh(rt, xt); + gen_addr_add(ctx, ea, ea, offset); + tcg_gen_qemu_ld_i64(xt, ea, ctx->mem_idx, mop); + set_cpu_vsrl(rt, xt); + }
Actually, I'm going to reverse myself again.This has a behaviour change: for LE, the first access is to EA+8 instead of EA. Thus the SIGSEGV for a load from NULL will report address 8 not 0, which is probably not the correct result.
r~
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