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[PATCH 00/19] PMU-EBB support for PPC64 TCG


From: Daniel Henrique Barboza
Subject: [PATCH 00/19] PMU-EBB support for PPC64 TCG
Date: Mon, 9 Aug 2021 10:10:38 -0300

Hi,

In this series we introduce Event-Based Branch (EBB) support for PPC64
TCG. EBB consists of a new instruction called 'rfebb' and interrupt/exception
logic that redirects the userspace next intruction pointer to another address,
and the rfebb instruction restores execution back afterwards.

One way to exercise EBB is the Linux kernel selftests, located in the
kernel tree tools/testing/selftests/powerpc/pmu/ebb). These tests uses
the PMU (Performance Monitor Unit). We don't have a PPC64 PMU implementation
available, so to validate the EBB implementation we also introduced a
rudimentary PPC64 PMU for TCG. The PMU will not count anything but instructions
and cycles. There is no support for sampled/random events that are enabled by 
MMCR2.
Not all MMCR0 bits are being used. The limitations and capabilities of
this PMU implementation is described in the docs in the last patch.

This work was started by Gustavo Romero in 2020. You can find Gustavo's
patches in his branch at [1]. Gustavo's current work email is CCed in
the patches so he can follow and participate in the review process if he
wants to.

These patches can be divided in 3 parts: 

- Patches 1 to 8: basic PMU support for instructions/cycles counting
- Patches 9 to 11: EBB implementation
- Patches 12 to 18: implement counter negative PMU alerts to trigger EBB
exceptions

Both the PMU and EBB are based on the PowerISA 3.1 specification. 

One notable limitation of the PMU implementation is the icount
precision. Using the PMU powerpc kernel tests, located in
tools/testing/selftests/powerpc/pmu, we will consistently fall short in
tests where 10M or more instructions are sampled, with an error rate of
around 0,07%.  I am not certain whether this has to do with the logic
implemented here or with an icount precision limit, or both. Since our
objective here is to validate the EBB logic I am overlooking these
errors. All that said, any input/feedback related to how we can improve
the instruction count is welcome.

The benchmark for this implementation is the EBB powerpc kernel tests,
located in the kernel tree in tools/testing/selftests/powerpc/pmu/ebb.
Of the current 22 EBB tests presented in the kernel v5.13 we can pass 20
of those all the time. . 'instructions_count_test' suffers from the same
limitations of the PMU tests mentioned above. 'lost_exception_test' will
pass sometimes, although the most common scenario is a failure. Since
this is a heavy focused PMU test that happens to use EBB I am also
overlooking its failure.

[1] https://github.com/gromero/qemu/commits/ebb


Daniel Henrique Barboza (15):
  target/ppc: add exclusive Book3S PMU reg read/write functions
  target/ppc: PMU Book3s basic insns count for pseries TCG
  target/ppc/pmu_book3s_helper.c: eliminate code repetition
  target/ppc/pmu_book3s_helper: enable PMC1-PMC4 events
  target/ppc/pmu_book3s_helper.c: icount fine tuning
  target/ppc/pmu_book3s_helper.c: do an actual cycles calculation
  target/ppc/excp_helper.c: POWERPC_EXCP_EBB adjustments
  target/ppc/pmu_book3s_helper.c: enable PMC1 counter negative EBB
  target/ppc/translate: PMU: handle setting of PMCs while running
  target/ppc/pmu_book3s_helper.c: add generic timeout helpers
  target/ppc/pmu_book3s_helper: enable counter negative for all PMCs
  target/ppc/pmu_book3s_helper: adding 0xFA event
  target/ppc/pmu_book3s_helper.c: add PMC14/PMC56 counter freeze bits
  target/ppc/pmu_book3s_helper.c: add PM_CMPLU_STALL mock events
  docs/specs: add PPC64 TCG PMU-EBB documentation

Gustavo Romero (4):
  target/ppc: add exclusive user read function for PMU regs
  target/ppc: add exclusive user write function for PMU regs
  PPC64/TCG: Implement 'rfebb' instruction
  target/ppc: PMU Event-Based exception support

 docs/specs/index.rst           |   1 +
 docs/specs/ppc-tcg-pmu-ebb.rst |  71 +++++
 hw/ppc/spapr_cpu_core.c        |   6 +
 target/ppc/cpu.h               |  47 +++-
 target/ppc/cpu_init.c          |  54 ++--
 target/ppc/excp_helper.c       |  61 +++++
 target/ppc/helper.h            |   2 +
 target/ppc/meson.build         |   1 +
 target/ppc/pmu_book3s_helper.c | 466 +++++++++++++++++++++++++++++++++
 target/ppc/spr_tcg.h           |   4 +
 target/ppc/translate.c         | 151 ++++++++++-
 11 files changed, 834 insertions(+), 30 deletions(-)
 create mode 100644 docs/specs/ppc-tcg-pmu-ebb.rst
 create mode 100644 target/ppc/pmu_book3s_helper.c

-- 
2.31.1




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