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Re: [Qemu-ppc] [PATCH 26/34] target/ppc: Pass integer to helper_mtvscr
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCH 26/34] target/ppc: Pass integer to helper_mtvscr |
Date: |
Wed, 19 Dec 2018 17:37:08 +1100 |
User-agent: |
Mutt/1.10.1 (2018-07-13) |
On Mon, Dec 17, 2018 at 10:39:03PM -0800, Richard Henderson wrote:
> We can re-use this helper elsewhere if we're not passing
> in an entire vector register.
>
> Signed-off-by: Richard Henderson <address@hidden>
Acked-by: David Gibson <address@hidden>
> ---
> target/ppc/helper.h | 2 +-
> target/ppc/int_helper.c | 10 +++-------
> target/ppc/translate/vmx-impl.inc.c | 17 +++++++++++++----
> 3 files changed, 17 insertions(+), 12 deletions(-)
>
> diff --git a/target/ppc/helper.h b/target/ppc/helper.h
> index 069daa9883..b3ffe28103 100644
> --- a/target/ppc/helper.h
> +++ b/target/ppc/helper.h
> @@ -294,7 +294,7 @@ DEF_HELPER_5(vmsumuhs, void, env, avr, avr, avr, avr)
> DEF_HELPER_5(vmsumshm, void, env, avr, avr, avr, avr)
> DEF_HELPER_5(vmsumshs, void, env, avr, avr, avr, avr)
> DEF_HELPER_4(vmladduhm, void, avr, avr, avr, avr)
> -DEF_HELPER_2(mtvscr, void, env, avr)
> +DEF_HELPER_FLAGS_2(mtvscr, TCG_CALL_NO_RWG, void, env, i32)
> DEF_HELPER_3(lvebx, void, env, avr, tl)
> DEF_HELPER_3(lvehx, void, env, avr, tl)
> DEF_HELPER_3(lvewx, void, env, avr, tl)
> diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
> index 3bf0fdb6c5..0443f33cd2 100644
> --- a/target/ppc/int_helper.c
> +++ b/target/ppc/int_helper.c
> @@ -469,14 +469,10 @@ void helper_lvsr(ppc_avr_t *r, target_ulong sh)
> }
> }
>
> -void helper_mtvscr(CPUPPCState *env, ppc_avr_t *r)
> +void helper_mtvscr(CPUPPCState *env, uint32_t vscr)
> {
> -#if defined(HOST_WORDS_BIGENDIAN)
> - env->vscr = r->u32[3];
> -#else
> - env->vscr = r->u32[0];
> -#endif
> - set_flush_to_zero(vscr_nj, &env->vec_status);
> + env->vscr = vscr;
> + set_flush_to_zero((vscr >> VSCR_NJ) & 1, &env->vec_status);
> }
>
> void helper_vaddcuw(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
> diff --git a/target/ppc/translate/vmx-impl.inc.c
> b/target/ppc/translate/vmx-impl.inc.c
> index 329131d30b..ab6da3aa55 100644
> --- a/target/ppc/translate/vmx-impl.inc.c
> +++ b/target/ppc/translate/vmx-impl.inc.c
> @@ -196,14 +196,23 @@ static void gen_mfvscr(DisasContext *ctx)
>
> static void gen_mtvscr(DisasContext *ctx)
> {
> - TCGv_ptr p;
> + TCGv_i32 val;
> + int bofs;
> +
> if (unlikely(!ctx->altivec_enabled)) {
> gen_exception(ctx, POWERPC_EXCP_VPU);
> return;
> }
> - p = gen_avr_ptr(rB(ctx->opcode));
> - gen_helper_mtvscr(cpu_env, p);
> - tcg_temp_free_ptr(p);
> +
> + val = tcg_temp_new_i32();
> + bofs = avr64_offset(rB(ctx->opcode), true);
> +#ifdef HOST_WORDS_BIGENDIAN
> + bofs += 3 * 4;
> +#endif
> +
> + tcg_gen_ld_i32(val, cpu_env, bofs);
> + gen_helper_mtvscr(cpu_env, val);
> + tcg_temp_free_i32(val);
> }
>
> #define GEN_VX_VMUL10(name, add_cin, ret_carry) \
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- [Qemu-ppc] [PATCH 02/34] target/arm: Rely on optimization within tcg_gen_gvec_or, (continued)
- [Qemu-ppc] [PATCH 02/34] target/arm: Rely on optimization within tcg_gen_gvec_or, Richard Henderson, 2018/12/18
- [Qemu-ppc] [PATCH 29/34] target/ppc: Add helper_mfvscr, Richard Henderson, 2018/12/18
- [Qemu-ppc] [PATCH 23/34] target/ppc: convert xxspltib to vector operations, Richard Henderson, 2018/12/18
- [Qemu-ppc] [PATCH 10/34] target/arm: Use vector minmax expanders for aarch32, Richard Henderson, 2018/12/18
- [Qemu-ppc] [PATCH 19/34] target/ppc: convert vspltis[bhw] to use vector operations, Richard Henderson, 2018/12/18
- [Qemu-ppc] [PATCH 26/34] target/ppc: Pass integer to helper_mtvscr, Richard Henderson, 2018/12/18
- Re: [Qemu-ppc] [PATCH 26/34] target/ppc: Pass integer to helper_mtvscr,
David Gibson <=
- [Qemu-ppc] [PATCH 07/34] tcg: Add opcodes for vector minmax arithmetic, Richard Henderson, 2018/12/18
- [Qemu-ppc] [PATCH 17/34] target/ppc: convert VMX logical instructions to use vector operations, Richard Henderson, 2018/12/18
- [Qemu-ppc] [PATCH 24/34] target/ppc: convert xxspltw to vector operations, Richard Henderson, 2018/12/18
- [Qemu-ppc] [PATCH 11/34] target/ppc: introduce get_fpr() and set_fpr() helpers for FP register access, Richard Henderson, 2018/12/18
- [Qemu-ppc] [PATCH 09/34] target/arm: Use vector minmax expanders for aarch64, Richard Henderson, 2018/12/18