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Re: [Qemu-ppc] [Qemu-devel] [PATCH v3 0/2] 40p: fix PCI interrupt routin
From: |
Mark Cave-Ayland |
Subject: |
Re: [Qemu-ppc] [Qemu-devel] [PATCH v3 0/2] 40p: fix PCI interrupt routing |
Date: |
Mon, 17 Sep 2018 05:29:43 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 |
On 17/09/18 04:54, David Gibson wrote:
> On Mon, Sep 10, 2018 at 09:46:29PM +0100, Mark Cave-Ayland wrote:
>> According to the PReP specification section 6.1.6 "System Interrupt
>> Assignments", all PCI interrupts are routed via IRQ 15.
>>
>> In the case of the 40p machine this isn't quite true in that it has a routing
>> quirk: the LSI SCSI device is always routed to IRQ 13. At least Linux and
>> NetBSD compare the model name presented by the firmware to "IBM PPS Model
>> 6015", and if it matches will active this quirk.
>>
>> In order for guest OSs to make use of the fixed IRQ routing, the model name
>> in the residual data must be changed in OpenBIOS using the diff below:
>>
>> diff --git a/arch/ppc/qemu/context.c b/arch/ppc/qemu/context.c
>> index 06e0122..5815895 100644
>> --- a/arch/ppc/qemu/context.c
>> +++ b/arch/ppc/qemu/context.c
>> @@ -111,7 +111,7 @@ static void *
>> residual_build(uint32_t memsize, uint32_t load_base, uint32_t load_size)
>> {
>> residual_t *res;
>> - const unsigned char model[] = "Qemu\0PPC\0";
>> + const unsigned char model[] = "IBM PPS Model 6015\0";
>> int i;
>>
>> res = malloc(sizeof(residual_t));
>>
>> With the above OpenBIOS patch applied as well as this patchset, it is now
>> possible to boot the sandalfoot zImage all the way through to a working
>> userspace when using OpenBIOS.
>>
>> (Note: this patchset requires the changes in my previous patchset "scsi:
>> replace lsi53c895a_create() and lsi53c810_create() functions)
>>
>> Signed-off-by: Mark Cave-Ayland <address@hidden>
>> Based-on: <address@hidden>
>
> Mark,
>
> I think we have all the necessary acks to go ahead with this.
> However, I'm afraid I've lost track of the various prereq patches that
> were necessary here. Can you resend with all the necessary pieces
> rebased against ppc-for-3.1 and the appropriate acked-bys included?
Sure, no problem. I'll resend it this evening as a new 40p PCI routing
"roll-up" patchset.
ATB,
Mark.
- Re: [Qemu-ppc] [PATCH v3 1/2] lsi53c895a: add optional external IRQ via qdev, (continued)
[Qemu-ppc] [PATCH v3 2/2] 40p: add fixed IRQ routing for LSI SCSI device, Mark Cave-Ayland, 2018/09/10
Re: [Qemu-ppc] [Qemu-devel] [PATCH v3 2/2] 40p: add fixed IRQ routing for LSI SCSI device, Philippe Mathieu-Daudé, 2018/09/13
Re: [Qemu-ppc] [PATCH v3 0/2] 40p: fix PCI interrupt routing, Hervé Poussineau, 2018/09/12
Re: [Qemu-ppc] [PATCH v3 0/2] 40p: fix PCI interrupt routing, David Gibson, 2018/09/16
- Re: [Qemu-ppc] [Qemu-devel] [PATCH v3 0/2] 40p: fix PCI interrupt routing,
Mark Cave-Ayland <=
- Re: [Qemu-ppc] [Qemu-devel] [PATCH v3 0/2] 40p: fix PCI interrupt routing, Mark Cave-Ayland, 2018/09/18
- Re: [Qemu-ppc] [Qemu-devel] [PATCH v3 0/2] 40p: fix PCI interrupt routing, Mark Cave-Ayland, 2018/09/19
- Re: [Qemu-ppc] [Qemu-devel] [PATCH v3 0/2] 40p: fix PCI interrupt routing, Roman Kapl, 2018/09/19
- Re: [Qemu-ppc] [Qemu-devel] [PATCH v3 0/2] 40p: fix PCI interrupt routing, Roman Kapl, 2018/09/19
- Re: [Qemu-ppc] [Qemu-devel] [PATCH v3 0/2] 40p: fix PCI interrupt routing, Peter Maydell, 2018/09/19
- Re: [Qemu-ppc] [Qemu-devel] [PATCH v3 0/2] 40p: fix PCI interrupt routing, Mark Cave-Ayland, 2018/09/19
- Re: [Qemu-ppc] [Qemu-devel] [PATCH v3 0/2] 40p: fix PCI interrupt routing, Mark Cave-Ayland, 2018/09/19
- Re: [Qemu-ppc] [Qemu-devel] [PATCH v3 0/2] 40p: fix PCI interrupt routing, David Gibson, 2018/09/19