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[Qemu-ppc] [PULL 40/50] ppc/xics: move the cpu_setup() handler under the
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 40/50] ppc/xics: move the cpu_setup() handler under the ICPState class |
Date: |
Wed, 1 Mar 2017 15:43:55 +1100 |
From: Cédric Le Goater <address@hidden>
The cpu_setup() handler is currently under the XICSState class but it
really belongs under ICPState as it is setting up an individual vCPU.
Signed-off-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/intc/xics.c | 8 +++----
hw/intc/xics_kvm.c | 58 +++++++++++++++++++++++++--------------------------
include/hw/ppc/xics.h | 3 +--
3 files changed, 34 insertions(+), 35 deletions(-)
diff --git a/hw/intc/xics.c b/hw/intc/xics.c
index a5be0d8..674ac4c 100644
--- a/hw/intc/xics.c
+++ b/hw/intc/xics.c
@@ -66,15 +66,15 @@ void xics_cpu_setup(XICSState *xics, PowerPCCPU *cpu)
CPUState *cs = CPU(cpu);
CPUPPCState *env = &cpu->env;
ICPState *ss = &xics->ss[cs->cpu_index];
- XICSStateClass *info;
+ ICPStateClass *icpc;
assert(cs->cpu_index < xics->nr_servers);
ss->cs = cs;
- info = XICS_COMMON_GET_CLASS(xics);
- if (info->cpu_setup) {
- info->cpu_setup(ss, cpu);
+ icpc = ICP_GET_CLASS(ss);
+ if (icpc->cpu_setup) {
+ icpc->cpu_setup(ss, cpu);
}
switch (PPC_INPUT(env)) {
diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c
index 7588280..07298b0 100644
--- a/hw/intc/xics_kvm.c
+++ b/hw/intc/xics_kvm.c
@@ -124,6 +124,34 @@ static void icp_kvm_reset(DeviceState *dev)
icp_set_kvm_state(icp, 1);
}
+static void icp_kvm_cpu_setup(ICPState *ss, PowerPCCPU *cpu)
+{
+ CPUState *cs = CPU(cpu);
+ int ret;
+
+ if (kernel_xics_fd == -1) {
+ abort();
+ }
+
+ /*
+ * If we are reusing a parked vCPU fd corresponding to the CPU
+ * which was hot-removed earlier we don't have to renable
+ * KVM_CAP_IRQ_XICS capability again.
+ */
+ if (ss->cap_irq_xics_enabled) {
+ return;
+ }
+
+ ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0, kernel_xics_fd,
+ kvm_arch_vcpu_id(cs));
+ if (ret < 0) {
+ error_report("Unable to connect CPU%ld to kernel XICS: %s",
+ kvm_arch_vcpu_id(cs), strerror(errno));
+ exit(1);
+ }
+ ss->cap_irq_xics_enabled = true;
+}
+
static void icp_kvm_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -132,6 +160,7 @@ static void icp_kvm_class_init(ObjectClass *klass, void
*data)
dc->reset = icp_kvm_reset;
icpc->pre_save = icp_get_kvm_state;
icpc->post_load = icp_set_kvm_state;
+ icpc->cpu_setup = icp_kvm_cpu_setup;
}
static const TypeInfo icp_kvm_info = {
@@ -324,33 +353,6 @@ static const TypeInfo ics_kvm_info = {
/*
* XICS-KVM
*/
-static void xics_kvm_cpu_setup(ICPState *ss, PowerPCCPU *cpu)
-{
- CPUState *cs = CPU(cpu);
- int ret;
-
- if (kernel_xics_fd == -1) {
- abort();
- }
-
- /*
- * If we are reusing a parked vCPU fd corresponding to the CPU
- * which was hot-removed earlier we don't have to renable
- * KVM_CAP_IRQ_XICS capability again.
- */
- if (ss->cap_irq_xics_enabled) {
- return;
- }
-
- ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0, kernel_xics_fd,
- kvm_arch_vcpu_id(cs));
- if (ret < 0) {
- error_report("Unable to connect CPU%ld to kernel XICS: %s",
- kvm_arch_vcpu_id(cs), strerror(errno));
- exit(1);
- }
- ss->cap_irq_xics_enabled = true;
-}
static void rtas_dummy(PowerPCCPU *cpu, sPAPRMachineState *spapr,
uint32_t token,
@@ -429,10 +431,8 @@ fail:
static void xics_kvm_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
- XICSStateClass *xsc = XICS_COMMON_CLASS(oc);
dc->realize = xics_kvm_realize;
- xsc->cpu_setup = xics_kvm_cpu_setup;
}
static const TypeInfo xics_spapr_kvm_info = {
diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h
index 8325dbd..d17f62c 100644
--- a/include/hw/ppc/xics.h
+++ b/include/hw/ppc/xics.h
@@ -73,8 +73,6 @@ typedef struct XICSFabric XICSFabric;
struct XICSStateClass {
DeviceClass parent_class;
-
- void (*cpu_setup)(ICPState *icp, PowerPCCPU *cpu);
};
struct XICSState {
@@ -101,6 +99,7 @@ struct ICPStateClass {
void (*pre_save)(ICPState *s);
int (*post_load)(ICPState *s, int version_id);
+ void (*cpu_setup)(ICPState *icp, PowerPCCPU *cpu);
};
struct ICPState {
--
2.9.3
- [Qemu-ppc] [PULL 23/50] target/ppc: add mcrxrx instruction, (continued)
- [Qemu-ppc] [PULL 23/50] target/ppc: add mcrxrx instruction, David Gibson, 2017/02/28
- [Qemu-ppc] [PULL 11/50] target/ppc: Cleanup HPTE accessors for 64-bit hash MMU, David Gibson, 2017/02/28
- [Qemu-ppc] [PULL 25/50] xics: XICS should not be a SysBusDevice, David Gibson, 2017/02/28
- [Qemu-ppc] [PULL 32/50] ppc/xics: use the QOM interface to get irqs, David Gibson, 2017/02/28
- [Qemu-ppc] [PULL 31/50] ppc/xics: use the QOM interface under the sPAPR machine, David Gibson, 2017/02/28
- [Qemu-ppc] [PULL 29/50] ppc/xics: add an InterruptStatsProvider interface to ICS and ICP objects, David Gibson, 2017/02/28
- [Qemu-ppc] [PULL 28/50] ppc/xics: store the ICS object under the sPAPR machine, David Gibson, 2017/02/28
- [Qemu-ppc] [PULL 44/50] ppc/xics: move the ICP array under the sPAPR machine, David Gibson, 2017/02/28
- [Qemu-ppc] [PULL 38/50] ppc/xics: move kernel_xics_fd out of KVMXICSState, David Gibson, 2017/02/28
- [Qemu-ppc] [PULL 36/50] ppc/xics: remove the XICS list of ICS, David Gibson, 2017/02/28
- [Qemu-ppc] [PULL 40/50] ppc/xics: move the cpu_setup() handler under the ICPState class,
David Gibson <=
- [Qemu-ppc] [PULL 48/50] ppc/xics: move InterruptStatsProvider to the sPAPR machine, David Gibson, 2017/02/28
- [Qemu-ppc] [PULL 13/50] target/ppc: Manage external HPT via virtual hypervisor, David Gibson, 2017/02/28
- [Qemu-ppc] [PULL 45/50] ppc/xics: export the XICS init routines, David Gibson, 2017/02/28
- [Qemu-ppc] [PULL 26/50] ppc/xics: remove set_nr_irqs() handler from XICSStateClass, David Gibson, 2017/02/28
- [Qemu-ppc] [PULL 41/50] ppc/xics: use the QOM interface to grab an ICP, David Gibson, 2017/02/28
- [Qemu-ppc] [PULL 35/50] ppc/xics: register the reset handler of ICS objects, David Gibson, 2017/02/28
- [Qemu-ppc] [PULL 50/50] Add PowerPC 32-bit guest memory dump support, David Gibson, 2017/02/28
- [Qemu-ppc] [PULL 46/50] ppc/xics: remove the XICSState classes, David Gibson, 2017/02/28