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Re: [Qemu-ppc] [PATCH v1 06/10] target/ppc: use tcg ops for neg instruct
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From: |
Nikunj A Dadhania |
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Subject: |
Re: [Qemu-ppc] [PATCH v1 06/10] target/ppc: use tcg ops for neg instruction |
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Date: |
Tue, 21 Feb 2017 14:53:28 +0530 |
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User-agent: |
Notmuch/0.21 (https://notmuchmail.org) Emacs/25.0.94.1 (x86_64-redhat-linux-gnu) |
Richard Henderson <address@hidden> writes:
> On 02/20/2017 09:11 PM, Nikunj A Dadhania wrote:
>> static void gen_neg(DisasContext *ctx)
>> {
>> - gen_op_arith_neg(ctx, 0);
>> + tcg_gen_neg_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
>> }
>>
>
> NACK. You're forgetting "neg.".
Oops, i totally missed that. :(
Regards
Nikunj
- [Qemu-ppc] [PATCH v1 00/10] POWER9 TCG enablements - part15, Nikunj A Dadhania, 2017/02/20
- [Qemu-ppc] [PATCH v1 06/10] target/ppc: use tcg ops for neg instruction, Nikunj A Dadhania, 2017/02/20
- [Qemu-ppc] [PATCH v1 03/10] target/ppc: move subf logic block, Nikunj A Dadhania, 2017/02/20
- [Qemu-ppc] [PATCH v1 08/10] target/ppc: add ov32 flag for multiply low insns, Nikunj A Dadhania, 2017/02/20
- [Qemu-ppc] [PATCH v1 10/10] target/ppc: add mcrxrx instruction, Nikunj A Dadhania, 2017/02/20
- [Qemu-ppc] [PATCH v1 01/10] target/ppc: support for 32-bit carry and overflow, Nikunj A Dadhania, 2017/02/20