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Re: [Qemu-ppc] [PULL 000/107] ppc-for-2.9 queue 20170202
From: |
Peter Maydell |
Subject: |
Re: [Qemu-ppc] [PULL 000/107] ppc-for-2.9 queue 20170202 |
Date: |
Fri, 3 Feb 2017 09:43:08 +0000 |
On 2 February 2017 at 05:12, David Gibson <address@hidden> wrote:
> The following changes since commit a0def594286d9110a6035e02eef558cf3cf5d847:
>
> Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into
> staging (2017-01-30 10:23:20 +0000)
>
> are available in the git repository at:
>
> git://github.com/dgibson/qemu.git tags/ppc-for-2.9-20170202
>
> for you to fetch changes up to 7c6e8797337c24520b48d8b50a900a747e50f974:
>
> hw/ppc/pnv: Use error_report instead of hw_error if a ROM file can't be
> found (2017-02-02 09:30:07 +1100)
>
> ----------------------------------------------------------------
> ppc patch queue 2017-02-02
>
> This obsoletes ppc-for-2.9-20170112, which had a MacOS build bug.
>
> This is a long overdue ppc pull request for qemu-2.9. It's been a
> long time coming due to some holidays and inconveniently timed
> problems with testing. So, there's a lot in here:
>
> * More POWER9 instruction implementations for TCG
> * The simpler parts of my CPU compatibility mode cleanup
> * This changes behaviour to prefer compatibility modes over
> "raW" mode for new machine type versions
> * New "40p" machine type which is essentially a modernized and
> cleaned up "prep". The intention is that it will replace "prep"
> once it has some more testing and polish.
> * Add pseries-2.9 machine type
> * Implement H_SIGNAL_SYS_RESET hypercall
> * Consolidate the two alternate CPU init paths in pseries by
> making it always go through CPU core objects to initialize CPU
> * A number of bugfixes and cleanups
> * Stop the guest timebase when the guest is stopped under KVM.
> This makes the guest system clock also stop when paused, which
> matches the x86 behaviour.
> * Some preliminary cleanups leading towards implementation of the
> POWER9 MMU.
>
> There are also some changes not strictly related to ppc code, but for
> its benefit:
>
> * Limit the pxi-expander-bridge (PXB) device to x86 guests only
> (it's essentially a hack to work around historical x86
> limitations)
> * Some additions to the 128-bit math in host_utils, necessary for
> some of the new instructions.
> * Revise a number of qtests and enable them for ppc
Applied, thanks.
-- PMM
- [Qemu-ppc] [PULL 081/107] target-ppc: Add xvxsigsp instruction, (continued)
- [Qemu-ppc] [PULL 081/107] target-ppc: Add xvxsigsp instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 084/107] ppc/prep: update MAINTAINERS file, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 085/107] ppc: Implement bcdtrunc. instruction, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 101/107] target-ppc: Add xststdc[sp, dp, qp] instructions, David Gibson, 2017/02/02
- [Qemu-ppc] [PULL 106/107] ppc/kvm: Handle the "family" CPU via alias instead of registering new types, David Gibson, 2017/02/02
- Re: [Qemu-ppc] [Qemu-devel] [PULL 000/107] ppc-for-2.9 queue 20170202, no-reply, 2017/02/02
Re: [Qemu-ppc] [PULL 000/107] ppc-for-2.9 queue 20170202,
Peter Maydell <=