Re: [Qemu-ppc] [Qemu-devel] [PATCH 03/13] target-ppc: implement lxvl instruction

[Nikunj A Dadhania]

Richard Henderson <address@hidden> writes:
>> +void helper_lxvl(CPUPPCState *env, target_ulong addr,
>> +                 target_ulong xt_num, target_ulong rb)
>> +{
>> +    ppc_vsr_t xt;
>> +
>> +    getVSR(xt_num, &xt, env);
>> +    if (unlikely((rb & 0xFF) == 0)) {
>> +        xt.s128 = int128_make128(0, 0);
>> +    } else {
>> +        target_ulong end = ((rb & 0xFF) * 8) - 1;

Found the above wrong it the code, ISA is extracting bit 0:7
from GPR[RB]

Regards
Nikunj