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[Qemu-ppc] [PULL 31/66] ppc: Fix source NIP on SLB related interrupts
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 31/66] ppc: Fix source NIP on SLB related interrupts |
Date: |
Tue, 6 Sep 2016 13:40:18 +1000 |
From: Benjamin Herrenschmidt <address@hidden>
We need to pass it to the raise helper since we don't update it
before the calls.
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/mmu-hash64.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index 5de1358..8118143 100644
--- a/target-ppc/mmu-hash64.c
+++ b/target-ppc/mmu-hash64.c
@@ -241,8 +241,8 @@ void helper_store_slb(CPUPPCState *env, target_ulong rb,
target_ulong rs)
PowerPCCPU *cpu = ppc_env_get_cpu(env);
if (ppc_store_slb(cpu, rb & 0xfff, rb & ~0xfffULL, rs) < 0) {
- helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
- POWERPC_EXCP_INVAL);
+ raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
+ POWERPC_EXCP_INVAL, GETPC());
}
}
@@ -252,8 +252,8 @@ target_ulong helper_load_slb_esid(CPUPPCState *env,
target_ulong rb)
target_ulong rt = 0;
if (ppc_load_slb_esid(cpu, rb, &rt) < 0) {
- helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
- POWERPC_EXCP_INVAL);
+ raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
+ POWERPC_EXCP_INVAL, GETPC());
}
return rt;
}
@@ -264,8 +264,8 @@ target_ulong helper_find_slb_vsid(CPUPPCState *env,
target_ulong rb)
target_ulong rt = 0;
if (ppc_find_slb_vsid(cpu, rb, &rt) < 0) {
- helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
- POWERPC_EXCP_INVAL);
+ raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
+ POWERPC_EXCP_INVAL, GETPC());
}
return rt;
}
@@ -276,8 +276,8 @@ target_ulong helper_load_slb_vsid(CPUPPCState *env,
target_ulong rb)
target_ulong rt = 0;
if (ppc_load_slb_vsid(cpu, rb, &rt) < 0) {
- helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
- POWERPC_EXCP_INVAL);
+ raise_exception_err_ra(env, POWERPC_EXCP_PROGRAM,
+ POWERPC_EXCP_INVAL, GETPC());
}
return rt;
}
--
2.7.4
- [Qemu-ppc] [PULL 13/66] target-ppc: add maddld instruction, (continued)
- [Qemu-ppc] [PULL 13/66] target-ppc: add maddld instruction, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 16/66] ppc: Provide basic raise_exception_* functions, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 26/66] ppc: FP exceptions are always precise, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 03/66] target-ppc: Introduce Power9 family, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 25/66] ppc: Don't update the NIP in floating point generated code, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 15/66] target-ppc: introduce opc4 for Expanded Opcode, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 34/66] ppc: Don't update NIP BookE 2.06 tlbwe, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 38/66] ppc: Make alignment exceptions suck less, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 45/66] ppc: Speed up load/store multiple, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 23/66] ppc: Make float_invalid_op_excp() pass the return address, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 31/66] ppc: Fix source NIP on SLB related interrupts,
David Gibson <=
- [Qemu-ppc] [PULL 29/66] ppc: Make tlb_fill() use new exception helper, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 42/66] ppc: Don't set access_type on all load/stores on hash64, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 41/66] ppc: Fix CFAR updates, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 49/66] target-ppc: add vabsdu[b, h, w] instructions, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 51/66] target-ppc: add vslv instruction, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 53/66] target-ppc: add extswsli[.] instruction, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 48/66] target-ppc: add dtstsfi[q] instructions, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 40/66] ppc: Speed up dcbz, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 27/66] ppc: Don't update NIP in lswi/lswx/stswi/stswx, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 64/66] spapr: implement H_CHANGE_LOGICAL_LAN_MAC h_call, David Gibson, 2016/09/05