Hi everyone
I am trying to emulate SMP support for mips in qemu. But i am unable to handle inter core communication. I want to access general purpose registers of CPU 1 when currently running CPU is 0. Can anyone suggest me how QEMU handle it? and how can i access register set of all CPU's on one CPU?
QEMU Version: 1.0.1
Guest: Cavium Octeon Linux
Guest Arch: MIPS64
Thank You
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Maryyam Muhammad Din
Al-Khawarizmi Institute of Computer Science
UET Lahore