if(intno == UINTR_UINV ){
if(env->uintr_uif == 0){
return;
}
int prot;
CPUState *cs = env_cpu(env);
uint64_t upid_phyaddress = get_hphys2(cs, env->uintr_pd, MMU_DATA_LOAD, &prot);
uintr_upid upid;
cpu_physical_memory_rw(upid_phyaddress, &upid, 16, false);
upid.nc.status &= (~1); // clear on
if(upid.puir != 0){
env->uintr_rr = upid.puir;
upid.puir = 0; // clear puir
cpu_physical_memory_rw(upid_phyaddress, &upid, 16, true); // write back
send = true;
}
cpu_physical_memory_rw(upid_phyaddress, &upid, 16, true);
uint64_t APICaddress = get_hphys2(cs, APIC_DEFAULT_ADDRESS, MMU_DATA_LOAD, &prot);
uint64_t EOI;
uint64_t zero = 0;
cpu_physical_memory_rw(APICaddress + 0xb0, &EOI, 8, false);
qemu_log("the physical address of APIC 0x%lx the EOI content: 0x%lx\n", APICaddress,EOI);
cpu_physical_memory_rw(APICaddress + 0xb0, &zero, 4, true);
if(send)helper_rrnzero(env);
return;
}