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[PATCH v5 18/24] target/arm: Enable FEAT_IESB for -cpu max
From: |
Richard Henderson |
Subject: |
[PATCH v5 18/24] target/arm: Enable FEAT_IESB for -cpu max |
Date: |
Thu, 5 May 2022 13:50:00 -0500 |
This feature is AArch64 only, and applies to physical SErrors,
which QEMU does not implement, thus the feature is a nop.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
v2: Update emulation.rst
---
docs/system/arm/emulation.rst | 1 +
target/arm/cpu64.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst
index 8110408000..b200012d89 100644
--- a/docs/system/arm/emulation.rst
+++ b/docs/system/arm/emulation.rst
@@ -25,6 +25,7 @@ the following architecture extensions:
- FEAT_FlagM2 (Enhancements to flag manipulation instructions)
- FEAT_HPDS (Hierarchical permission disables)
- FEAT_I8MM (AArch64 Int8 matrix multiplication instructions)
+- FEAT_IESB (Implicit error synchronization event)
- FEAT_JSCVT (JavaScript conversion instructions)
- FEAT_LOR (Limited ordering regions)
- FEAT_LPA (Large Physical Address space)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 35881c74b2..10410619f9 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -781,6 +781,7 @@ static void aarch64_max_initfn(Object *obj)
t = cpu->isar.id_aa64mmfr2;
t = FIELD_DP64(t, ID_AA64MMFR2, CNP, 1); /* FEAT_TTCNP */
t = FIELD_DP64(t, ID_AA64MMFR2, UAO, 1); /* FEAT_UAO */
+ t = FIELD_DP64(t, ID_AA64MMFR2, IESB, 1); /* FEAT_IESB */
t = FIELD_DP64(t, ID_AA64MMFR2, VARANGE, 1); /* FEAT_LVA */
t = FIELD_DP64(t, ID_AA64MMFR2, ST, 1); /* FEAT_TTST */
t = FIELD_DP64(t, ID_AA64MMFR2, TTL, 1); /* FEAT_TTL */
--
2.34.1
- [PATCH v5 03/24] target/arm: Merge zcr reginfo, (continued)
- [PATCH v5 03/24] target/arm: Merge zcr reginfo, Richard Henderson, 2022/05/05
- [PATCH v5 06/24] target/arm: Update qemu-system-arm -cpu max to cortex-a57, Richard Henderson, 2022/05/05
- [PATCH v5 08/24] target/arm: Split out aa32_max_features, Richard Henderson, 2022/05/05
- [PATCH v5 07/24] target/arm: Set ID_DFR0.PerfMon for qemu-system-arm -cpu max, Richard Henderson, 2022/05/05
- [PATCH v5 09/24] target/arm: Annotate arm_max_initfn with FEAT identifiers, Richard Henderson, 2022/05/05
- [PATCH v5 10/24] target/arm: Use field names for manipulating EL2 and EL3 modes, Richard Henderson, 2022/05/05
- [PATCH v5 15/24] target/arm: Implement virtual SError exceptions, Richard Henderson, 2022/05/05
- [PATCH v5 12/24] target/arm: Enable FEAT_Debugv8p4 for -cpu max, Richard Henderson, 2022/05/05
- [PATCH v5 13/24] target/arm: Add minimal RAS registers, Richard Henderson, 2022/05/05
- [PATCH v5 11/24] target/arm: Enable FEAT_Debugv8p2 for -cpu max, Richard Henderson, 2022/05/05
- [PATCH v5 18/24] target/arm: Enable FEAT_IESB for -cpu max,
Richard Henderson <=
- [PATCH v5 16/24] target/arm: Implement ESB instruction, Richard Henderson, 2022/05/05
- [PATCH v5 20/24] target/arm: Enable FEAT_CSV2_2 for -cpu max, Richard Henderson, 2022/05/05
- [PATCH v5 19/24] target/arm: Enable FEAT_CSV2 for -cpu max, Richard Henderson, 2022/05/05
- [PATCH v5 17/24] target/arm: Enable FEAT_RAS for -cpu max, Richard Henderson, 2022/05/05
- [PATCH v5 14/24] target/arm: Enable SCR and HCR bits for RAS, Richard Henderson, 2022/05/05
- [PATCH v5 22/24] target/arm: Enable FEAT_DGH for -cpu max, Richard Henderson, 2022/05/05
- [PATCH v5 23/24] target/arm: Define cortex-a76, Richard Henderson, 2022/05/05
- [PATCH v5 24/24] target/arm: Define neoverse-n1, Richard Henderson, 2022/05/05
- [PATCH v5 21/24] target/arm: Enable FEAT_CSV3 for -cpu max, Richard Henderson, 2022/05/05