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Re: [PATCH RFC 04/10] intel_iommu: Second Stage Access Dirty bit support
From: |
Peter Xu |
Subject: |
Re: [PATCH RFC 04/10] intel_iommu: Second Stage Access Dirty bit support |
Date: |
Wed, 4 May 2022 16:11:17 -0400 |
Hi, Joao,
On Thu, Apr 28, 2022 at 10:13:45PM +0100, Joao Martins wrote:
> +/* Get the content of a spte located in @base_addr[@index] */
> +static uint64_t vtd_set_slpte(dma_addr_t base_addr, uint32_t index,
> + uint64_t slpte)
> +{
> +
> + if (dma_memory_write(&address_space_memory,
> + base_addr + index * sizeof(slpte), &slpte,
> + sizeof(slpte), MEMTXATTRS_UNSPECIFIED)) {
> + slpte = (uint64_t)-1;
> + return slpte;
> + }
> +
> + return vtd_get_slpte(base_addr, index);
> +}
Could I ask when the write succeeded, why need to read slpte again?
Thanks,
--
Peter Xu