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[PULL 68/87] bitops.h: Silence kernel-doc complaints
From: |
Paolo Bonzini |
Subject: |
[PULL 68/87] bitops.h: Silence kernel-doc complaints |
Date: |
Wed, 18 Dec 2019 13:02:34 +0100 |
From: Peter Maydell <address@hidden>
Fix the problems with kernel-doc/sphinx syntax in the
doc comments for the shuffle and unshuffle functions:
* mismatch between comment and prototype for argument name
* the inline bit patterns need to be marked up so they
are processed properly and rendered as monospace
Signed-off-by: Peter Maydell <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
include/qemu/bitops.h | 52 +++++++++++++++++++++++++++++++--------------------
1 file changed, 32 insertions(+), 20 deletions(-)
diff --git a/include/qemu/bitops.h b/include/qemu/bitops.h
index ee76552..02c1ce6 100644
--- a/include/qemu/bitops.h
+++ b/include/qemu/bitops.h
@@ -424,13 +424,16 @@ static inline uint64_t deposit64(uint64_t value, int
start, int length,
/**
* half_shuffle32:
- * @value: 32-bit value (of which only the bottom 16 bits are of interest)
+ * @x: 32-bit value (of which only the bottom 16 bits are of interest)
+ *
+ * Given an input value::
+ *
+ * xxxx xxxx xxxx xxxx ABCD EFGH IJKL MNOP
*
- * Given an input value:
- * xxxx xxxx xxxx xxxx ABCD EFGH IJKL MNOP
* return the value where the bottom 16 bits are spread out into
- * the odd bits in the word, and the even bits are zeroed:
- * 0A0B 0C0D 0E0F 0G0H 0I0J 0K0L 0M0N 0O0P
+ * the odd bits in the word, and the even bits are zeroed::
+ *
+ * 0A0B 0C0D 0E0F 0G0H 0I0J 0K0L 0M0N 0O0P
*
* Any bits set in the top half of the input are ignored.
*
@@ -450,13 +453,16 @@ static inline uint32_t half_shuffle32(uint32_t x)
/**
* half_shuffle64:
- * @value: 64-bit value (of which only the bottom 32 bits are of interest)
+ * @x: 64-bit value (of which only the bottom 32 bits are of interest)
+ *
+ * Given an input value::
+ *
+ * xxxx xxxx xxxx .... xxxx xxxx ABCD EFGH IJKL MNOP QRST UVWX YZab cdef
*
- * Given an input value:
- * xxxx xxxx xxxx .... xxxx xxxx ABCD EFGH IJKL MNOP QRST UVWX YZab cdef
* return the value where the bottom 32 bits are spread out into
- * the odd bits in the word, and the even bits are zeroed:
- * 0A0B 0C0D 0E0F 0G0H 0I0J 0K0L 0M0N .... 0U0V 0W0X 0Y0Z 0a0b 0c0d 0e0f
+ * the odd bits in the word, and the even bits are zeroed::
+ *
+ * 0A0B 0C0D 0E0F 0G0H 0I0J 0K0L 0M0N .... 0U0V 0W0X 0Y0Z 0a0b 0c0d 0e0f
*
* Any bits set in the top half of the input are ignored.
*
@@ -477,13 +483,16 @@ static inline uint64_t half_shuffle64(uint64_t x)
/**
* half_unshuffle32:
- * @value: 32-bit value (of which only the odd bits are of interest)
+ * @x: 32-bit value (of which only the odd bits are of interest)
+ *
+ * Given an input value::
+ *
+ * xAxB xCxD xExF xGxH xIxJ xKxL xMxN xOxP
*
- * Given an input value:
- * xAxB xCxD xExF xGxH xIxJ xKxL xMxN xOxP
* return the value where all the odd bits are compressed down
- * into the low half of the word, and the high half is zeroed:
- * 0000 0000 0000 0000 ABCD EFGH IJKL MNOP
+ * into the low half of the word, and the high half is zeroed::
+ *
+ * 0000 0000 0000 0000 ABCD EFGH IJKL MNOP
*
* Any even bits set in the input are ignored.
*
@@ -504,13 +513,16 @@ static inline uint32_t half_unshuffle32(uint32_t x)
/**
* half_unshuffle64:
- * @value: 64-bit value (of which only the odd bits are of interest)
+ * @x: 64-bit value (of which only the odd bits are of interest)
+ *
+ * Given an input value::
+ *
+ * xAxB xCxD xExF xGxH xIxJ xKxL xMxN .... xUxV xWxX xYxZ xaxb xcxd xexf
*
- * Given an input value:
- * xAxB xCxD xExF xGxH xIxJ xKxL xMxN .... xUxV xWxX xYxZ xaxb xcxd xexf
* return the value where all the odd bits are compressed down
- * into the low half of the word, and the high half is zeroed:
- * 0000 0000 0000 .... 0000 0000 ABCD EFGH IJKL MNOP QRST UVWX YZab cdef
+ * into the low half of the word, and the high half is zeroed::
+ *
+ * 0000 0000 0000 .... 0000 0000 ABCD EFGH IJKL MNOP QRST UVWX YZab cdef
*
* Any even bits set in the input are ignored.
*
--
1.8.3.1
- [PULL 59/87] hyperv: Use auto rcu_read macros, (continued)
- [PULL 59/87] hyperv: Use auto rcu_read macros, Paolo Bonzini, 2019/12/18
- [PULL 60/87] qsp: Use WITH_RCU_READ_LOCK_GUARD, Paolo Bonzini, 2019/12/18
- [PULL 61/87] memory: use RCU_READ_LOCK_GUARD, Paolo Bonzini, 2019/12/18
- [PULL 62/87] colo: fix return without releasing RCU, Paolo Bonzini, 2019/12/18
- [PULL 63/87] build: rename CONFIG_LIBCAP to CONFIG_LIBCAP_NG, Paolo Bonzini, 2019/12/18
- [PULL 65/87] docs: tweak kernel-doc for QEMU coding standards, Paolo Bonzini, 2019/12/18
- [PULL 66/87] docs/conf.py: Enable use of kerneldoc sphinx extension, Paolo Bonzini, 2019/12/18
- [PULL 67/87] Makefile: disable Sphinx nitpicking, Paolo Bonzini, 2019/12/18
- [PULL 71/87] docs: add memory API reference, Paolo Bonzini, 2019/12/18
- [PULL 69/87] docs: Create bitops.rst as example of kernel-docs, Paolo Bonzini, 2019/12/18
- [PULL 68/87] bitops.h: Silence kernel-doc complaints,
Paolo Bonzini <=
- [PULL 70/87] memory.h: Silence kernel-doc complaints, Paolo Bonzini, 2019/12/18
- [PULL 73/87] migration: check length directly to make sure the range is aligned, Paolo Bonzini, 2019/12/18
- [PULL 72/87] memory: include MemoryListener documentation and some missing function parameters, Paolo Bonzini, 2019/12/18
- [PULL 74/87] WHPX: refactor load library, Paolo Bonzini, 2019/12/18
- [PULL 75/87] target/i386: remove unused pci-assign codes, Paolo Bonzini, 2019/12/18
- [PULL 76/87] Fix some comment spelling errors., Paolo Bonzini, 2019/12/18
- [PULL 77/87] hw/pci-host/i440fx: Correct the header description, Paolo Bonzini, 2019/12/18
- [PULL 78/87] hw/pci-host/i440fx: Extract PCII440FXState to "hw/pci-host/i440fx.h", Paolo Bonzini, 2019/12/18
- [PULL 79/87] hw/pci-host/i440fx: Use size_t to iterate over ARRAY_SIZE(), Paolo Bonzini, 2019/12/18
- [PULL 64/87] docs: import Linux kernel-doc script and extension, Paolo Bonzini, 2019/12/18