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[PULL 59/88] ppc: Ignore the CPU_INTERRUPT_EXITTB interrupt with KVM
From: |
David Gibson |
Subject: |
[PULL 59/88] ppc: Ignore the CPU_INTERRUPT_EXITTB interrupt with KVM |
Date: |
Tue, 17 Dec 2019 15:42:53 +1100 |
From: Greg Kurz <address@hidden>
This only makes sense with an emulated CPU. Don't set the bit in
CPUState::interrupt_request when using KVM to avoid confusions.
Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/helper_regs.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target/ppc/helper_regs.h b/target/ppc/helper_regs.h
index 85dfe7687f..d78c2af63e 100644
--- a/target/ppc/helper_regs.h
+++ b/target/ppc/helper_regs.h
@@ -22,6 +22,7 @@
#include "qemu/main-loop.h"
#include "exec/exec-all.h"
+#include "sysemu/kvm.h"
/* Swap temporary saved registers with GPRs */
static inline void hreg_swap_gpr_tgpr(CPUPPCState *env)
@@ -102,6 +103,10 @@ static inline void hreg_compute_hflags(CPUPPCState *env)
static inline void cpu_interrupt_exittb(CPUState *cs)
{
+ if (!kvm_enabled()) {
+ return;
+ }
+
if (!qemu_mutex_iothread_locked()) {
qemu_mutex_lock_iothread();
cpu_interrupt(cs, CPU_INTERRUPT_EXITTB);
--
2.23.0
- [PULL 53/88] spapr: Improve handling of fdt buffer size, (continued)
- [PULL 53/88] spapr: Improve handling of fdt buffer size, David Gibson, 2019/12/16
- [PULL 64/88] ppc/pnv: add a PSI bridge model for POWER10, David Gibson, 2019/12/16
- [PULL 50/88] ppc/pnv: Dump the XIVE NVT table, David Gibson, 2019/12/16
- [PULL 65/88] ppc/pnv: add a LPC Controller model for POWER10, David Gibson, 2019/12/16
- [PULL 61/88] target/ppc: Add POWER10 DD1.0 model information, David Gibson, 2019/12/16
- [PULL 60/88] ppc: Make PPCVirtualHypervisor an incomplete type, David Gibson, 2019/12/16
- [PULL 63/88] ppc/psi: cleanup definitions, David Gibson, 2019/12/16
- [PULL 70/88] ppc/pnv: Loop on the whole hierarchy to populate the DT with the XSCOM nodes, David Gibson, 2019/12/16
- [PULL 68/88] target/ppc: Add SPR ASDR, David Gibson, 2019/12/16
- [PULL 62/88] ppc/pnv: Introduce a POWER10 PnvChip and a powernv10 machine, David Gibson, 2019/12/16
- [PULL 59/88] ppc: Ignore the CPU_INTERRUPT_EXITTB interrupt with KVM,
David Gibson <=
- [PULL 75/88] ppc: Drop useless extern annotation for functions, David Gibson, 2019/12/16
- [PULL 66/88] target/ppc: Implement the VTB for HV access, David Gibson, 2019/12/16
- [PULL 71/88] ppc/pnv: populate the DT with realized XSCOM devices, David Gibson, 2019/12/16
- [PULL 67/88] target/ppc: Work [S]PURR implementation and add HV support, David Gibson, 2019/12/16
- [PULL 83/88] ppc/pnv: Pass XSCOM base address and address size to pnv_dt_xscom(), David Gibson, 2019/12/16
- [PULL 74/88] ppc/pnv: Fix OCC common area region mapping, David Gibson, 2019/12/16
- [PULL 81/88] ppc/pnv: Introduce PnvChipClass::intc_print_info() method, David Gibson, 2019/12/16
- [PULL 72/88] ppc/pnv: Make PnvXScomInterface an incomplete type, David Gibson, 2019/12/16
- [PULL 80/88] ppc/pnv: Drop pnv_is_power9() and pnv_is_power10() helpers, David Gibson, 2019/12/16
- [PULL 76/88] ppc/pnv: Introduce PnvPsiClass::compat, David Gibson, 2019/12/16