[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 52/88] spapr: Don't trigger a CAS reboot for XICS/XIVE mode change
From: |
David Gibson |
Subject: |
[PULL 52/88] spapr: Don't trigger a CAS reboot for XICS/XIVE mode changeover |
Date: |
Tue, 17 Dec 2019 15:42:46 +1100 |
PAPR allows the interrupt controller used on a POWER9 machine (XICS or
XIVE) to be selected by the guest operating system, by using the
ibm,client-architecture-support (CAS) feature negotiation call.
Currently, if the guest selects an interrupt controller different from the
one selected at initial boot, this causes the system to be reset with the
new model and the boot starts again. This means we run through the SLOF
boot process twice, as well as any other bootloader (e.g. grub) in use
before the OS calls CAS. This can be confusing and/or inconvenient for
users.
Thanks to two fairly recent changes, we no longer need this reboot. 1) we
now completely regenerate the device tree when CAS is called (meaning we
don't need special case updates for all the device tree changes caused by
the interrupt controller mode change), 2) we now have explicit code paths
to activate and deactivate the different interrupt controllers, rather than
just implicitly calling those at machine reset time.
We can therefore eliminate the reboot for changing irq mode, simply by
putting a call to spapr_irq_update_active_intc() before we call
spapr_h_cas_compose_response() (which gives the updated device tree to
the guest firmware and OS).
Signed-off-by: David Gibson <address@hidden>
Reviewed-by: Cedric Le Goater <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
---
hw/ppc/spapr_hcall.c | 33 +++++++++++++--------------------
1 file changed, 13 insertions(+), 20 deletions(-)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 140f05c1c6..05a7ca275b 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -1767,21 +1767,10 @@ static target_ulong
h_client_architecture_support(PowerPCCPU *cpu,
}
spapr->cas_pre_isa3_guest = !spapr_ovec_test(ov1_guest, OV1_PPC_3_00);
spapr_ovec_cleanup(ov1_guest);
- if (!spapr->cas_reboot) {
- /* If spapr_machine_reset() did not set up a HPT but one is necessary
- * (because the guest isn't going to use radix) then set it up here. */
- if ((spapr->patb_entry & PATE1_GR) && !guest_radix) {
- /* legacy hash or new hash: */
- spapr_setup_hpt_and_vrma(spapr);
- }
- spapr->cas_reboot =
- (spapr_h_cas_compose_response(spapr, args[1], args[2],
- ov5_updates) != 0);
- }
/*
- * Ensure the guest asks for an interrupt mode we support; otherwise
- * terminate the boot.
+ * Ensure the guest asks for an interrupt mode we support;
+ * otherwise terminate the boot.
*/
if (guest_xive) {
if (!spapr->irq->xive) {
@@ -1797,14 +1786,18 @@ static target_ulong
h_client_architecture_support(PowerPCCPU *cpu,
}
}
- /*
- * Generate a machine reset when we have an update of the
- * interrupt mode. Only required when the machine supports both
- * modes.
- */
+ spapr_irq_update_active_intc(spapr);
+
if (!spapr->cas_reboot) {
- spapr->cas_reboot = spapr_ovec_test(ov5_updates, OV5_XIVE_EXPLOIT)
- && spapr->irq->xics && spapr->irq->xive;
+ /* If spapr_machine_reset() did not set up a HPT but one is necessary
+ * (because the guest isn't going to use radix) then set it up here. */
+ if ((spapr->patb_entry & PATE1_GR) && !guest_radix) {
+ /* legacy hash or new hash: */
+ spapr_setup_hpt_and_vrma(spapr);
+ }
+ spapr->cas_reboot =
+ (spapr_h_cas_compose_response(spapr, args[1], args[2],
+ ov5_updates) != 0);
}
spapr_ovec_cleanup(ov5_updates);
--
2.23.0
- [PULL 37/88] ppc/xive: Use the XiveFabric and XivePresenter interfaces, (continued)
- [PULL 37/88] ppc/xive: Use the XiveFabric and XivePresenter interfaces, David Gibson, 2019/12/16
- [PULL 44/88] ppc/xive: Move the TIMA operations to the controller model, David Gibson, 2019/12/16
- [PULL 38/88] ppc/xive: Extend the TIMA operation with a XivePresenter parameter, David Gibson, 2019/12/16
- [PULL 40/88] spapr: Pass the maximum number of vCPUs to the KVM interrupt controller, David Gibson, 2019/12/16
- [PULL 47/88] ppc/xive: Synthesize interrupt from the saved IPB in the NVT, David Gibson, 2019/12/16
- [PULL 39/88] linux-headers: Update, David Gibson, 2019/12/16
- [PULL 42/88] spapr/xive: Configure number of servers in KVM, David Gibson, 2019/12/16
- [PULL 45/88] ppc/xive: Remove the get_tctx() XiveRouter handler, David Gibson, 2019/12/16
- [PULL 48/88] ppc/pnv: Introduce a pnv_xive_block_id() helper, David Gibson, 2019/12/16
- [PULL 46/88] ppc/xive: Introduce a xive_tctx_ipb_update() helper, David Gibson, 2019/12/16
- [PULL 52/88] spapr: Don't trigger a CAS reboot for XICS/XIVE mode changeover,
David Gibson <=
- [PULL 58/88] ppc: Don't use CPUPPCState::irq_input_state with modern Book3s CPU models, David Gibson, 2019/12/16
- [PULL 57/88] xics: Don't deassert outputs, David Gibson, 2019/12/16
- [PULL 43/88] ppc/pnv: Clarify how the TIMA is accessed on a multichip system, David Gibson, 2019/12/16
- [PULL 51/88] ppc: well form kvmppc_hint_smt_possible error hint helper, David Gibson, 2019/12/16
- [PULL 54/88] spapr: Fold h_cas_compose_response() into h_client_architecture_support(), David Gibson, 2019/12/16
- [PULL 49/88] ppc/pnv: Extend XiveRouter with a get_block_id() handler, David Gibson, 2019/12/16
- [PULL 55/88] spapr: Simplify ovec diff, David Gibson, 2019/12/16
- [PULL 56/88] ppc: Deassert the external interrupt pin in KVM on reset, David Gibson, 2019/12/16