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[PULL 21/88] ppc/pnv: Quiesce some XIVE errors
From: |
David Gibson |
Subject: |
[PULL 21/88] ppc/pnv: Quiesce some XIVE errors |
Date: |
Tue, 17 Dec 2019 15:42:15 +1100 |
From: Cédric Le Goater <address@hidden>
When dumping the END and NVT tables, the error logging is too noisy.
Signed-off-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/intc/pnv_xive.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c
index a4d80fd5e7..9a771f6407 100644
--- a/hw/intc/pnv_xive.c
+++ b/hw/intc/pnv_xive.c
@@ -29,7 +29,7 @@
#include "pnv_xive_regs.h"
-#define XIVE_DEBUG
+#undef XIVE_DEBUG
/*
* Virtual structures table (VST)
@@ -157,7 +157,9 @@ static uint64_t pnv_xive_vst_addr_indirect(PnvXive *xive,
uint32_t type,
vsd = ldq_be_dma(&address_space_memory, vsd_addr);
if (!(vsd & VSD_ADDRESS_MASK)) {
+#ifdef XIVE_DEBUG
xive_error(xive, "VST: invalid %s entry %x !?", info->name, idx);
+#endif
return 0;
}
@@ -178,7 +180,9 @@ static uint64_t pnv_xive_vst_addr_indirect(PnvXive *xive,
uint32_t type,
vsd = ldq_be_dma(&address_space_memory, vsd_addr);
if (!(vsd & VSD_ADDRESS_MASK)) {
+#ifdef XIVE_DEBUG
xive_error(xive, "VST: invalid %s entry %x !?", info->name, idx);
+#endif
return 0;
}
--
2.23.0
- [PULL 13/88] xics: Link ICP_PROP_XICS property to ICPState::xics pointer, (continued)
- [PULL 13/88] xics: Link ICP_PROP_XICS property to ICPState::xics pointer, David Gibson, 2019/12/16
- [PULL 27/88] ppc/xive: Introduce a XivePresenter interface, David Gibson, 2019/12/16
- [PULL 26/88] ppc/pnv: Create BMC devices at machine init, David Gibson, 2019/12/16
- [PULL 28/88] ppc/xive: Implement the XivePresenter interface, David Gibson, 2019/12/16
- [PULL 16/88] ppc/pnv: Add a LPC "ranges" property, David Gibson, 2019/12/16
- [PULL 18/88] ppc/xive: Introduce helpers for the NVT id, David Gibson, 2019/12/16
- [PULL 20/88] xive/kvm: Trigger interrupts from userspace, David Gibson, 2019/12/16
- [PULL 14/88] xics: Link ICP_PROP_CPU property to ICPState::cs pointer, David Gibson, 2019/12/16
- [PULL 17/88] ppc/xive: Record the IPB in the associated NVT, David Gibson, 2019/12/16
- [PULL 23/88] ppc/xive: Check V bit in TM_PULL_POOL_CTX, David Gibson, 2019/12/16
- [PULL 21/88] ppc/pnv: Quiesce some XIVE errors,
David Gibson <=
- [PULL 24/88] ipmi: Add support to customize OEM functions, David Gibson, 2019/12/16
- [PULL 36/88] ppc/spapr: Implement the XiveFabric interface, David Gibson, 2019/12/16
- [PULL 22/88] ppc/xive: Introduce OS CAM line helpers, David Gibson, 2019/12/16
- [PULL 25/88] ppc/pnv: Add HIOMAP commands, David Gibson, 2019/12/16
- [PULL 32/88] ppc/pnv: Introduce a pnv_xive_is_cpu_enabled() helper, David Gibson, 2019/12/16
- [PULL 30/88] ppc/pnv: Loop on the threads of the chip to find a matching NVT, David Gibson, 2019/12/16
- [PULL 34/88] ppc/xive: Introduce a XiveFabric interface, David Gibson, 2019/12/16
- [PULL 35/88] ppc/pnv: Implement the XiveFabric interface, David Gibson, 2019/12/16
- [PULL 41/88] spapr/xics: Configure number of servers in KVM, David Gibson, 2019/12/16
- [PULL 33/88] ppc/pnv: Fix TIMA indirect access, David Gibson, 2019/12/16