Re: [PATCH 4/4] hw/i386/pc: Extract the port92 device

[Paolo Bonzini]

On 13/12/19 11:51, Philippe Mathieu-Daudé wrote:
> This device is only used by the PC machines. The pc.c file is
> already big enough, with 2255 lines. By removing 113 lines of
> it, we reduced it by 5%. It is now a bit easier to navigate
> the file.
> 
> Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
> ---
> checkpatch warning:
> 
>   WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
>   #142:
>   new file mode 100644
> 
> is harmless because MAINTAINERS PC entry matches the directory:
> 
>   PC
>   ...
>   F: hw/i386/
> ---
>  include/hw/i386/pc.h  |   3 +
>  hw/i386/pc.c          | 113 -------------------------------------
>  hw/i386/port92.c      | 126 ++++++++++++++++++++++++++++++++++++++++++
>  hw/i386/Makefile.objs |   1 +
>  hw/i386/trace-events  |   2 +
>  5 files changed, 132 insertions(+), 113 deletions(-)
>  create mode 100644 hw/i386/port92.c
> 
> diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
> index 1f86eba3f9..7e8d18d6fa 100644
> --- a/include/hw/i386/pc.h
> +++ b/include/hw/i386/pc.h
> @@ -224,8 +224,11 @@ int cmos_get_fd_drive_type(FloppyDriveType fd0);
>  
>  #define FW_CFG_IO_BASE     0x510
>  
> +/* port92.c */
>  #define PORT92_A20_LINE "a20"
>  
> +#define TYPE_PORT92 "port92"
> +
>  /* hpet.c */
>  extern int no_hpet;
>  
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index 2e8992c7d0..15efcb29d5 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -733,119 +733,6 @@ void pc_cmos_init(PCMachineState *pcms,
>      qemu_register_reset(pc_cmos_init_late, &arg);
>  }
>  
> -#define TYPE_PORT92 "port92"
> -#define PORT92(obj) OBJECT_CHECK(Port92State, (obj), TYPE_PORT92)
> -
> -/* port 92 stuff: could be split off */
> -typedef struct Port92State {
> -    ISADevice parent_obj;
> -
> -    MemoryRegion io;
> -    uint8_t outport;
> -    qemu_irq a20_out;
> -} Port92State;
> -
> -static void port92_write(void *opaque, hwaddr addr, uint64_t val,
> -                         unsigned size)
> -{
> -    Port92State *s = opaque;
> -    int oldval = s->outport;
> -
> -    trace_port92_write(val);
> -    s->outport = val;
> -    qemu_set_irq(s->a20_out, (val >> 1) & 1);
> -    if ((val & 1) && !(oldval & 1)) {
> -        qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
> -    }
> -}
> -
> -static uint64_t port92_read(void *opaque, hwaddr addr,
> -                            unsigned size)
> -{
> -    Port92State *s = opaque;
> -    uint32_t ret;
> -
> -    ret = s->outport;
> -    trace_port92_read(ret);
> -    return ret;
> -}
> -
> -static const VMStateDescription vmstate_port92_isa = {
> -    .name = "port92",
> -    .version_id = 1,
> -    .minimum_version_id = 1,
> -    .fields = (VMStateField[]) {
> -        VMSTATE_UINT8(outport, Port92State),
> -        VMSTATE_END_OF_LIST()
> -    }
> -};
> -
> -static void port92_reset(DeviceState *d)
> -{
> -    Port92State *s = PORT92(d);
> -
> -    s->outport &= ~1;
> -}
> -
> -static const MemoryRegionOps port92_ops = {
> -    .read = port92_read,
> -    .write = port92_write,
> -    .impl = {
> -        .min_access_size = 1,
> -        .max_access_size = 1,
> -    },
> -    .endianness = DEVICE_LITTLE_ENDIAN,
> -};
> -
> -static void port92_initfn(Object *obj)
> -{
> -    Port92State *s = PORT92(obj);
> -
> -    memory_region_init_io(&s->io, OBJECT(s), &port92_ops, s, "port92", 1);
> -
> -    s->outport = 0;
> -
> -    qdev_init_gpio_out_named(DEVICE(obj), &s->a20_out, PORT92_A20_LINE, 1);
> -}
> -
> -static void port92_realizefn(DeviceState *dev, Error **errp)
> -{
> -    ISADevice *isadev = ISA_DEVICE(dev);
> -    Port92State *s = PORT92(dev);
> -
> -    isa_register_ioport(isadev, &s->io, 0x92);
> -}
> -
> -static void port92_class_initfn(ObjectClass *klass, void *data)
> -{
> -    DeviceClass *dc = DEVICE_CLASS(klass);
> -
> -    dc->realize = port92_realizefn;
> -    dc->reset = port92_reset;
> -    dc->vmsd = &vmstate_port92_isa;
> -    /*
> -     * Reason: unlike ordinary ISA devices, this one needs additional
> -     * wiring: its A20 output line needs to be wired up with
> -     * qdev_connect_gpio_out_named().
> -     */
> -    dc->user_creatable = false;
> -}
> -
> -static const TypeInfo port92_info = {
> -    .name          = TYPE_PORT92,
> -    .parent        = TYPE_ISA_DEVICE,
> -    .instance_size = sizeof(Port92State),
> -    .instance_init = port92_initfn,
> -    .class_init    = port92_class_initfn,
> -};
> -
> -static void port92_register_types(void)
> -{
> -    type_register_static(&port92_info);
> -}
> -
> -type_init(port92_register_types)
> -
>  static void handle_a20_line_change(void *opaque, int irq, int level)
>  {
>      X86CPU *cpu = opaque;
> diff --git a/hw/i386/port92.c b/hw/i386/port92.c
> new file mode 100644
> index 0000000000..19866c44ef
> --- /dev/null
> +++ b/hw/i386/port92.c
> @@ -0,0 +1,126 @@
> +/*
> + * QEMU I/O port 0x92 (System Control Port A, to handle Fast Gate A20)
> + *
> + * Copyright (c) 2003-2004 Fabrice Bellard
> + *
> + * SPDX-License-Identifier: MIT
> + */
> +
> +#include "qemu/osdep.h"
> +#include "sysemu/runstate.h"
> +#include "migration/vmstate.h"
> +#include "hw/irq.h"
> +#include "hw/i386/pc.h"
> +#include "trace.h"
> +
> +#define PORT92(obj) OBJECT_CHECK(Port92State, (obj), TYPE_PORT92)
> +
> +typedef struct Port92State {
> +    ISADevice parent_obj;
> +
> +    MemoryRegion io;
> +    uint8_t outport;
> +    qemu_irq a20_out;
> +} Port92State;
> +
> +static void port92_write(void *opaque, hwaddr addr, uint64_t val,
> +                         unsigned size)
> +{
> +    Port92State *s = opaque;
> +    int oldval = s->outport;
> +
> +    trace_port92_write(val);
> +    s->outport = val;
> +    qemu_set_irq(s->a20_out, (val >> 1) & 1);
> +    if ((val & 1) && !(oldval & 1)) {
> +        qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
> +    }
> +}
> +
> +static uint64_t port92_read(void *opaque, hwaddr addr,
> +                            unsigned size)
> +{
> +    Port92State *s = opaque;
> +    uint32_t ret;
> +
> +    ret = s->outport;
> +    trace_port92_read(ret);
> +
> +    return ret;
> +}
> +
> +static const VMStateDescription vmstate_port92_isa = {
> +    .name = "port92",
> +    .version_id = 1,
> +    .minimum_version_id = 1,
> +    .fields = (VMStateField[]) {
> +        VMSTATE_UINT8(outport, Port92State),
> +        VMSTATE_END_OF_LIST()
> +    }
> +};
> +
> +static void port92_reset(DeviceState *d)
> +{
> +    Port92State *s = PORT92(d);
> +
> +    s->outport &= ~1;
> +}
> +
> +static const MemoryRegionOps port92_ops = {
> +    .read = port92_read,
> +    .write = port92_write,
> +    .impl = {
> +        .min_access_size = 1,
> +        .max_access_size = 1,
> +    },
> +    .endianness = DEVICE_LITTLE_ENDIAN,
> +};
> +
> +static void port92_initfn(Object *obj)
> +{
> +    Port92State *s = PORT92(obj);
> +
> +    memory_region_init_io(&s->io, OBJECT(s), &port92_ops, s, "port92", 1);
> +
> +    s->outport = 0;
> +
> +    qdev_init_gpio_out_named(DEVICE(obj), &s->a20_out, PORT92_A20_LINE, 1);
> +}
> +
> +static void port92_realizefn(DeviceState *dev, Error **errp)
> +{
> +    ISADevice *isadev = ISA_DEVICE(dev);
> +    Port92State *s = PORT92(dev);
> +
> +    isa_register_ioport(isadev, &s->io, 0x92);
> +}
> +
> +static void port92_class_initfn(ObjectClass *klass, void *data)
> +{
> +    DeviceClass *dc = DEVICE_CLASS(klass);
> +
> +    dc->realize = port92_realizefn;
> +    dc->reset = port92_reset;
> +    dc->vmsd = &vmstate_port92_isa;
> +    /*
> +     * Reason: unlike ordinary ISA devices, this one needs additional
> +     * wiring: its A20 output line needs to be wired up with
> +     * qdev_connect_gpio_out_named().
> +     */
> +    dc->user_creatable = false;
> +}
> +
> +static const TypeInfo port92_info = {
> +    .name          = TYPE_PORT92,
> +    .parent        = TYPE_ISA_DEVICE,
> +    .instance_size = sizeof(Port92State),
> +    .instance_init = port92_initfn,
> +    .class_init    = port92_class_initfn,
> +};
> +
> +static void port92_register_types(void)
> +{
> +    type_register_static(&port92_info);
> +}
> +
> +type_init(port92_register_types)
> diff --git a/hw/i386/Makefile.objs b/hw/i386/Makefile.objs
> index 0d195b5210..b317e7eee0 100644
> --- a/hw/i386/Makefile.objs
> +++ b/hw/i386/Makefile.objs
> @@ -12,6 +12,7 @@ obj-$(CONFIG_AMD_IOMMU) += amd_iommu.o
>  obj-$(CONFIG_XEN) += ../xenpv/ xen/
>  obj-$(CONFIG_VMPORT) += vmport.o
>  obj-$(CONFIG_VMMOUSE) += vmmouse.o
> +obj-$(CONFIG_PC) += port92.o
>  
>  obj-y += kvmvapic.o
>  obj-y += acpi-build.o
> diff --git a/hw/i386/trace-events b/hw/i386/trace-events
> index 43f33cf7e2..076ea5dcfb 100644
> --- a/hw/i386/trace-events
> +++ b/hw/i386/trace-events
> @@ -115,5 +115,7 @@ vmport_command(unsigned char command) "command: 0x%02x"
>  # pc.c
>  pc_gsi_interrupt(int irqn, int level) "GSI interrupt #%d level:%d"
>  pc_pic_interrupt(int irqn, int level) "PIC interrupt #%d level:%d"
> +
> +# port92.c
>  port92_read(uint8_t val) "port92: read 0x%02x"
>  port92_write(uint8_t val) "port92: write 0x%02x"
> 

Queued, thanks.

Paolo