Re: [PATCH] target/arm: ensure we use current exception state after SCR update

[Richard Henderson]

On 12/9/19 6:37 AM, Alex Bennée wrote:
> +/* Re-read the current EL, don't use cached values */
>  #define ARM_CP_CURRENTEL         (ARM_CP_SPECIAL | 0x0400)
>  #define ARM_CP_DC_ZVA            (ARM_CP_SPECIAL | 0x0500)
>  #define ARM_LAST_SPECIAL         ARM_CP_DC_ZVA
...
> @@ -5179,7 +5179,7 @@ static const ARMCPRegInfo el3_cp_reginfo[] = {
>        .opc0 = 3, .opc1 = 6, .crn = 1, .crm = 1, .opc2 = 0,
>        .access = PL3_RW, .fieldoffset = offsetof(CPUARMState, cp15.scr_el3),
>        .resetvalue = 0, .writefn = scr_write },
> -    { .name = "SCR",  .type = ARM_CP_ALIAS,
> +    { .name = "SCR",  .type = ARM_CP_ALIAS | ARM_CP_CURRENTEL,

I don't think you should reuse this value.  It is not a simple bit.

While ARM_CP_* all appear to implement a 16-bit quantity, the type field is
already an int, and so can easily hold more.  I think you should use a new bit
for this.


r~