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[Qemu-commits] [qemu/qemu] 5c00ac: vga: merge conditionals on shift cont
From: |
Peter Maydell |
Subject: |
[Qemu-commits] [qemu/qemu] 5c00ac: vga: merge conditionals on shift control register |
Date: |
Wed, 03 Apr 2024 09:46:05 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 5c00acebb6fb92ff169b322c9e74d06d8b922232
https://github.com/qemu/qemu/commit/5c00acebb6fb92ff169b322c9e74d06d8b922232
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2024-04-02 (Tue, 02 Apr 2024)
Changed paths:
M hw/display/vga.c
Log Message:
-----------
vga: merge conditionals on shift control register
There are two sets of conditionals using the shift control bits: one to
verify the palette and adjust disp_width, one to compute the "v" and
"bits" variables. Merge them into one, with the extra benefit that
we now have the "bits" value available early and can use it to
compute region_end.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: 3826a372e4aafac1dba9ba3434e7c2f76775de42
https://github.com/qemu/qemu/commit/3826a372e4aafac1dba9ba3434e7c2f76775de42
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2024-04-02 (Tue, 02 Apr 2024)
Changed paths:
M hw/display/vga.c
Log Message:
-----------
vga: move computation of dirty memory region later
Move the computation of region_start and region_end after the value of
"bits" is known. This makes it possible to distinguish modes that
support horizontal pel panning from modes that do not.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: 3b6d2b1962b23295c463f010ff88eb5a594f2ef9
https://github.com/qemu/qemu/commit/3b6d2b1962b23295c463f010ff88eb5a594f2ef9
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2024-04-02 (Tue, 02 Apr 2024)
Changed paths:
M hw/display/vga.c
Log Message:
-----------
vga: adjust dirty memory region if pel panning is active
When pel panning is active, one more byte is read from each of the VGA
memory planes. This has to be accounted in the computation of region_end,
otherwise vga_draw_graphic() fails an assertion:
qemu-system-i386: ../system/physmem.c:946:
cpu_physical_memory_snapshot_get_dirty: Assertion `start + length <= snap->end'
failed.
Reported-by: Helge Konetzka <hk@zapateado.de>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2244
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: 1d1ee7e0a1b7041804e8c5f8c2453fdc2df0407e
https://github.com/qemu/qemu/commit/1d1ee7e0a1b7041804e8c5f8c2453fdc2df0407e
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2024-04-02 (Tue, 02 Apr 2024)
Changed paths:
M hw/display/vga.c
Log Message:
-----------
vga: do not treat horiz pel panning value of 8 as "enabled"
Horizontal pel panning bit 3 is only used in text mode. In graphics
mode, it can be treated as if it was zero, thus not extending the
dirty memory region.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: e497e6a55786a62ffe009a3fe2fa6d40e6080210
https://github.com/qemu/qemu/commit/e497e6a55786a62ffe009a3fe2fa6d40e6080210
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2024-04-02 (Tue, 02 Apr 2024)
Changed paths:
M hw/scsi/lsi53c895a.c
Log Message:
-----------
lsi53c895a: avoid out of bounds access to s->msg[]
If no bytes are there to process in the message in phase,
the input data latch (s->sidl) is set to s->msg[-1]. Just
do nothing since no DMA is performed.
Reported-by: Chuhong Yuan <hslester96@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: 8fc4bdc537d901c200e43122e32bcb40dc8fed37
https://github.com/qemu/qemu/commit/8fc4bdc537d901c200e43122e32bcb40dc8fed37
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2024-04-02 (Tue, 02 Apr 2024)
Changed paths:
M hw/i386/pc_q35.c
Log Message:
-----------
pc_q35: remove unnecessary m->alias assignment
The assignment is already inherited from pc-q35-8.2.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: 786fd793b81410fb2a28914315e2f05d2ff6733b
https://github.com/qemu/qemu/commit/786fd793b81410fb2a28914315e2f05d2ff6733b
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2024-04-03 (Wed, 03 Apr 2024)
Changed paths:
M hw/display/vga.c
M hw/i386/pc_q35.c
M hw/scsi/lsi53c895a.c
Log Message:
-----------
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* lsi53c895a: fix assertion failure with invalid Block Move
* vga: fix assertion failure with 4- and 16-color modes
* remove unnecessary assignment
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# gpg: Signature made Wed 03 Apr 2024 11:04:42 BST
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
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# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
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* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
pc_q35: remove unnecessary m->alias assignment
lsi53c895a: avoid out of bounds access to s->msg[]
vga: do not treat horiz pel panning value of 8 as "enabled"
vga: adjust dirty memory region if pel panning is active
vga: move computation of dirty memory region later
vga: merge conditionals on shift control register
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/e5c6528dce86...786fd793b814
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