[Qemu-commits] [qemu/qemu] f77c5f: hv-balloon: use get_min_alignment() to express 32 ...

[Peter Maydell]

  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: f77c5f38f49c71bc14cf1019ac92b0b95f572414
      
https://github.com/qemu/qemu/commit/f77c5f38f49c71bc14cf1019ac92b0b95f572414
  Author: David Hildenbrand <david@redhat.com>
  Date:   2024-02-04 (Sun, 04 Feb 2024)

  Changed paths:
    M hw/hyperv/hv-balloon.c

  Log Message:
  -----------
  hv-balloon: use get_min_alignment() to express 32 GiB alignment

Let's implement the get_min_alignment() callback for memory devices, and
copy for the device memory region the alignment of the host memory
region. This mimics what virtio-mem does, and allows for re-introducing
proper alignment checks for the memory region size (where we don't care
about additional device requirements) in memory device core.

Message-ID: <20240117135554.787344-2-david@redhat.com>
Reviewed-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Signed-off-by: David Hildenbrand <david@redhat.com>


  Commit: 585b7a424759ee4b70b1e93feecac2530f26d25a
      
https://github.com/qemu/qemu/commit/585b7a424759ee4b70b1e93feecac2530f26d25a
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-02-05 (Mon, 05 Feb 2024)

  Changed paths:
    M tcg/s390x/tcg-target.c.inc
    M tcg/s390x/tcg-target.h

  Log Message:
  -----------
  tcg/s390x: Support TCG_COND_TST{EQ,NE}

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 23c5692abc3917151dee36c00d751cf5bc46ef19
      
https://github.com/qemu/qemu/commit/23c5692abc3917151dee36c00d751cf5bc46ef19
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-02-05 (Mon, 05 Feb 2024)

  Changed paths:
    M tcg/tci.c
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg/tci: Support TCG_COND_TST{EQ,NE}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 540a1abbf0b243e4cfb4333c5d30a041f7080ba4
      
https://github.com/qemu/qemu/commit/540a1abbf0b243e4cfb4333c5d30a041f7080ba4
  Author: David Hildenbrand <david@redhat.com>
  Date:   2024-02-06 (Tue, 06 Feb 2024)

  Changed paths:
    M hw/mem/memory-device.c

  Log Message:
  -----------
  memory-device: reintroduce memory region size check

We used to check that the memory region size is multiples of the overall
requested address alignment for the device memory address.

We removed that check, because there are cases (i.e., hv-balloon) where
devices unconditionally request an address alignment that has a very large
alignment (i.e., 32 GiB), but the actual memory device size might not be
multiples of that alignment.

However, this change:

(a) allows for some practically impossible DIMM sizes, like "1GB+1 byte".
(b) allows for DIMMs that partially cover hugetlb pages, previously
    reported in [1].

Both scenarios don't make any sense: we might even waste memory.

So let's reintroduce that check, but only check that the
memory region size is multiples of the memory region alignment (i.e.,
page size, huge page size), but not any additional memory device
requirements communicated using md->get_min_alignment().

The following examples now fail again as expected:

(a) 1M with 2M THP
 qemu-system-x86_64 -m 4g,maxmem=16g,slots=1 -S -nodefaults -nographic \
                     -object memory-backend-ram,id=mem1,size=1M \
                     -device pc-dimm,id=dimm1,memdev=mem1
 -> backend memory size must be multiple of 0x200000

(b) 1G+1byte

 qemu-system-x86_64 -m 4g,maxmem=16g,slots=1 -S -nodefaults -nographic \
                   -object memory-backend-ram,id=mem1,size=1073741825B \
                   -device pc-dimm,id=dimm1,memdev=mem1
 -> backend memory size must be multiple of 0x200000

(c) Unliagned hugetlb size (2M)

 qemu-system-x86_64 -m 4g,maxmem=16g,slots=1 -S -nodefaults -nographic \
                   -object 
memory-backend-file,id=mem1,mem-path=/dev/hugepages/tmp,size=511M \
                   -device pc-dimm,id=dimm1,memdev=mem1
 backend memory size must be multiple of 0x200000

(d) Unliagned hugetlb size (1G)

 qemu-system-x86_64 -m 4g,maxmem=16g,slots=1 -S -nodefaults -nographic \
                    -object 
memory-backend-file,id=mem1,mem-path=/dev/hugepages1G/tmp,size=2047M \
                    -device pc-dimm,id=dimm1,memdev=mem1
 -> backend memory size must be multiple of 0x40000000

Note that this fix depends on a hv-balloon change to communicate its
additional alignment requirements using get_min_alignment() instead of
through the memory region.

[1] 
https://lkml.kernel.org/r/f77d641d500324525ac036fe1827b3070de75fc1.1701088320.git.mprivozn@redhat.com

Message-ID: <20240117135554.787344-3-david@redhat.com>
Reported-by: Zhenyu Zhang <zhenyzha@redhat.com>
Reported-by: Michal Privoznik <mprivozn@redhat.com>
Fixes: eb1b7c4bd413 ("memory-device: Drop size alignment check")
Tested-by: Zhenyu Zhang <zhenyzha@redhat.com>
Tested-by: Mario Casquero <mcasquer@redhat.com>
Reviewed-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Signed-off-by: David Hildenbrand <david@redhat.com>


  Commit: 04accf43df83aa10f06f7dbda3ecf0db97f0c5a6
      
https://github.com/qemu/qemu/commit/04accf43df83aa10f06f7dbda3ecf0db97f0c5a6
  Author: Mark Kanda <mark.kanda@oracle.com>
  Date:   2024-02-06 (Tue, 06 Feb 2024)

  Changed paths:
    M backends/hostmem.c
    M hw/virtio/virtio-mem.c
    M include/hw/qdev-core.h
    M include/qemu/osdep.h
    M system/vl.c
    M util/oslib-posix.c
    M util/oslib-win32.c

  Log Message:
  -----------
  oslib-posix: initialize backend memory objects in parallel

QEMU initializes preallocated backend memory as the objects are parsed from
the command line. This is not optimal in some cases (e.g. memory spanning
multiple NUMA nodes) because the memory objects are initialized in series.

Allow the initialization to occur in parallel (asynchronously). In order to
ensure optimal thread placement, asynchronous initialization requires prealloc
context threads to be in use.

Signed-off-by: Mark Kanda <mark.kanda@oracle.com>
Message-ID: <20240131165327.3154970-2-mark.kanda@oracle.com>
Tested-by: Mario Casquero <mcasquer@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>


  Commit: 48f21018d530d5f9fe6c95c249188d99359858a2
      
https://github.com/qemu/qemu/commit/48f21018d530d5f9fe6c95c249188d99359858a2
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2024-02-06 (Tue, 06 Feb 2024)

  Changed paths:
    M backends/hostmem.c
    M hw/hyperv/hv-balloon.c
    M hw/mem/memory-device.c
    M hw/virtio/virtio-mem.c
    M include/hw/qdev-core.h
    M include/qemu/osdep.h
    M system/vl.c
    M util/oslib-posix.c
    M util/oslib-win32.c

  Log Message:
  -----------
  Merge tag 'mem-2024-02-06-v3' of https://github.com/davidhildenbrand/qemu 
into staging

Hi,

"Host Memory Backends" and "Memory devices" queue ("mem"):
- Reintroduce memory region size checks for memory devices; the removal
  lead to some undesired side effects
- Preallocate memory of memory backends in selected configurations
  asynchronously (so we preallocate concurrently), to speed up QEMU
  startup time.

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# gpg:                using RSA key 1BD9CAAD735C4C3A460DFCCA4DDE10F700FF835A
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# gpg: Good signature from "David Hildenbrand <david@redhat.com>" [marginal]
# gpg:                 aka "David Hildenbrand <davidhildenbrand@gmail.com>" 
[full]
# gpg:                 aka "David Hildenbrand <hildenbr@in.tum.de>" [unknown]
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* tag 'mem-2024-02-06-v3' of https://github.com/davidhildenbrand/qemu:
  oslib-posix: initialize backend memory objects in parallel
  memory-device: reintroduce memory region size check
  hv-balloon: use get_min_alignment() to express 32 GiB alignment

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: c165d4aac55024f47705db3780664a3ca34d19b8
      
https://github.com/qemu/qemu/commit/c165d4aac55024f47705db3780664a3ca34d19b8
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2024-02-06 (Tue, 06 Feb 2024)

  Changed paths:
    M docs/devel/tcg-ops.rst
    M include/tcg/tcg-cond.h
    M target/alpha/translate.c
    M target/m68k/translate.c
    M target/s390x/tcg/translate.c
    M target/sparc/translate.c
    M tcg/aarch64/tcg-target-con-set.h
    M tcg/aarch64/tcg-target-con-str.h
    M tcg/aarch64/tcg-target.c.inc
    M tcg/aarch64/tcg-target.h
    M tcg/arm/tcg-target.c.inc
    M tcg/arm/tcg-target.h
    M tcg/i386/tcg-target-con-set.h
    M tcg/i386/tcg-target-con-str.h
    M tcg/i386/tcg-target.c.inc
    M tcg/i386/tcg-target.h
    M tcg/loongarch64/tcg-target.c.inc
    M tcg/loongarch64/tcg-target.h
    M tcg/mips/tcg-target.c.inc
    M tcg/mips/tcg-target.h
    M tcg/optimize.c
    M tcg/ppc/tcg-target-con-set.h
    M tcg/ppc/tcg-target-con-str.h
    M tcg/ppc/tcg-target.c.inc
    M tcg/ppc/tcg-target.h
    M tcg/riscv/tcg-target.c.inc
    M tcg/riscv/tcg-target.h
    M tcg/s390x/tcg-target-con-set.h
    M tcg/s390x/tcg-target-con-str.h
    M tcg/s390x/tcg-target.c.inc
    M tcg/s390x/tcg-target.h
    M tcg/sparc64/tcg-target.c.inc
    M tcg/sparc64/tcg-target.h
    M tcg/tcg-internal.h
    M tcg/tcg.c
    M tcg/tci.c
    M tcg/tci/tcg-target.c.inc
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  Merge tag 'pull-tcg-20240205-2' of https://gitlab.com/rth7680/qemu into 
staging

tcg: Introduce TCG_COND_TST{EQ,NE}
target/alpha: Use TCG_COND_TST{EQ,NE}
target/m68k: Use TCG_COND_TST{EQ,NE} in gen_fcc_cond
target/sparc: Use TCG_COND_TSTEQ in gen_op_mulscc
target/s390x: Use TCG_COND_TSTNE for CC_OP_{TM,ICM}
target/s390x: Improve general case of disas_jcc

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[full]
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* tag 'pull-tcg-20240205-2' of https://gitlab.com/rth7680/qemu: (39 commits)
  tcg/tci: Support TCG_COND_TST{EQ,NE}
  tcg/s390x: Support TCG_COND_TST{EQ,NE}
  tcg/s390x: Add TCG_CT_CONST_CMP
  tcg/s390x: Split constraint A into J+U
  tcg/ppc: Support TCG_COND_TST{EQ,NE}
  tcg/ppc: Add TCG_CT_CONST_CMP
  tcg/ppc: Tidy up tcg_target_const_match
  tcg/ppc: Use cr0 in tcg_to_bc and tcg_to_isel
  tcg/ppc: Sink tcg_to_bc usage into tcg_out_bc
  tcg/sparc64: Support TCG_COND_TST{EQ,NE}
  tcg/sparc64: Pass TCGCond to tcg_out_cmp
  tcg/sparc64: Hoist read of tcg_cond_to_rcond
  tcg/i386: Use TEST r,r to test 8/16/32 bits
  tcg/i386: Improve TSTNE/TESTEQ vs powers of two
  tcg/i386: Support TCG_COND_TST{EQ,NE}
  tcg/i386: Move tcg_cond_to_jcc[] into tcg_out_cmp
  tcg/i386: Pass x86 condition codes to tcg_out_cmov
  tcg/arm: Support TCG_COND_TST{EQ,NE}
  tcg/arm: Split out tcg_out_cmp()
  tcg/aarch64: Generate CBNZ for TSTNE of UINT32_MAX
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Compare: https://github.com/qemu/qemu/compare/bd1ac9c3cee9...c165d4aac550