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[Qemu-commits] [qemu/qemu] cbe27c: MAINTAINERS: aspeed: Update Andrew's
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From: |
Alex Bennée |
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Subject: |
[Qemu-commits] [qemu/qemu] cbe27c: MAINTAINERS: aspeed: Update Andrew's email address |
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Date: |
Thu, 26 Oct 2023 17:44:35 -0700 |
Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: cbe27c3ec3783bd8a838042d23ab6180d67b098d
https://github.com/qemu/qemu/commit/cbe27c3ec3783bd8a838042d23ab6180d67b098d
Author: Andrew Jeffery <andrew@codeconstruct.com.au>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: aspeed: Update Andrew's email address
I've changed employers, have company email that deals with patch-based
workflows without too much of a headache, and am trying to steer some
content out of my personal mail.
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 2f4ec776798bb178f42940961668f39c764386d3
https://github.com/qemu/qemu/commit/2f4ec776798bb178f42940961668f39c764386d3
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M hw/arm/aspeed_soc.c
A hw/arm/aspeed_soc_common.c
M hw/arm/meson.build
Log Message:
-----------
hw/arm/aspeed: Extract code common to all boards to a common file
aspeed_soc.c contains definitions specific to the AST2400
and AST2500 SoCs, but also some definitions for other AST
SoCs: move them to a common file.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: a1508362398654f27193f42945e49ec8812175b6
https://github.com/qemu/qemu/commit/a1508362398654f27193f42945e49ec8812175b6
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M hw/arm/aspeed_soc.c
Log Message:
-----------
hw/arm/aspeed: Rename aspeed_soc_init() as AST2400/2500 specific
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: aa6c6697bbab5130f962d227924cfe7f94cbee19
https://github.com/qemu/qemu/commit/aa6c6697bbab5130f962d227924cfe7f94cbee19
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M hw/arm/aspeed_soc.c
Log Message:
-----------
hw/arm/aspeed: Rename aspeed_soc_realize() as AST2400/2500 specific
Keep aspeed_soc_class_init() generic, set the realize handler
to aspeed_ast2400_soc_realize() in each 2400/2500 class_init.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 3c392e87df051d457429274af55fe967808d6cb6
https://github.com/qemu/qemu/commit/3c392e87df051d457429274af55fe967808d6cb6
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M hw/arm/aspeed.c
Log Message:
-----------
hw/arm/aspeed: Dynamically allocate AspeedMachineState::soc field
We want to derivate the big AspeedSoCState object in some more
SoC-specific ones. Since the object size will vary, allocate it
dynamically.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: df4ab0764db4490d70e990b786f0f4928f83d596
https://github.com/qemu/qemu/commit/df4ab0764db4490d70e990b786f0f4928f83d596
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M hw/arm/aspeed_ast10x0.c
M include/hw/arm/aspeed_soc.h
Log Message:
-----------
hw/arm/aspeed: Introduce TYPE_ASPEED10X0_SOC
TYPE_ASPEED10X0_SOC inherits from TYPE_ASPEED_SOC.
In few commits we'll add more fields, but to keep
review process simple, don't add any yet.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 4fc5e8065b3632cec2b9cfbb62b3b4d053660576
https://github.com/qemu/qemu/commit/4fc5e8065b3632cec2b9cfbb62b3b4d053660576
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M hw/arm/aspeed_ast2600.c
M include/hw/arm/aspeed_soc.h
Log Message:
-----------
hw/arm/aspeed: Introduce TYPE_ASPEED2600_SOC
TYPE_ASPEED2600_SOC inherits from TYPE_ASPEED_SOC.
In few commits we'll add more fields, but to keep
review process simple, don't add any yet.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 1a94fae4c18aacc563a6c6bf61aa7f357f1e2eb0
https://github.com/qemu/qemu/commit/1a94fae4c18aacc563a6c6bf61aa7f357f1e2eb0
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M hw/arm/aspeed_soc.c
M hw/arm/aspeed_soc_common.c
M include/hw/arm/aspeed_soc.h
Log Message:
-----------
hw/arm/aspeed: Introduce TYPE_ASPEED2400_SOC
TYPE_ASPEED2400_SOC inherits from TYPE_ASPEED_SOC.
In few commits we'll add more fields, but to keep
review process simple, don't add any yet.
TYPE_ASPEED_SOC is common to various Aspeed SoCs,
define it in aspeed_soc_common.c.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 24a88476ffbecdd6ffb96a5298d90de10176a301
https://github.com/qemu/qemu/commit/24a88476ffbecdd6ffb96a5298d90de10176a301
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M hw/arm/aspeed_soc_common.c
Log Message:
-----------
hw/arm/aspeed: Check 'memory' link is set in common aspeed_soc_realize
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: a0c21030705246fc53703253d9b9fccd88aa88d0
https://github.com/qemu/qemu/commit/a0c21030705246fc53703253d9b9fccd88aa88d0
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M hw/arm/aspeed_ast10x0.c
M hw/arm/fby35.c
M include/hw/arm/aspeed_soc.h
Log Message:
-----------
hw/arm/aspeed: Move AspeedSoCState::armv7m to Aspeed10x0SoCState
The v7-M core is specific to the Aspeed 10x0 series,
remove it from the common AspeedSoCState.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: c17fc025714faa031cd6570ca2f74a0d5b008431
https://github.com/qemu/qemu/commit/c17fc025714faa031cd6570ca2f74a0d5b008431
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M hw/arm/aspeed_ast2600.c
M hw/arm/fby35.c
M include/hw/arm/aspeed_soc.h
Log Message:
-----------
hw/arm/aspeed: Move AspeedSoCState::a7mpcore to Aspeed2600SoCState
The v7-A cluster is specific to the Aspeed 2600 series,
remove it from the common AspeedSoCState.
The ARM cores belong to the MP cluster, but the array
is currently used by TYPE_ASPEED2600_SOC. We'll clean
that soon, but for now keep it in Aspeed2600SoCState.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: dd41ce7a6f13ad4f45ebaf52b9fa91fe5fc961df
https://github.com/qemu/qemu/commit/dd41ce7a6f13ad4f45ebaf52b9fa91fe5fc961df
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
A hw/arm/aspeed_ast2400.c
R hw/arm/aspeed_soc.c
M hw/arm/meson.build
M include/hw/arm/aspeed_soc.h
Log Message:
-----------
hw/arm/aspeed: Move AspeedSoCState::cpu/vic to Aspeed2400SoCState
The ARM array and VIC peripheral are only used by the
2400 series, remove them from the common AspeedSoCState.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 930f1865cc654b637ffe1207fa5b44bf0a156279
https://github.com/qemu/qemu/commit/930f1865cc654b637ffe1207fa5b44bf0a156279
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Clear may_lookup for npc == DYNAMIC_PC
With pairs of jmp+rett, pc == DYNAMIC_PC_LOOKUP and
npc == DYNAMIC_PC. Make sure that we exit for interrupts.
Cc: qemu-stable@nongnu.org
Fixes: 633c42834c7 ("target/sparc: Introduce DYNAMIC_PC_LOOKUP")
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 186e78905a4fe69b62598af73903c6cf4df1f24f
https://github.com/qemu/qemu/commit/186e78905a4fe69b62598af73903c6cf4df1f24f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/helper.h
M target/sparc/ldst_helper.c
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Implement check_align inline
Emit the exception at the end of the translation block,
so that the non-exception case can fall through.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d9125cf27cbb2dcd457a95f336f8aaae87412525
https://github.com/qemu/qemu/commit/d9125cf27cbb2dcd457a95f336f8aaae87412525
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/ldst_helper.c
Log Message:
-----------
target/sparc: Avoid helper_raise_exception in helper_st_asi
Always use cpu_raise_exception_ra with GETPC for unwind.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e0f46055a18e3d51ffe4c0a38e09c5263bd4f059
https://github.com/qemu/qemu/commit/e0f46055a18e3d51ffe4c0a38e09c5263bd4f059
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/cpu.h
Log Message:
-----------
target/sparc: Set TCG_GUEST_DEFAULT_MO
Always use TSO, per the Oracle 2015 manual.
This is slightly less restrictive than the TCG_MO_ALL default,
and happens to match the i386 model, which will eliminate a few
extra barriers on that host.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ec860e5d039d4dcd40077fc6152e3cf8dcedd2ea
https://github.com/qemu/qemu/commit/ec860e5d039d4dcd40077fc6152e3cf8dcedd2ea
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M configs/targets/sparc-softmmu.mak
M configs/targets/sparc64-softmmu.mak
Log Message:
-----------
configs: Enable MTTCG for sparc, sparc64
This will be of small comfort to sparc64, because both
sun4u and sun4v board models force max_cpus = 1.
But it does enable actual smp for sparc32 sun4m.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: bd7ff659a76ff541c2674e4a48e06e3b047776d0
https://github.com/qemu/qemu/commit/bd7ff659a76ff541c2674e4a48e06e3b047776d0
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
A target/sparc/cpu-feature.h.inc
M target/sparc/cpu.h
Log Message:
-----------
target/sparc: Define features via cpu-feature.h.inc
Manage feature bits automatically.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: de1f52032fac58b23b85dc24b95df5fed5b10b1c
https://github.com/qemu/qemu/commit/de1f52032fac58b23b85dc24b95df5fed5b10b1c
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/cpu.c
Log Message:
-----------
target/sparc: Use CPU_FEATURE_BIT_* for cpu properties
Use symbols not integer constants for the bit positions.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 5f25b383a8b76055607cabeb287a0b0e903da50c
https://github.com/qemu/qemu/commit/5f25b383a8b76055607cabeb287a0b0e903da50c
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M linux-user/sparc/target_syscall.h
M target/sparc/cpu-feature.h.inc
M target/sparc/cpu.c
M target/sparc/cpu.h
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Remove sparcv7 cpu features
The oldest supported cpu is the microsparc 1; all other cpus
use CPU_DEFAULT_FEATURES. Remove the features that must always
be present for sparcv7: FLOAT, SWAP, FLUSH, FSQRT, FMUL.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 554abe47c7b4b68c716edb68b8843f64490d7e55
https://github.com/qemu/qemu/commit/554abe47c7b4b68c716edb68b8843f64490d7e55
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/cpu.c
Log Message:
-----------
target/sparc: Partition cpu features
In the sparc32 binaries, do not advertise features only available
to sparc64, so they cannot be enabled. In the sparc64 binaries,
do not advertise features mandatory in v9, so they cannot be disabled.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 878cc6773a69f9018357ff673f258acef58422b3
https://github.com/qemu/qemu/commit/878cc6773a69f9018357ff673f258acef58422b3
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
A target/sparc/insns.decode
M target/sparc/meson.build
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Add decodetree infrastructure
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: b1bc09ea6bce116c679bbffa66edcb7520d57424
https://github.com/qemu/qemu/commit/b1bc09ea6bce116c679bbffa66edcb7520d57424
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Define AM_CHECK for sparc32
Define as false, which allows some ifdef removal.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 23ada1b16fb22eb5121f7de1bfac342a2b4f72a5
https://github.com/qemu/qemu/commit/23ada1b16fb22eb5121f7de1bfac342a2b4f72a5
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move CALL to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 276567aaf6fc59a8029652d81298c309289d7c20
https://github.com/qemu/qemu/commit/276567aaf6fc59a8029652d81298c309289d7c20
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move BPcc and Bicc to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ab9ffe988a10dcc05e6e609dd721318b7a70bf23
https://github.com/qemu/qemu/commit/ab9ffe988a10dcc05e6e609dd721318b7a70bf23
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move BPr to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 45196ea4f47b84ed0a9890f309de80665a3e7a81
https://github.com/qemu/qemu/commit/45196ea4f47b84ed0a9890f309de80665a3e7a81
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move FBPfcc and FBfcc to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 1ea9c62a5eb32d910f3ff9e7bbbdfb9f875a600f
https://github.com/qemu/qemu/commit/1ea9c62a5eb32d910f3ff9e7bbbdfb9f875a600f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Merge gen_cond with only caller
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d5471936164e4ee3039f15d18308029040013a31
https://github.com/qemu/qemu/commit/d5471936164e4ee3039f15d18308029040013a31
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Merge gen_fcond with only caller
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 6b3e4cc685a6582fe555d6207d563ee972c966b3
https://github.com/qemu/qemu/commit/6b3e4cc685a6582fe555d6207d563ee972c966b3
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Merge gen_branch_[an] with only caller
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 9d4e2bc76137299aef88d7398c3af6b688d299fa
https://github.com/qemu/qemu/commit/9d4e2bc76137299aef88d7398c3af6b688d299fa
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Pass DisasCompare to advance_jump_cond
Fold the condition into the branch or movcond when possible.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 6d2a0768426554ae5bcaca2445d0c9c53335809a
https://github.com/qemu/qemu/commit/6d2a0768426554ae5bcaca2445d0c9c53335809a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move SETHI to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 3037663616db929a3f9c21daa64ff9605bb6ac6f
https://github.com/qemu/qemu/commit/3037663616db929a3f9c21daa64ff9605bb6ac6f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move Tcc to decodetree
Use the new delay_exceptionv function in the implementation.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: af25071c1d9ecccd3f05fd7411209a858e5b45b4
https://github.com/qemu/qemu/commit/af25071c1d9ecccd3f05fd7411209a858e5b45b4
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move RDASR, STBAR, MEMBAR to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 668bb9b755e3d4e4e88625aefab14f8e642ca2f3
https://github.com/qemu/qemu/commit/668bb9b755e3d4e4e88625aefab14f8e642ca2f3
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move RDPSR, RDHPR to decodetree
Implement htstate in the obvious way.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/847
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 5d617bfba070b6c771ed7a0cdfb238bfe7bd1a33
https://github.com/qemu/qemu/commit/5d617bfba070b6c771ed7a0cdfb238bfe7bd1a33
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move RDWIM, RDPR to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e8325dc02d059685331d8607d5e620328bac594e
https://github.com/qemu/qemu/commit/e8325dc02d059685331d8607d5e620328bac594e
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move RDTBR, FLUSHW to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 0faef01b3989bb1fb6e0ed73ffa909e77b79f780
https://github.com/qemu/qemu/commit/0faef01b3989bb1fb6e0ed73ffa909e77b79f780
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move WRASR to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 25524734c62b276d040f8790e64048717955845b
https://github.com/qemu/qemu/commit/25524734c62b276d040f8790e64048717955845b
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move WRPSR, SAVED, RESTORED to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 9422278ef8651e17c1a02909ac00564059177c90
https://github.com/qemu/qemu/commit/9422278ef8651e17c1a02909ac00564059177c90
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move WRWIM, WRPR to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: bb97f2f5d77227cc6b5edeed637218e7dd214816
https://github.com/qemu/qemu/commit/bb97f2f5d77227cc6b5edeed637218e7dd214816
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move WRTBR, WRHPR to decodetree
Implement htstate in the obvious way.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: cd6269f7c966f8c8119abc0318dd6b60a8376989
https://github.com/qemu/qemu/commit/cd6269f7c966f8c8119abc0318dd6b60a8376989
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Remove cpu_wim
Use direct loads and stores to env instead.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 577efa45571b2b62b882f7fd23da197ea99f6014
https://github.com/qemu/qemu/commit/577efa45571b2b62b882f7fd23da197ea99f6014
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Remove cpu_tick_cmpr, cpu_stick_cmpr, cpu_hstick_cmpr
Use direct loads and stores to env instead.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 2da789ded5a89dff4a3485bc486b21278f8b61d3
https://github.com/qemu/qemu/commit/2da789ded5a89dff4a3485bc486b21278f8b61d3
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Remove cpu_hintp, cpu_htba, cpu_hver, cpu_ssr, cpu_ver
Use direct loads and stores to env instead.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 428881deba62aa8fd5ef9248deba79594f70615a
https://github.com/qemu/qemu/commit/428881deba62aa8fd5ef9248deba79594f70615a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move basic arithmetic to decodetree
Move ADD, AND, OR, XOR, SUB, ANDN, ORN, XORN.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 420a187d8065288cc77bac4f1979b23da97afb94
https://github.com/qemu/qemu/commit/420a187d8065288cc77bac4f1979b23da97afb94
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move ADDC to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 22188d7da819bd07e64f4179417e47dd6555ec29
https://github.com/qemu/qemu/commit/22188d7da819bd07e64f4179417e47dd6555ec29
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move MULX to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: b5372650e2a0d10102124813f7616a78a2370327
https://github.com/qemu/qemu/commit/b5372650e2a0d10102124813f7616a78a2370327
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move UMUL, SMUL to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: dfebb950da13e61e1277e6773ae43a7d8f2d2193
https://github.com/qemu/qemu/commit/dfebb950da13e61e1277e6773ae43a7d8f2d2193
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move SUBC to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 4ee85ea94bc3c6f34231590467ac7988386913e9
https://github.com/qemu/qemu/commit/4ee85ea94bc3c6f34231590467ac7988386913e9
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move UDIVX, SDIVX to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: c26368532dca4670aa55fcecc9c7fb100cc30319
https://github.com/qemu/qemu/commit/c26368532dca4670aa55fcecc9c7fb100cc30319
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/helper.c
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move UDIV, SDIV to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: a9aba13dae346cc84391b06c620c6d41b09eb53c
https://github.com/qemu/qemu/commit/a9aba13dae346cc84391b06c620c6d41b09eb53c
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/helper.c
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move TADD, TSUB, MULS to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 5fc546ee3559ae4655e440c3f92f933c6854ca5f
https://github.com/qemu/qemu/commit/5fc546ee3559ae4655e440c3f92f933c6854ca5f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move SLL, SRL, SRA to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: fb4ed7aad4a5e351e3c4478d576e04605cacb264
https://github.com/qemu/qemu/commit/fb4ed7aad4a5e351e3c4478d576e04605cacb264
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move MOVcc, MOVR to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 9c6ec5bcadc24927eef182bf63a333c153bf9a5d
https://github.com/qemu/qemu/commit/9c6ec5bcadc24927eef182bf63a333c153bf9a5d
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move POPC to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d3c7e8ad74be9b728fb6eae8c6aa18c0a94a3ebb
https://github.com/qemu/qemu/commit/d3c7e8ad74be9b728fb6eae8c6aa18c0a94a3ebb
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Convert remaining v8 coproc insns to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 86b82fe021f46ed4501b16132f7e3fccd0a1ad5d
https://github.com/qemu/qemu/commit/86b82fe021f46ed4501b16132f7e3fccd0a1ad5d
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move JMPL, RETT, RETURN to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d38258003138a42b0aaaf0e1053c7925e54a1635
https://github.com/qemu/qemu/commit/d38258003138a42b0aaaf0e1053c7925e54a1635
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move FLUSH, SAVE, RESTORE to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 8f75b8a4eb7902b786a8c683e05bdd3adc9da5e5
https://github.com/qemu/qemu/commit/8f75b8a4eb7902b786a8c683e05bdd3adc9da5e5
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move DONE, RETRY to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 811cc0b0ceb453d50305e9e5a4e646aa868ef971
https://github.com/qemu/qemu/commit/811cc0b0ceb453d50305e9e5a4e646aa868ef971
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Split out resolve_asi
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: a76779ee3b1291b2e29a04229299545a0348160f
https://github.com/qemu/qemu/commit/a76779ee3b1291b2e29a04229299545a0348160f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Drop ifdef around get_asi and friends
Mark some of the functions as unused, temporarily.
Fix up some tl vs i64 issues revealed in the process.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: c03a0fd15cb0cd694240a68964be630dd3232aca
https://github.com/qemu/qemu/commit/c03a0fd15cb0cd694240a68964be630dd3232aca
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Split out ldst functions with asi pre-computed
As an intermediate step in decodetree conversion, create
new functions passing in DisasASI and not insn.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ebbbec921645d91dcb99bb59d817ede0bcbb4e45
https://github.com/qemu/qemu/commit/ebbbec921645d91dcb99bb59d817ede0bcbb4e45
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Use tcg_gen_qemu_{ld,st}_i128 for GET_ASI_DTWINX
Perform one atomic 16-byte operation.
The atomicity is required for the LDTXA instructions.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 0880d20b2e3dffad6dfd95a8597ca0da86295bea
https://github.com/qemu/qemu/commit/0880d20b2e3dffad6dfd95a8597ca0da86295bea
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move simple integer load/store to decodetree
Move LDUW, LDUB, LDUH, LDD, LDSW, LDSB, LDSH, LDX,
STW, STB, STH, STD, STX.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 42071fc16d0a26f710897e2be1e6962c7c883a8b
https://github.com/qemu/qemu/commit/42071fc16d0a26f710897e2be1e6962c7c883a8b
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move asi integer load/store to decodetree
Move LDDA, LDSBA, LDSHA, LDSWA, LDUBA, LDUHA, LDUWA, LDXA,
STBA, STDA, STHA, STWA, STXA.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: cf07cd1e68b85b39d084714e50ad78b4053e5eef
https://github.com/qemu/qemu/commit/cf07cd1e68b85b39d084714e50ad78b4053e5eef
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move LDSTUB, LDSTUBA to decodetree
Remove gen_ldstub_asi.
Rename gen_ldstub_asi0 to gen_ldstub_asi.
Merge gen_ldstub into gen_ldstub_asi.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: dca544b991f21319f522efa7c2881e2944481154
https://github.com/qemu/qemu/commit/dca544b991f21319f522efa7c2881e2944481154
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move SWAP, SWAPA to decodetree
Remove gen_swap_asi.
Rename gen_swap_asi0 to gen_swap_asi.
Merge gen_swap into gen_swap_asi.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d0a11d25f0332dbaeb3a4f733a5cfb23ed40413d
https://github.com/qemu/qemu/commit/d0a11d25f0332dbaeb3a4f733a5cfb23ed40413d
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move CASA, CASXA to decodetree
Remove gen_cas_asi, gen_casx_asi.
Rename gen_cas_asi0 to gen_cas_asi.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 5458fd3153b24609c8862c995f2aff86e70a67e4
https://github.com/qemu/qemu/commit/5458fd3153b24609c8862c995f2aff86e70a67e4
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move PREFETCH, PREFETCHA to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 3259b9e2fd4b3d92b61159aa65f5b515bf573c4f
https://github.com/qemu/qemu/commit/3259b9e2fd4b3d92b61159aa65f5b515bf573c4f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Split out fp ldst functions with asi precomputed
Take the operation size from the MemOp instead of a
separate parameter.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 06c060d9e5bad5c5317cb158fcce2e2ae3f942a8
https://github.com/qemu/qemu/commit/06c060d9e5bad5c5317cb158fcce2e2ae3f942a8
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move simple fp load/store to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 287b11520bd4dafd58e42ccff7010f8c4bbafcf9
https://github.com/qemu/qemu/commit/287b11520bd4dafd58e42ccff7010f8c4bbafcf9
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move asi fp load/store to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 3d3c06737b27c07181740e9f696dcbe25b9e8e19
https://github.com/qemu/qemu/commit/3d3c06737b27c07181740e9f696dcbe25b9e8e19
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move LDFSR, STFSR to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: da6814060456c27ae6966d711a8a85782a21a092
https://github.com/qemu/qemu/commit/da6814060456c27ae6966d711a8a85782a21a092
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/fop_helper.c
M target/sparc/helper.h
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Merge LDFSR, LDXFSR implementations
Combine the helper to a single set_fsr().
Perform the mask and merge inline.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: b88ce6f246f40fd293803562ac60f29ff1ce9f6f
https://github.com/qemu/qemu/commit/b88ce6f246f40fd293803562ac60f29ff1ce9f6f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move EDGE* to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 45bfed3b2c2eb723723865d58e40840fe9778e95
https://github.com/qemu/qemu/commit/45bfed3b2c2eb723723865d58e40840fe9778e95
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move ARRAY* to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 9e20ca9409a24763c98eff4c934292e35266496e
https://github.com/qemu/qemu/commit/9e20ca9409a24763c98eff4c934292e35266496e
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move ADDRALIGN* to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 39ca3490f85fa88ec8f3a1954dbc0c4bb96830a0
https://github.com/qemu/qemu/commit/39ca3490f85fa88ec8f3a1954dbc0c4bb96830a0
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move BMASK to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: baf3dbf25866bce36572f43040660989a4e6ad42
https://github.com/qemu/qemu/commit/baf3dbf25866bce36572f43040660989a4e6ad42
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move FMOVS, FNEGS, FABSS, FSRC*S, FNOT*S to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: c6d83e4ff50bc816c5c7fb7df1f5c87bf2315fff
https://github.com/qemu/qemu/commit/c6d83e4ff50bc816c5c7fb7df1f5c87bf2315fff
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move FMOVD, FNEGD, FABSD, FSRC*D, FNOT*D to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: fafba1bb0b1c37e668c0ac89477dfb84a5fb8ae4
https://github.com/qemu/qemu/commit/fafba1bb0b1c37e668c0ac89477dfb84a5fb8ae4
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/helper.h
M target/sparc/translate.c
M target/sparc/vis_helper.c
Log Message:
-----------
target/sparc: Use tcg_gen_vec_{add,sub}*
Replace the local helpers for the same integer operations.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 7f10b52f7b238d4ef1a6e5d4740604e07631a6c4
https://github.com/qemu/qemu/commit/7f10b52f7b238d4ef1a6e5d4740604e07631a6c4
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move gen_ne_fop_FFF insns to decodetree
Move FANDNOT1s, FANDNOT2s, FANDs, FNANDs, FNORs, FORNOT1s, FORNOT2s,
FORs, FPADD16s, FPADD32s, FPSUB16s, FPSUB32s, FXNORs, FXORs.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e06c9f83c6e9d1fdad371fa5aa41eaa6fa7f8f67
https://github.com/qemu/qemu/commit/e06c9f83c6e9d1fdad371fa5aa41eaa6fa7f8f67
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move gen_ne_fop_DDD insns to decodetree
Move FMUL8x16, FMUL8x16AU, FMUL8x16AL, FMUL8SUx16, FMUL8ULx16,
FMULD8SUx16, FMULD8ULx16, FPMERGE, FEXPAND, FANDNOT1d, FANDNOT2d,
FANDd, FNANDd, FNORd, FORNOT1d, FORNOT2d, FORd, FPADD16d, FPADD32d,
FPSUB16d, FPSUB32d, FXNORd, FXORd.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: afb043448bf563b3720b55cf494fad943c0aad35
https://github.com/qemu/qemu/commit/afb043448bf563b3720b55cf494fad943c0aad35
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move PDIST to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 4b6edc0a2799300e4958a94534592de1c0671093
https://github.com/qemu/qemu/commit/4b6edc0a2799300e4958a94534592de1c0671093
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move gen_gsr_fop_DDD insns to decodetree
Move FPACK32, FALIGNDATA, BSHUFFLE.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 119cb94f69e2180f1a8685b53a0659f195bdd90c
https://github.com/qemu/qemu/commit/119cb94f69e2180f1a8685b53a0659f195bdd90c
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move gen_fop_FF insns to decodetree
Move FSQRTs, FiTOs, FsTOi.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 8aa418b3ef1b261757408642385dd8fd62bffb36
https://github.com/qemu/qemu/commit/8aa418b3ef1b261757408642385dd8fd62bffb36
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move gen_fop_DD insns to decodetree
Move FSQRTd, FxTOd, FdTOx.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: c995216bab4d5ef573d89659fc7704aacd9d404a
https://github.com/qemu/qemu/commit/c995216bab4d5ef573d89659fc7704aacd9d404a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move FSQRTq to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: c1514961e6bca738eab6a72559267a30e15aa816
https://github.com/qemu/qemu/commit/c1514961e6bca738eab6a72559267a30e15aa816
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move gen_fop_FFF insns to decodetree
Move FADDs, FSUBs, FMULs, FDIVs.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: f2a59b0ad7d2e3252e6edaf0999a5a1ae48da2a0
https://github.com/qemu/qemu/commit/f2a59b0ad7d2e3252e6edaf0999a5a1ae48da2a0
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move gen_fop_DDD insns to decodetree
Move FADDd, FSUBd, FMULd, FDIVd.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: a405623991f4dc8ca9298da89453033f910d9efc
https://github.com/qemu/qemu/commit/a405623991f4dc8ca9298da89453033f910d9efc
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move gen_fop_QQQ insns to decodetree
Move FADDq, FSUBq, FMULq, FDIVq.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ff4c711b8d01608c4589cead0e2f650588d4b804
https://github.com/qemu/qemu/commit/ff4c711b8d01608c4589cead0e2f650588d4b804
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move FSMULD to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 5e3b17bbe9cc49c67d68f4a676113361944c8709
https://github.com/qemu/qemu/commit/5e3b17bbe9cc49c67d68f4a676113361944c8709
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move FDMULQ to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 8c94bcd8507afd3f492d4b0dd7aefe5aaa9aab9a
https://github.com/qemu/qemu/commit/8c94bcd8507afd3f492d4b0dd7aefe5aaa9aab9a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move gen_fop_FD insns to decodetree
Move FdTOs, FdTOi, FxTOs.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 199d43efb176793d5e052947707285bcb49e6f82
https://github.com/qemu/qemu/commit/199d43efb176793d5e052947707285bcb49e6f82
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move FiTOd, FsTOd, FsTOx to decodetree
Note that gen_ne_fop_DF was incorrectly named and does pass env.
The two sets of helpers should have been unified.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: bd9c5c428f89db6805c83e0f98ec9089b9279f1b
https://github.com/qemu/qemu/commit/bd9c5c428f89db6805c83e0f98ec9089b9279f1b
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move FqTOs, FqTOi to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 1617586f5ab748518fc34ce592ea187d8bd208ee
https://github.com/qemu/qemu/commit/1617586f5ab748518fc34ce592ea187d8bd208ee
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move FqTOd, FqTOx to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 13ebcc77491f80a3f339a21ab4902d7452d64192
https://github.com/qemu/qemu/commit/13ebcc77491f80a3f339a21ab4902d7452d64192
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move FiTOq, FsTOq to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 7b8e3e1a8730d69e75b269dec4ca5289ebf12533
https://github.com/qemu/qemu/commit/7b8e3e1a8730d69e75b269dec4ca5289ebf12533
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move FdTOq, FxTOq to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: f4e18df5769c7921005357e278d81ed8f990e2c0
https://github.com/qemu/qemu/commit/f4e18df5769c7921005357e278d81ed8f990e2c0
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move FMOVq, FNEGq, FABSq to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: f7ec8155f5714df29af2596b2468dd597c137256
https://github.com/qemu/qemu/commit/f7ec8155f5714df29af2596b2468dd597c137256
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move FMOVR, FMOVcc, FMOVfcc to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 40f9ad219bb991b50318836612b7331f35c7bb3b
https://github.com/qemu/qemu/commit/40f9ad219bb991b50318836612b7331f35c7bb3b
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Convert FCMP, FCMPE to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e2fa6bd1ad7c2167e628ac49208b52843fca2c1f
https://github.com/qemu/qemu/commit/e2fa6bd1ad7c2167e628ac49208b52843fca2c1f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move FPCMP* to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 2f72264169c2b9c94622a609fdc28c5d7ad77614
https://github.com/qemu/qemu/commit/2f72264169c2b9c94622a609fdc28c5d7ad77614
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Move FPACK16, FPACKFIX to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 3a38260e3caf9e14cb4065253ceb942c29fb77f4
https://github.com/qemu/qemu/commit/3a38260e3caf9e14cb4065253ceb942c29fb77f4
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Convert FZERO, FONE to decodetree
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ba9c09b40b8e19ec50955216b61875d64042fa99
https://github.com/qemu/qemu/commit/ba9c09b40b8e19ec50955216b61875d64042fa99
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Remove disas_sparc_legacy
All instructions are now converted.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 45b5933f7afb055080e915c83663f3a4709a02db
https://github.com/qemu/qemu/commit/45b5933f7afb055080e915c83663f3a4709a02db
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M tests/tcg/i386/test-avx.c
Log Message:
-----------
tests/tcg: fix out-of-bounds access in test-avx
This can cause differences between native and QEMU execution, due
to ASLR.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: e582b629f0b50c10137ba47c4ca7fe30b3357e3d
https://github.com/qemu/qemu/commit/e582b629f0b50c10137ba47c4ca7fe30b3357e3d
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/i386/cpu.c
M target/i386/ops_sse.h
M target/i386/tcg/decode-new.c.inc
M target/i386/tcg/decode-new.h
M target/i386/tcg/emit.c.inc
M target/i386/tcg/ops_sse_header.h.inc
Log Message:
-----------
target/i386: implement SHA instructions
The implementation was validated with OpenSSL and with the test vectors in
https://github.com/rust-lang/stdarch/blob/master/crates/core_arch/src/x86/sha.rs.
The instructions provide a ~25% improvement on hashing a 64 MiB file:
runtime goes down from 1.8 seconds to 1.4 seconds; instruction count on
the host goes down from 5.8 billion to 4.8 billion with slightly better
IPC too. Good job Intel. ;)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: 05a0a100a5e37716c11995532c0b249214846462
https://github.com/qemu/qemu/commit/05a0a100a5e37716c11995532c0b249214846462
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M tests/tcg/i386/test-avx.c
Log Message:
-----------
tests/tcg/i386: initialize more registers in test-avx
Some instructions use YMM0 implicitly, or use YMM9 as a read-modify-write
register destination. Initialize those registers as well.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: 48adb240498de5f628631ba7c713a4ccd0cda358
https://github.com/qemu/qemu/commit/48adb240498de5f628631ba7c713a4ccd0cda358
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M tests/tcg/i386/test-avx.py
Log Message:
-----------
tests/tcg/i386: test-avx: add test cases for SHA new instructions
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: 183e6679e39fb5bcc17dbebaf668c1e83d8e57ee
https://github.com/qemu/qemu/commit/183e6679e39fb5bcc17dbebaf668c1e83d8e57ee
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/i386/tcg/decode-new.c.inc
M target/i386/tcg/decode-new.h
M target/i386/tcg/emit.c.inc
Log Message:
-----------
target/i386: group common checks in the decoding phase
In preparation for adding more similar checks, move the VEX.L=0 check
and several X86_SPECIAL_* checks to a new field, where each bit represent
a common check on unused bits, or a restriction on the processor mode.
Likewise, many SVM intercepts can be checked during the decoding phase,
the main exception being the selective CR0 write, MSR and IOIO intercepts.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: e000687f1266d031528758271d0b16e288394ede
https://github.com/qemu/qemu/commit/e000687f1266d031528758271d0b16e288394ede
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/i386/tcg/decode-new.c.inc
M target/i386/tcg/decode-new.h
Log Message:
-----------
target/i386: validate VEX.W for AVX instructions
Instructions in VEX exception class 6 generally look at the value of
VEX.W. Note that the manual places some instructions incorrectly in
class 4, for example VPERMQ which has no non-VEX encoding and no legacy
SSE analogue. AMD does a mess of its own, as documented in the comment
that this patch adds.
Most of them are checked for VEX.W=0, and are listed in the manual
(though with an omission) in table 2-16; VPERMQ and VPERMPD check for
VEX.W=1, which is only listed in the instruction description. Others,
such as VPSRLV, VPSLLV and the FMA3 instructions, use VEX.W to switch
between a 32-bit and 64-bit operation.
Fix more of the class 4/class 6 mismatches, and implement the check for
VEX.W in TCG.
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: d83005424774fcfb85aec76effac169cadb375fd
https://github.com/qemu/qemu/commit/d83005424774fcfb85aec76effac169cadb375fd
Author: Ani Sinha <anisinha@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/i386/cpu.c
Log Message:
-----------
target/i386: check CPUID_PAE to determine 36 bit processor address space
PAE mode in x86 supports 36 bit address space. Check the PAE CPUID on the
guest processor and set phys_bits to 36 if PAE feature is set. This is in
addition to checking the presence of PSE36 CPUID feature for setting 36 bit
phys_bits.
Signed-off-by: Ani Sinha <anisinha@redhat.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-ID: <20230912120650.371781-1-anisinha@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: cd08948840c029ca537e414e27b575536dff5956
https://github.com/qemu/qemu/commit/cd08948840c029ca537e414e27b575536dff5956
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M accel/stubs/kvm-stub.c
Log Message:
-----------
kvm: remove unnecessary stub
This function is only invoked from hw/intc/s390_flic_kvm.c, and therefore
only if CONFIG_KVM is defined.
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: aacec9aee11660471ca56afaaafe3f1fdcf431ab
https://github.com/qemu/qemu/commit/aacec9aee11660471ca56afaaafe3f1fdcf431ab
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M accel/kvm/kvm-all.c
Log Message:
-----------
kvm: require KVM_CAP_INTERNAL_ERROR_DATA
This was introduced in KVM in Linux 2.6.33, we can require it unconditionally.
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: cc5e719e2c8086c61bdd9114f42095f8d5b1b0db
https://github.com/qemu/qemu/commit/cc5e719e2c8086c61bdd9114f42095f8d5b1b0db
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M accel/kvm/kvm-all.c
M accel/stubs/kvm-stub.c
M hw/intc/arm_gicv3_its_common.c
M include/sysemu/kvm.h
M include/sysemu/kvm_int.h
M target/i386/kvm/kvm.c
Log Message:
-----------
kvm: require KVM_CAP_SIGNAL_MSI
This was introduced in KVM in Linux 3.5, we can require it unconditionally
in kvm_irqchip_send_msi(). However, not all architectures have to implement
it so check it only in x86, the only architecture that ever had MSI injection
but not KVM_CAP_SIGNAL_MSI.
ARM uses it to detect the presence of the ITS emulation in the kernel,
introduced in Linux 4.8. Assume that it's there and possibly fail when
realizing the arm-its-kvm device.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: a788260b2000f1fe826885c06f2a34df1c5b335c
https://github.com/qemu/qemu/commit/a788260b2000f1fe826885c06f2a34df1c5b335c
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M accel/kvm/kvm-all.c
M accel/stubs/kvm-stub.c
M hw/intc/arm_gicv3_its_kvm.c
M include/sysemu/kvm.h
M target/riscv/kvm/kvm-cpu.c
Log Message:
-----------
kvm: require KVM_IRQFD for kernel irqchip
KVM_IRQFD was introduced in Linux 2.6.32, and since then it has always been
available on architectures that support an in-kernel interrupt controller.
We can require it unconditionally.
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: f8c0687fe364355ee35896e97fec89b61220340a
https://github.com/qemu/qemu/commit/f8c0687fe364355ee35896e97fec89b61220340a
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M include/sysemu/kvm.h
Log Message:
-----------
kvm: require KVM_IRQFD for kernel irqchip
KVM_IRQFD was introduced in Linux 2.6.32, and since then it has always been
available on architectures that support an in-kernel interrupt controller.
We can require it unconditionally.
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: d19fe67ba86f60cf7b7de9306475fe90f5ac648f
https://github.com/qemu/qemu/commit/d19fe67ba86f60cf7b7de9306475fe90f5ac648f
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M accel/kvm/kvm-all.c
M include/sysemu/kvm.h
M include/sysemu/kvm_int.h
Log Message:
-----------
kvm: drop reference to KVM_CAP_PCI_2_3
This is a remnant of pre-VFIO device assignment; it is not defined
anymore by Linux and not used by QEMU.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: 5d9ec1f4c78ed25720b4fd01ddcddb00db50fa6c
https://github.com/qemu/qemu/commit/5d9ec1f4c78ed25720b4fd01ddcddb00db50fa6c
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M accel/kvm/kvm-all.c
M accel/stubs/kvm-stub.c
M hw/virtio/virtio-pci.c
M include/sysemu/kvm.h
M include/sysemu/kvm_int.h
Log Message:
-----------
kvm: assume that many ioeventfds can be created
NR_IOBUS_DEVS was increased to 200 in Linux 2.6.34. By Linux 3.5 it had
increased to 1000 and later ioeventfds were changed to not count against
the limit. But the earlier limit of 200 would already be enough for
kvm_check_many_ioeventfds() to be true, so remove the check.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: 126e7f780367b0263d9a112729736d6a0bd6d441
https://github.com/qemu/qemu/commit/126e7f780367b0263d9a112729736d6a0bd6d441
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M accel/kvm/kvm-all.c
M accel/stubs/kvm-stub.c
M hw/misc/pci-testdev.c
M hw/s390x/virtio-ccw.c
M hw/virtio/vhost-user.c
M hw/virtio/virtio-mmio.c
M hw/virtio/virtio-pci.c
M include/sysemu/kvm.h
M system/memory.c
Log Message:
-----------
kvm: require KVM_CAP_IOEVENTFD and KVM_CAP_IOEVENTFD_ANY_LENGTH
KVM_CAP_IOEVENTFD_ANY_LENGTH was added in Linux 4.4, released in 2016.
Assume that it is present.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: 2cb81af0b1add4fa4f3582a913e0f8aaf1e77eb8
https://github.com/qemu/qemu/commit/2cb81af0b1add4fa4f3582a913e0f8aaf1e77eb8
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M accel/kvm/kvm-all.c
Log Message:
-----------
kvm: unify listeners for PIO address space
Since we now assume that ioeventfds are present, kvm_io_listener is always
registered. Merge it with kvm_coalesced_pio_listener in a single
listener. Since PIO space does not have KVM memslots attached to it,
the priority is irrelevant.
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: 4b2991666c52de1c708226cd0c022869e802aa26
https://github.com/qemu/qemu/commit/4b2991666c52de1c708226cd0c022869e802aa26
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/i386/kvm/kvm.c
Log Message:
-----------
kvm: i386: move KVM_CAP_IRQ_ROUTING detection to
kvm_arch_required_capabilities
Simple code cleanup.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: f57a4dd31154e9c054fe75d4ab27829033720a8d
https://github.com/qemu/qemu/commit/f57a4dd31154e9c054fe75d4ab27829033720a8d
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M accel/kvm/kvm-all.c
M include/sysemu/kvm.h
M include/sysemu/kvm_int.h
M target/i386/kvm/kvm.c
Log Message:
-----------
kvm: i386: require KVM_CAP_DEBUGREGS
This was introduced in KVM in Linux 2.6.35, we can require it unconditionally.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: 8bba0a3b768de8d65e91afaff2fa6817e465be21
https://github.com/qemu/qemu/commit/8bba0a3b768de8d65e91afaff2fa6817e465be21
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/i386/kvm/kvm.c
Log Message:
-----------
kvm: i386: require KVM_CAP_XSAVE
This was introduced in KVM in Linux 2.6.36, and could already be used at
the time to save/restore FPU data even on older processor. We can require
it unconditionally and stop using KVM_GET/SET_FPU.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: 1a44a79ddf6474587719eff269fd7bacf98817c8
https://github.com/qemu/qemu/commit/1a44a79ddf6474587719eff269fd7bacf98817c8
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M accel/kvm/kvm-all.c
M include/sysemu/kvm.h
M include/sysemu/kvm_int.h
M target/i386/kvm/kvm.c
Log Message:
-----------
kvm: i386: require KVM_CAP_SET_VCPU_EVENTS and KVM_CAP_X86_ROBUST_SINGLESTEP
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: 86f2438fc231666ad7fdf9560fc8f27eedd69252
https://github.com/qemu/qemu/commit/86f2438fc231666ad7fdf9560fc8f27eedd69252
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/i386/kvm/kvm.c
Log Message:
-----------
kvm: i386: require KVM_CAP_MCE
This was introduced in KVM in Linux 2.6.34, we can require it unconditionally.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: 700766ba602330a4fc907254a2f45773a6c694fa
https://github.com/qemu/qemu/commit/700766ba602330a4fc907254a2f45773a6c694fa
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M hw/i386/kvm/clock.c
M target/i386/kvm/kvm.c
M target/i386/kvm/kvm_i386.h
Log Message:
-----------
kvm: i386: require KVM_CAP_ADJUST_CLOCK
This was introduced in KVM in Linux 2.6.33, we can require it
unconditionally. KVM_CLOCK_TSC_STABLE was only added in Linux 4.9,
for now do not require it (though it would allow the removal of some
pretty yucky code).
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: 52b04ea49d3c4da73828aaf66dab234301428912
https://github.com/qemu/qemu/commit/52b04ea49d3c4da73828aaf66dab234301428912
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M target/i386/kvm/kvm.c
Log Message:
-----------
kvm: i386: require KVM_CAP_SET_IDENTITY_MAP_ADDR
This was introduced in KVM in Linux 2.6.32, we can require it unconditionally.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: 39dd3e1f55a70f568cc9d280f67467aa4e8a63bd
https://github.com/qemu/qemu/commit/39dd3e1f55a70f568cc9d280f67467aa4e8a63bd
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-25 (Wed, 25 Oct 2023)
Changed paths:
M hw/i386/kvm/i8254.c
M hw/i386/pc.c
M target/i386/kvm/kvm.c
M target/i386/kvm/kvm_i386.h
Log Message:
-----------
kvm: i8254: require KVM_CAP_PIT2 and KVM_CAP_PIT_STATE2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Commit: c1bfe74c76dfe1aee6175959dcbb1a5b763ad4e5
https://github.com/qemu/qemu/commit/c1bfe74c76dfe1aee6175959dcbb1a5b763ad4e5
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-10-27 (Fri, 27 Oct 2023)
Changed paths:
M MAINTAINERS
M hw/arm/aspeed.c
M hw/arm/aspeed_ast10x0.c
A hw/arm/aspeed_ast2400.c
M hw/arm/aspeed_ast2600.c
R hw/arm/aspeed_soc.c
A hw/arm/aspeed_soc_common.c
M hw/arm/fby35.c
M hw/arm/meson.build
M include/hw/arm/aspeed_soc.h
Log Message:
-----------
Merge tag 'pull-aspeed-20231025' of https://github.com/legoater/qemu into
staging
aspeed queue:
* Update of Andrew's email
* Split of AspeedSoCState per 2400/2600/10x0
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# gpg: Signature made Wed 25 Oct 2023 17:54:45 JST
# gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [unknown]
# gpg: aka "Cédric Le Goater <clg@kaod.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1
* tag 'pull-aspeed-20231025' of https://github.com/legoater/qemu:
hw/arm/aspeed: Move AspeedSoCState::cpu/vic to Aspeed2400SoCState
hw/arm/aspeed: Move AspeedSoCState::a7mpcore to Aspeed2600SoCState
hw/arm/aspeed: Move AspeedSoCState::armv7m to Aspeed10x0SoCState
hw/arm/aspeed: Check 'memory' link is set in common aspeed_soc_realize
hw/arm/aspeed: Introduce TYPE_ASPEED2400_SOC
hw/arm/aspeed: Introduce TYPE_ASPEED2600_SOC
hw/arm/aspeed: Introduce TYPE_ASPEED10X0_SOC
hw/arm/aspeed: Dynamically allocate AspeedMachineState::soc field
hw/arm/aspeed: Rename aspeed_soc_realize() as AST2400/2500 specific
hw/arm/aspeed: Rename aspeed_soc_init() as AST2400/2500 specific
hw/arm/aspeed: Extract code common to all boards to a common file
MAINTAINERS: aspeed: Update Andrew's email address
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Commit: 3c95fd4ed8952abea0090b3e7751903c5e0cfef6
https://github.com/qemu/qemu/commit/3c95fd4ed8952abea0090b3e7751903c5e0cfef6
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-10-27 (Fri, 27 Oct 2023)
Changed paths:
M accel/kvm/kvm-all.c
M accel/stubs/kvm-stub.c
M hw/i386/kvm/clock.c
M hw/i386/kvm/i8254.c
M hw/i386/pc.c
M hw/intc/arm_gicv3_its_common.c
M hw/intc/arm_gicv3_its_kvm.c
M hw/misc/pci-testdev.c
M hw/s390x/virtio-ccw.c
M hw/virtio/vhost-user.c
M hw/virtio/virtio-mmio.c
M hw/virtio/virtio-pci.c
M include/sysemu/kvm.h
M include/sysemu/kvm_int.h
M system/memory.c
M target/i386/cpu.c
M target/i386/kvm/kvm.c
M target/i386/kvm/kvm_i386.h
M target/i386/ops_sse.h
M target/i386/tcg/decode-new.c.inc
M target/i386/tcg/decode-new.h
M target/i386/tcg/emit.c.inc
M target/i386/tcg/ops_sse_header.h.inc
M target/riscv/kvm/kvm-cpu.c
M tests/tcg/i386/test-avx.c
M tests/tcg/i386/test-avx.py
Log Message:
-----------
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* target/i386: implement SHA instructions
* target/i386: check CPUID_PAE to determine 36 bit processor address space
* target/i386: improve validation of AVX instructions
* require Linux 4.4 for KVM
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# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 26 Oct 2023 02:53:50 JST
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (24 commits)
kvm: i8254: require KVM_CAP_PIT2 and KVM_CAP_PIT_STATE2
kvm: i386: require KVM_CAP_SET_IDENTITY_MAP_ADDR
kvm: i386: require KVM_CAP_ADJUST_CLOCK
kvm: i386: require KVM_CAP_MCE
kvm: i386: require KVM_CAP_SET_VCPU_EVENTS and KVM_CAP_X86_ROBUST_SINGLESTEP
kvm: i386: require KVM_CAP_XSAVE
kvm: i386: require KVM_CAP_DEBUGREGS
kvm: i386: move KVM_CAP_IRQ_ROUTING detection to
kvm_arch_required_capabilities
kvm: unify listeners for PIO address space
kvm: require KVM_CAP_IOEVENTFD and KVM_CAP_IOEVENTFD_ANY_LENGTH
kvm: assume that many ioeventfds can be created
kvm: drop reference to KVM_CAP_PCI_2_3
kvm: require KVM_IRQFD for kernel irqchip
kvm: require KVM_IRQFD for kernel irqchip
kvm: require KVM_CAP_SIGNAL_MSI
kvm: require KVM_CAP_INTERNAL_ERROR_DATA
kvm: remove unnecessary stub
target/i386: check CPUID_PAE to determine 36 bit processor address space
target/i386: validate VEX.W for AVX instructions
target/i386: group common checks in the decoding phase
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Commit: c60be6e3e38cb36dc66129e757ec4b34152232be
https://github.com/qemu/qemu/commit/c60be6e3e38cb36dc66129e757ec4b34152232be
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-10-27 (Fri, 27 Oct 2023)
Changed paths:
M configs/targets/sparc-softmmu.mak
M configs/targets/sparc64-softmmu.mak
M linux-user/sparc/target_syscall.h
A target/sparc/cpu-feature.h.inc
M target/sparc/cpu.c
M target/sparc/cpu.h
M target/sparc/fop_helper.c
M target/sparc/helper.c
M target/sparc/helper.h
A target/sparc/insns.decode
M target/sparc/ldst_helper.c
M target/sparc/meson.build
M target/sparc/translate.c
M target/sparc/vis_helper.c
Log Message:
-----------
Merge tag 'pull-sp-20231025' of https://gitlab.com/rth7680/qemu into staging
Convert target/sparc to decodetree.
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# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 26 Oct 2023 09:12:16 JST
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
[full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-sp-20231025' of https://gitlab.com/rth7680/qemu: (94 commits)
target/sparc: Remove disas_sparc_legacy
target/sparc: Convert FZERO, FONE to decodetree
target/sparc: Move FPACK16, FPACKFIX to decodetree
target/sparc: Move FPCMP* to decodetree
target/sparc: Convert FCMP, FCMPE to decodetree
target/sparc: Move FMOVR, FMOVcc, FMOVfcc to decodetree
target/sparc: Move FMOVq, FNEGq, FABSq to decodetree
target/sparc: Move FdTOq, FxTOq to decodetree
target/sparc: Move FiTOq, FsTOq to decodetree
target/sparc: Move FqTOd, FqTOx to decodetree
target/sparc: Move FqTOs, FqTOi to decodetree
target/sparc: Move FiTOd, FsTOd, FsTOx to decodetree
target/sparc: Move gen_fop_FD insns to decodetree
target/sparc: Move FDMULQ to decodetree
target/sparc: Move FSMULD to decodetree
target/sparc: Move gen_fop_QQQ insns to decodetree
target/sparc: Move gen_fop_DDD insns to decodetree
target/sparc: Move gen_fop_FFF insns to decodetree
target/sparc: Move FSQRTq to decodetree
target/sparc: Move gen_fop_DD insns to decodetree
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Compare: https://github.com/qemu/qemu/compare/7dca816d3da5...c60be6e3e38c
- [Qemu-commits] [qemu/qemu] cbe27c: MAINTAINERS: aspeed: Update Andrew's email address,
Alex Bennée <=