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[Qemu-commits] [qemu/qemu] 0e6bff: vdpa: Use iovec for vhost_vdpa_net_cv
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From: |
Alex Bennée |
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Subject: |
[Qemu-commits] [qemu/qemu] 0e6bff: vdpa: Use iovec for vhost_vdpa_net_cvq_add() |
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Date: |
Mon, 23 Oct 2023 18:15:30 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 0e6bff0d43bf04c6e7a16c2775879816ca056b3d
https://github.com/qemu/qemu/commit/0e6bff0d43bf04c6e7a16c2775879816ca056b3d
Author: Hawkins Jiawei <yin31149@gmail.com>
Date: 2023-10-18 (Wed, 18 Oct 2023)
Changed paths:
M net/vhost-vdpa.c
Log Message:
-----------
vdpa: Use iovec for vhost_vdpa_net_cvq_add()
Next patches in this series will no longer perform an
immediate poll and check of the device's used buffers
for each CVQ state load command. Consequently, there
will be multiple pending buffers in the shadow VirtQueue,
making it a must for every control command to have its
own buffer.
To achieve this, this patch refactor vhost_vdpa_net_cvq_add()
to accept `struct iovec`, which eliminates the coupling of
control commands to `s->cvq_cmd_out_buffer` and `s->status`,
allowing them to use their own buffer.
Signed-off-by: Hawkins Jiawei <yin31149@gmail.com>
Acked-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id:
<8a328f146fb043f34edb75ba6d043d2d6de88f99.1697165821.git.yin31149@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 327dedb8df91f57ef917ab5b5db519146ee6f08b
https://github.com/qemu/qemu/commit/327dedb8df91f57ef917ab5b5db519146ee6f08b
Author: Hawkins Jiawei <yin31149@gmail.com>
Date: 2023-10-18 (Wed, 18 Oct 2023)
Changed paths:
M net/vhost-vdpa.c
Log Message:
-----------
vdpa: Avoid using vhost_vdpa_net_load_*() outside vhost_vdpa_net_load()
Next patches in this series will refactor vhost_vdpa_net_load_cmd()
to iterate through the control commands shadow buffers, allowing QEMU
to send CVQ state load commands in parallel at device startup.
Considering that QEMU always forwards the CVQ command serialized
outside of vhost_vdpa_net_load(), it is more elegant to send the
CVQ commands directly without invoking vhost_vdpa_net_load_*() helpers.
Signed-off-by: Hawkins Jiawei <yin31149@gmail.com>
Acked-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id:
<254f0618efde7af7229ba4fdada667bb9d318991.1697165821.git.yin31149@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 24e59cfe0cb53416b06c2c117bc22ff22dc54df3
https://github.com/qemu/qemu/commit/24e59cfe0cb53416b06c2c117bc22ff22dc54df3
Author: Hawkins Jiawei <yin31149@gmail.com>
Date: 2023-10-18 (Wed, 18 Oct 2023)
Changed paths:
M net/vhost-vdpa.c
Log Message:
-----------
vdpa: Check device ack in vhost_vdpa_net_load_rx_mode()
Considering that vhost_vdpa_net_load_rx_mode() is only called
within vhost_vdpa_net_load_rx() now, this patch refactors
vhost_vdpa_net_load_rx_mode() to include a check for the
device's ack, simplifying the code and improving its maintainability.
Signed-off-by: Hawkins Jiawei <yin31149@gmail.com>
Acked-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id:
<68811d52f96ae12d68f0d67d996ac1642a623943.1697165821.git.yin31149@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: a864a3219d7e63569583d204c12bff2a0f90463e
https://github.com/qemu/qemu/commit/a864a3219d7e63569583d204c12bff2a0f90463e
Author: Hawkins Jiawei <yin31149@gmail.com>
Date: 2023-10-18 (Wed, 18 Oct 2023)
Changed paths:
M net/vhost-vdpa.c
Log Message:
-----------
vdpa: Move vhost_svq_poll() to the caller of vhost_vdpa_net_cvq_add()
This patch moves vhost_svq_poll() to the caller of
vhost_vdpa_net_cvq_add() and introduces a helper funtion.
By making this change, next patches in this series is
able to refactor vhost_vdpa_net_load_x() only to delay
the polling and checking process until either the SVQ
is full or control commands shadow buffers are full.
Signed-off-by: Hawkins Jiawei <yin31149@gmail.com>
Message-Id:
<196cadb55175a75275660c6634a538289f027ae3.1697165821.git.yin31149@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 1d7e2a8fd4996fdb20d74fce41fe897311f3b06a
https://github.com/qemu/qemu/commit/1d7e2a8fd4996fdb20d74fce41fe897311f3b06a
Author: Hawkins Jiawei <yin31149@gmail.com>
Date: 2023-10-18 (Wed, 18 Oct 2023)
Changed paths:
M net/vhost-vdpa.c
Log Message:
-----------
vdpa: Introduce cursors to vhost_vdpa_net_loadx()
This patch introduces two new arugments, `out_cursor`
and `in_cursor`, to vhost_vdpa_net_loadx(). Addtionally,
it includes a helper function
vhost_vdpa_net_load_cursor_reset() for resetting these
cursors.
Furthermore, this patch refactors vhost_vdpa_net_load_cmd()
so that vhost_vdpa_net_load_cmd() prepares buffers
for the device using the cursors arguments, instead
of directly accesses `s->cvq_cmd_out_buffer` and
`s->status` fields.
By making these change, next patches in this series
can refactor vhost_vdpa_net_load_cmd() directly to
iterate through the control commands shadow buffers,
allowing QEMU to send CVQ state load commands in parallel
at device startup.
Signed-off-by: Hawkins Jiawei <yin31149@gmail.com>
Message-Id:
<1c6516e233a14cc222f0884e148e4e1adceda78d.1697165821.git.yin31149@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 99d6a32469debf1a48921125879b614d15acfb7a
https://github.com/qemu/qemu/commit/99d6a32469debf1a48921125879b614d15acfb7a
Author: Hawkins Jiawei <yin31149@gmail.com>
Date: 2023-10-18 (Wed, 18 Oct 2023)
Changed paths:
M hw/virtio/vhost-shadow-virtqueue.c
M hw/virtio/vhost-shadow-virtqueue.h
Log Message:
-----------
vhost: Expose vhost_svq_available_slots()
Next patches in this series will delay the polling
and checking of buffers until either the SVQ is
full or control commands shadow buffers are full,
no longer perform an immediate poll and check of
the device's used buffers for each CVQ state load command.
To achieve this, this patch exposes
vhost_svq_available_slots(), allowing QEMU to know
whether the SVQ is full.
Signed-off-by: Hawkins Jiawei <yin31149@gmail.com>
Acked-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id:
<25938079f0bd8185fd664c64e205e629f7a966be.1697165821.git.yin31149@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: acec5f685c7ad6bd3c9bb9a57d4e509160480376
https://github.com/qemu/qemu/commit/acec5f685c7ad6bd3c9bb9a57d4e509160480376
Author: Hawkins Jiawei <yin31149@gmail.com>
Date: 2023-10-18 (Wed, 18 Oct 2023)
Changed paths:
M net/vhost-vdpa.c
Log Message:
-----------
vdpa: Send cvq state load commands in parallel
This patch enables sending CVQ state load commands
in parallel at device startup by following steps:
* Refactor vhost_vdpa_net_load_cmd() to iterate through
the control commands shadow buffers. This allows different
CVQ state load commands to use their own unique buffers.
* Delay the polling and checking of buffers until either
the SVQ is full or control commands shadow buffers are full.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1578
Signed-off-by: Hawkins Jiawei <yin31149@gmail.com>
Acked-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id:
<9350f32278e39f7bce297b8f2d82dac27c6f8c9a.1697165821.git.yin31149@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 8993351412de6a0b5e17b725141bfd8cb35c9e65
https://github.com/qemu/qemu/commit/8993351412de6a0b5e17b725141bfd8cb35c9e65
Author: Thomas Huth <thuth@redhat.com>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Extend entry to cover util/qemu-timer-common.c, too
We already cover util/qemu-timer.c in MAINTAINERS - change this entry
to util/qemu-timer*.c so that it covers util/qemu-timer-common.c, too.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231020062142.525405-1-thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 401766e043f25fd7cef111c53d701a2fc95d249f
https://github.com/qemu/qemu/commit/401766e043f25fd7cef111c53d701a2fc95d249f
Author: Akihiko Odaki <akihiko.odaki@daynix.com>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M util/cutils.c
Log Message:
-----------
cutils: Fix get_relocated_path on Windows
get_relocated_path() did not have error handling for PathCchSkipRoot()
because a path given to get_relocated_path() was expected to be a valid
path containing a drive letter or UNC server/share path elements on
Windows, but sometimes it turned out otherwise.
The paths passed to get_relocated_path() are defined by macros generated
by Meson. Meson in turn uses a prefix given by the configure script to
generate them. For Windows, the script passes /qemu as a prefix to
Meson by default.
As documented in docs/about/build-platforms.rst, typically MSYS2 is used
for the build system, but it is also possible to use Linux as well. When
MSYS2 is used, its Bash variant recognizes /qemu as a MSYS2 path, and
converts it to a Windows path, adding the MSYS2 prefix including a drive
letter or UNC server/share path elements. Such a conversion does not
happen on a shell on Linux however, and /qemu will be passed as is in
the case.
Implement a proper error handling of PathCchSkipRoot() in
get_relocated_path() so that it can handle a path without a drive letter
or UNC server/share path elements.
Reported-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231005064726.6945-1-akihiko.odaki@daynix.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: d3b88b9cf6872b4dd9dcc39efefbe6d937d04057
https://github.com/qemu/qemu/commit/d3b88b9cf6872b4dd9dcc39efefbe6d937d04057
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M meson.build
Log Message:
-----------
buildsys: Only display Objective-C information when Objective-C is used
When configuring with '--disable-cocoa --disable-coreaudio'
on Darwin, we get:
meson.build:4081:58: ERROR: Tried to access compiler for language "objc", not
specified for host machine.
meson.build:4097:47: ERROR: Tried to access unknown option 'objc_args'.
Instead of unconditionally display Objective-C informations
on Darwin, display them when Objective-C is discovered.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20231009093812.52915-1-philmd@linaro.org>
Commit: 85f3d509b2bed0d9d994fca70ebd3be010fca72b
https://github.com/qemu/qemu/commit/85f3d509b2bed0d9d994fca70ebd3be010fca72b
Author: Marc-André Lureau <marcandre.lureau@redhat.com>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M system/memory_mapping.c
Log Message:
-----------
memory: drop needless argument
The argument is unused since commit bdc44640c ("cpu: Use QTAILQ for CPU list").
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231009075231.150568-1-marcandre.lureau@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 1ff5f4d29456387eca09b171e3a46ffefa015733
https://github.com/qemu/qemu/commit/1ff5f4d29456387eca09b171e3a46ffefa015733
Author: Marc-André Lureau <marcandre.lureau@redhat.com>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/core/cpu-sysemu.c
M include/hw/core/cpu.h
M include/hw/core/sysemu-cpu-ops.h
M include/sysemu/memory_mapping.h
M system/memory_mapping.c
M target/i386/arch_memory_mapping.c
M target/i386/cpu.h
Log Message:
-----------
memory: follow Error API guidelines
Return true/false on success/failure.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231009075310.153617-1-marcandre.lureau@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: ae5f70baf549925080fcdbc6c1939c98a4a39246
https://github.com/qemu/qemu/commit/ae5f70baf549925080fcdbc6c1939c98a4a39246
Author: Lu Gao <lu.gao@verisilicon.com>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/sd/sdhci.c
Log Message:
-----------
hw/sd/sdhci: Block Size Register bits [14:12] is lost
Block Size Register bits [14:12] is SDMA Buffer Boundary, it is missed
in register write, but it is needed in SDMA transfer. e.g. it will be
used in sdhci_sdma_transfer_multi_blocks to calculate boundary_ variables.
Missing this field will cause wrong operation for different SDMA Buffer
Boundary settings.
Fixes: d7dfca0807 ("hw/sdhci: introduce standard SD host controller")
Fixes: dfba99f17f ("hw/sdhci: Fix DMA Transfer Block Size field")
Signed-off-by: Lu Gao <lu.gao@verisilicon.com>
Signed-off-by: Jianxian Wen <jianxian.wen@verisilicon.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-ID: <20220321055618.4026-1-lu.gao@verisilicon.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: faf026b2a22da1044baf7f1f3ab1280b2a448399
https://github.com/qemu/qemu/commit/faf026b2a22da1044baf7f1f3ab1280b2a448399
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/mips/malta.c
Log Message:
-----------
hw/mips/malta: Use sdram_type enum from 'hw/i2c/smbus_eeprom.h'
Since commit 93198b6cad ("i2c: Split smbus into parts") the SDRAM
types are enumerated as sdram_type in "hw/i2c/smbus_eeprom.h".
Using the enum removes this global shadow warning:
hw/mips/malta.c:209:12: error: declaration shadows a variable in the global
scope [-Werror,-Wshadow]
enum { SDR = 0x4, DDR2 = 0x8 } type;
^
include/hw/i2c/smbus_eeprom.h:33:19: note: previous declaration is here
enum sdram_type { SDR = 0x4, DDR = 0x7, DDR2 = 0x8 };
^
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231009092127.49778-1-philmd@linaro.org>
Commit: 2d4651641f611d2a4b5457ec25e39f2a0de953b4
https://github.com/qemu/qemu/commit/2d4651641f611d2a4b5457ec25e39f2a0de953b4
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/mips/cps.c
M hw/mips/fuloong2e.c
M hw/mips/jazz.c
M hw/mips/loongson3_virt.c
M hw/mips/malta.c
M hw/mips/mips_int.c
M hw/mips/mipssim.c
R include/hw/mips/cpudevs.h
M target/mips/cpu.h
M target/mips/sysemu/cp0_timer.c
M target/mips/tcg/sysemu/tlb_helper.c
Log Message:
-----------
hw/mips: Merge 'hw/mips/cpudevs.h' with 'target/mips/cpu.h'
"hw/mips/cpudevs.h" contains declarations which are specific
to the MIPS architecture; it doesn't make sense for these to
be called from a non-MIPS architecture. Move the declarations
to "target/mips/cpu.h".
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231009171443.12145-2-philmd@linaro.org>
Commit: 43e61fc8953bc2e40c3549368b2600787fbd53a9
https://github.com/qemu/qemu/commit/43e61fc8953bc2e40c3549368b2600787fbd53a9
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M include/hw/misc/mips_itu.h
M target/mips/cpu.h
M target/mips/tcg/sysemu/cp0_helper.c
Log Message:
-----------
hw/misc/mips_itu: Declare itc_reconfigure() in 'hw/misc/mips_itu.h'
We already provide "hw/misc/mips_itu.h" to declare prototype
related to MIPSITUState. Move itc_reconfigure() declaration
there.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231009171443.12145-3-philmd@linaro.org>
Commit: 454c1e1dd834b992f4021607f84e85ed9cccb26c
https://github.com/qemu/qemu/commit/454c1e1dd834b992f4021607f84e85ed9cccb26c
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/misc/mips_itu.c
M include/hw/misc/mips_itu.h
Log Message:
-----------
hw/misc/mips_itu: Make MIPSITUState target agnostic
When prototyping a heterogenous machine including the ITU,
we get:
include/hw/misc/mips_itu.h:76:5: error: unknown type name 'MIPSCPU'
MIPSCPU *cpu0;
^
MIPSCPU is declared in the target specific "cpu.h" header,
but we don't want to include it, because "cpu.h" is target
specific and its inclusion taints all files including
"mips_itu.h", which become target specific too. We can
however use the 'ArchCPU *' type in the public header.
By keeping the TYPE_MIPS_CPU QOM type check in the link
property declaration, QOM core code will still check the
property is a correct MIPS CPU.
TYPE_MIPS_ITU is still built per-(MIPS)target, but its header
can now be included by other targets.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20231009171443.12145-4-philmd@linaro.org>
Commit: f30c755f0cefbf2e3100a6ecc1b45c2460b3bbd5
https://github.com/qemu/qemu/commit/f30c755f0cefbf2e3100a6ecc1b45c2460b3bbd5
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/pci-host/sh_pci.c
Log Message:
-----------
hw/pci-host/sh_pcic: Declare CPU QOM types using DEFINE_TYPES() macro
When multiple QOM types are registered in the same file,
it is simpler to use the the DEFINE_TYPES() macro. In
particular because type array declared with such macro
are easier to review.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Message-Id: <20231012041237.22281-2-philmd@linaro.org>
Commit: 701fed594577b17b27542a6f278c2babb20b3ba6
https://github.com/qemu/qemu/commit/701fed594577b17b27542a6f278c2babb20b3ba6
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/pci-host/sh_pci.c
Log Message:
-----------
hw/pci-host/sh_pcic: Correct PCI host / devfn#0 function names
Host bridge device and PCI function #0 are inverted.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Message-Id: <20231012041237.22281-3-philmd@linaro.org>
Commit: 191a1e14b95e6f1e23d6e31b3d2fdac875ed6a9e
https://github.com/qemu/qemu/commit/191a1e14b95e6f1e23d6e31b3d2fdac875ed6a9e
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/pci-host/sh_pci.c
Log Message:
-----------
hw/pci-host/sh_pcic: Replace magic value by proper definition
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Message-Id: <20231012041237.22281-4-philmd@linaro.org>
Commit: 203713b581e6b1d5095a2703e41172b9f2211d66
https://github.com/qemu/qemu/commit/203713b581e6b1d5095a2703e41172b9f2211d66
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/sparc64/sun4u.c
Log Message:
-----------
hw/sparc64/ebus: Access memory regions via pci_address_space_io()
PCI functions are plugged on a PCI bus. They can only access
external memory regions via the bus.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20231011185954.10337-5-philmd@linaro.org>
Commit: 2277fbfde16582b76254f8bbbebfb969d0dbef3c
https://github.com/qemu/qemu/commit/2277fbfde16582b76254f8bbbebfb969d0dbef3c
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/acpi/pcihp.c
M include/hw/acpi/pcihp.h
Log Message:
-----------
hw/acpi/pcihp: Clean up global variable shadowing in acpi_pcihp_init()
Fix:
hw/acpi/pcihp.c:499:36: error: declaration shadows a variable in the global
scope [-Werror,-Wshadow]
MemoryRegion *address_space_io,
^
include/exec/address-spaces.h:35:21: note: previous declaration is here
extern AddressSpace address_space_io;
^
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Ani Sinha <anisinha@redhat.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231010115048.11856-5-philmd@linaro.org>
Commit: a7e6186810f9389bb3aaa9209f548052651bc11d
https://github.com/qemu/qemu/commit/a7e6186810f9389bb3aaa9209f548052651bc11d
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/pci/pci.c
M include/hw/pci/pci.h
Log Message:
-----------
hw/pci: Clean up global variable shadowing of address_space_io variable
Fix:
hw/pci/pci.c:504:54: error: declaration shadows a variable in the global
scope [-Werror,-Wshadow]
MemoryRegion *address_space_io,
^
hw/pci/pci.c:533:38: error: declaration shadows a variable in the global
scope [-Werror,-Wshadow]
MemoryRegion *address_space_io,
^
hw/pci/pci.c:543:40: error: declaration shadows a variable in the global
scope [-Werror,-Wshadow]
MemoryRegion *address_space_io,
^
hw/pci/pci.c:590:45: error: declaration shadows a variable in the global
scope [-Werror,-Wshadow]
MemoryRegion *address_space_io,
^
include/exec/address-spaces.h:35:21: note: previous declaration is here
extern AddressSpace address_space_io;
^
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231010115048.11856-6-philmd@linaro.org>
Commit: ea08e72eb0288c40816c4b3a14688345d2eb0707
https://github.com/qemu/qemu/commit/ea08e72eb0288c40816c4b3a14688345d2eb0707
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/s390x/sclpquiesce.c
Log Message:
-----------
hw/s390x: Clean up global variable shadowing in quiesce_powerdown_req()
Fix:
hw/s390x/sclpquiesce.c:90:22: error: declaration shadows a variable in the
global scope [-Werror,-Wshadow]
QuiesceNotifier *qn = container_of(n, QuiesceNotifier, notifier);
^
hw/s390x/sclpquiesce.c:86:3: note: previous declaration is here
} qn;
^
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-Id: <20231010115048.11856-7-philmd@linaro.org>
Commit: 705000674b9df27cc80328e83d3825dc5ee3d6d6
https://github.com/qemu/qemu/commit/705000674b9df27cc80328e83d3825dc5ee3d6d6
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/intc/apic_common.c
Log Message:
-----------
hw/intc/apic: Use ERRP_GUARD() in apic_common_realize()
APICCommonClass::realize() is a DeviceRealize() handler which
take an Error** parameter and can fail. Do not proceed further
on failure.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Message-Id: <20231003082728.83496-2-philmd@linaro.org>
Commit: e45abc2bb958d4780fa56bc10049f604408c2c96
https://github.com/qemu/qemu/commit/e45abc2bb958d4780fa56bc10049f604408c2c96
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/ppc/spapr_vio.c
Log Message:
-----------
hw/ppc/spapr_vio: Realize SPAPR_VIO_BRIDGE device before accessing it
qbus_new() should not be called on unrealized device.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20231019131647.19690-2-philmd@linaro.org>
Commit: 59561e827b9c5a13bdf5e099ee2b045c8144b0c2
https://github.com/qemu/qemu/commit/59561e827b9c5a13bdf5e099ee2b045c8144b0c2
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/ppc/pnv.c
M hw/ppc/pnv_xscom.c
M include/hw/ppc/pnv_xscom.h
Log Message:
-----------
hw/ppc/pnv_xscom: Rename pnv_xscom_realize(Error **) -> pnv_xscom_init()
pnv_xscom_realize() is not used to *realize* QDev object, rename
it as pnv_xscom_init(). The Error** argument is unused: remove it.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20231019131647.19690-3-philmd@linaro.org>
Commit: e29c4cb05ed9858f408db6b8fa775bc76f27a541
https://github.com/qemu/qemu/commit/e29c4cb05ed9858f408db6b8fa775bc76f27a541
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/ppc/pnv.c
M hw/ppc/pnv_xscom.c
M include/hw/ppc/pnv_xscom.h
Log Message:
-----------
hw/ppc/pnv_xscom: Move sysbus_mmio_map() call within pnv_xscom_init()
In order to make the next commit trivial, move sysbus_init_mmio()
calls just before the corresponding sysbus_mmio_map() calls.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20231019131647.19690-4-philmd@linaro.org>
Commit: 6a7f9f6f90dd7ecb137c1772cb98134d7606cdc3
https://github.com/qemu/qemu/commit/6a7f9f6f90dd7ecb137c1772cb98134d7606cdc3
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/ppc/pnv_xscom.c
Log Message:
-----------
hw/ppc/pnv_xscom: Do not use SysBus API to map local MMIO region
There is no point in exposing an internal MMIO region via
SysBus and directly mapping it in the very same device.
Just map it without using the SysBus API.
Transformation done using the following coccinelle script:
@@
expression sbdev;
expression index;
expression addr;
expression subregion;
@@
- sysbus_init_mmio(sbdev, subregion);
... when != sbdev
- sysbus_mmio_map(sbdev, index, addr);
+ memory_region_add_subregion(get_system_memory(), addr, subregion);
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20231019131647.19690-5-philmd@linaro.org>
Commit: a92771ce8dd5b217ae59c3654d39963e1bd27f95
https://github.com/qemu/qemu/commit/a92771ce8dd5b217ae59c3654d39963e1bd27f95
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/ppc/pnv.c
Log Message:
-----------
hw/ppc/pnv: Do not use SysBus API to map local MMIO region
There is no point in exposing an internal MMIO region via
SysBus and directly mapping it in the very same device.
Just map it without using the SysBus API.
Transformation done using the following coccinelle script:
@@
expression sbdev;
expression index;
expression addr;
expression subregion;
@@
- sysbus_init_mmio(sbdev, subregion);
... when != sbdev
- sysbus_mmio_map(sbdev, index, addr);
+ memory_region_add_subregion(get_system_memory(), addr, subregion);
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20231019131647.19690-6-philmd@linaro.org>
Commit: 9c33e2a8acf0d91f420fabf858ba018d80af5c0d
https://github.com/qemu/qemu/commit/9c33e2a8acf0d91f420fabf858ba018d80af5c0d
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/intc/spapr_xive.c
Log Message:
-----------
hw/intc/spapr_xive: Move sysbus_init_mmio() calls around
In order to make the next commit trivial, move sysbus_init_mmio()
calls just before the corresponding sysbus_mmio_map() calls.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20231019131647.19690-7-philmd@linaro.org>
Commit: 05af744babc44a99a5043082805b34e591e5a39e
https://github.com/qemu/qemu/commit/05af744babc44a99a5043082805b34e591e5a39e
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/intc/spapr_xive.c
Log Message:
-----------
hw/intc/spapr_xive: Do not use SysBus API to map local MMIO region
There is no point in exposing an internal MMIO region via
SysBus and directly mapping it in the very same device.
Just map it without using the SysBus API.
Transformation done using the following coccinelle script:
@@
expression sbdev;
expression index;
expression addr;
expression subregion;
@@
- sysbus_init_mmio(sbdev, subregion);
... when != sbdev
- sysbus_mmio_map(sbdev, index, addr);
+ memory_region_add_subregion(get_system_memory(), addr, subregion);
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20231019131647.19690-8-philmd@linaro.org>
Commit: f79a525d8d0fe9d6fe4c1925600aa69eb82acbff
https://github.com/qemu/qemu/commit/f79a525d8d0fe9d6fe4c1925600aa69eb82acbff
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/i386/amd_iommu.c
Log Message:
-----------
hw/i386/amd_iommu: Do not use SysBus API to map local MMIO region
There is no point in exposing an internal MMIO region via
SysBus and directly mapping it in the very same device.
Just map it without using the SysBus API.
Transformation done using the following coccinelle script:
@@
expression sbdev;
expression index;
expression addr;
expression subregion;
@@
- sysbus_init_mmio(sbdev, subregion);
... when != sbdev
- sysbus_mmio_map(sbdev, index, addr);
+ memory_region_add_subregion(get_system_memory(), addr, subregion);
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20231018141151.87466-2-philmd@linaro.org>
Commit: 77dbaccefd7c5e1f985f96a49412aa3b378fbadd
https://github.com/qemu/qemu/commit/77dbaccefd7c5e1f985f96a49412aa3b378fbadd
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/i386/intel_iommu.c
Log Message:
-----------
hw/i386/intel_iommu: Do not use SysBus API to map local MMIO region
There is no point in exposing an internal MMIO region via
SysBus and directly mapping it in the very same device.
Just map it without using the SysBus API.
Transformation done using the following coccinelle script:
@@
expression sbdev;
expression index;
expression addr;
expression subregion;
@@
- sysbus_init_mmio(sbdev, subregion);
... when != sbdev
- sysbus_mmio_map(sbdev, index, addr);
+ memory_region_add_subregion(get_system_memory(), addr, subregion);
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Message-Id: <20231018141151.87466-3-philmd@linaro.org>
Commit: a4a81a2d57a4bac4efd482a1589b007702f92901
https://github.com/qemu/qemu/commit/a4a81a2d57a4bac4efd482a1589b007702f92901
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/misc/allwinner-r40-dramc.c
Log Message:
-----------
hw/misc/allwinner-dramc: Move sysbus_mmio_map call from init -> realize
In order to make the next commit trivial, move the sysbus_init_mmio()
call in allwinner_r40_dramc_init() just before the corresponding
sysbus_mmio_map_overlap() call in allwinner_r40_dramc_realize().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20231019071611.98885-4-philmd@linaro.org>
Commit: 403b50fd3c78037f85aef76845056f8aecbb25e2
https://github.com/qemu/qemu/commit/403b50fd3c78037f85aef76845056f8aecbb25e2
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/misc/allwinner-r40-dramc.c
Log Message:
-----------
hw/misc/allwinner-dramc: Do not use SysBus API to map local MMIO region
There is no point in exposing an internal MMIO region via
SysBus and directly mapping it in the very same device.
Just map it without using the SysBus API.
Transformation done using the following coccinelle script:
@@
expression sbdev;
expression index;
expression addr;
expression subregion;
@@
- sysbus_init_mmio(sbdev, subregion);
... when != sbdev
- sysbus_mmio_map(sbdev, index, addr);
+ memory_region_add_subregion(get_system_memory(),
+ addr, subregion);
@@
expression priority;
@@
- sysbus_init_mmio(sbdev, subregion);
... when != sbdev
- sysbus_mmio_map_overlap(sbdev, index, addr, priority);
+ memory_region_add_subregion_overlap(get_system_memory(),
+ addr,
+ subregion, priority);
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20231019071611.98885-5-philmd@linaro.org>
Commit: 52d97058e871106c19a98f7d6202b061f2ee7c93
https://github.com/qemu/qemu/commit/52d97058e871106c19a98f7d6202b061f2ee7c93
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/pci-host/bonito.c
Log Message:
-----------
hw/pci-host/bonito: Do not use SysBus API to map local MMIO region
There is no point in exposing an internal MMIO region via
SysBus and directly mapping it in the very same device.
Just map it without using the SysBus API.
Transformation done using the following coccinelle script:
@@
expression sbdev;
expression index;
expression addr;
expression subregion;
@@
- sysbus_init_mmio(sbdev, subregion);
... when != sbdev
- sysbus_mmio_map(sbdev, index, addr);
+ memory_region_add_subregion(get_system_memory(), addr, subregion);
and manually adding the local 'host_mem' variable to
avoid multiple calls to get_system_memory().
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20231019071611.98885-6-philmd@linaro.org>
Commit: 74b253585de2def439cc400bc699b37de3e20727
https://github.com/qemu/qemu/commit/74b253585de2def439cc400bc699b37de3e20727
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/arm/virt.c
M hw/i386/microvm.c
M hw/loongarch/virt.c
Log Message:
-----------
hw/acpi: Realize ACPI_GED sysbus device before accessing it
sysbus_mmio_map() should not be called on unrealized device.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231018141151.87466-7-philmd@linaro.org>
Commit: c85b843d177e48bb5367946ac6731073d32f831e
https://github.com/qemu/qemu/commit/c85b843d177e48bb5367946ac6731073d32f831e
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/arm/virt.c
Log Message:
-----------
hw/arm/virt: Realize ARM_GICV2M sysbus device before accessing it
sysbus_mmio_map() should not be called on unrealized device.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20231018141151.87466-8-philmd@linaro.org>
Commit: 5a93fcfeeba7f0a4c766e7999fb778a2452d273e
https://github.com/qemu/qemu/commit/5a93fcfeeba7f0a4c766e7999fb778a2452d273e
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/isa/isa-bus.c
Log Message:
-----------
hw/isa: Realize ISA bridge device before accessing it
qbus_new() should not be called on unrealized device.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231019071611.98885-9-philmd@linaro.org>
Commit: 7892e7cd916436a763705ba627619ca96b140ed6
https://github.com/qemu/qemu/commit/7892e7cd916436a763705ba627619ca96b140ed6
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/s390x/css-bridge.c
Log Message:
-----------
hw/s390x/css-bridge: Realize sysbus device before accessing it
qbus_new() should not be called on unrealized device.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20231019071611.98885-10-philmd@linaro.org>
Commit: 184256d261cfc773360f14a80092ace5a716bb8f
https://github.com/qemu/qemu/commit/184256d261cfc773360f14a80092ace5a716bb8f
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/virtio/virtio-pmem.c
Log Message:
-----------
hw/virtio/virtio-pmem: Replace impossible check by assertion
The get_memory_region() handler is used when (un)plugging the
device, which can only occur *after* it is realized.
virtio_pmem_realize() ensure the instance can not be realized
without 'memdev'. Remove the superfluous check, replacing it
by an assertion.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Message-Id: <20231017140150.44995-2-philmd@linaro.org>
Commit: 312ecbe364defed43fb981f21e00cd24552272d6
https://github.com/qemu/qemu/commit/312ecbe364defed43fb981f21e00cd24552272d6
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/block/vhost-user-blk.c
Log Message:
-----------
hw/block/vhost-user-blk: Use DEVICE() / VIRTIO_DEVICE() macros
Access QOM parent with the proper QOM [VIRTIO_]DEVICE() macros.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20231017140150.44995-3-philmd@linaro.org>
Commit: 9d7985a6bcff45d253d5551d965de636bf6a3b97
https://github.com/qemu/qemu/commit/9d7985a6bcff45d253d5551d965de636bf6a3b97
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/display/virtio-gpu.c
Log Message:
-----------
hw/display/virtio-gpu: Use VIRTIO_DEVICE() macro
Access QOM parent with the proper QOM VIRTIO_DEVICE() macro.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20231017140150.44995-4-philmd@linaro.org>
Commit: e84deec8b8ff45e1f118fc739f80a66046ae08e4
https://github.com/qemu/qemu/commit/e84deec8b8ff45e1f118fc739f80a66046ae08e4
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/scsi/virtio-scsi.c
Log Message:
-----------
hw/scsi/virtio-scsi: Use VIRTIO_SCSI_COMMON() macro
Access QOM parent with the proper QOM VIRTIO_SCSI_COMMON() macro.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20231017140150.44995-5-philmd@linaro.org>
Commit: 8802881e4d8d38c11e31c6b270686e4a0f874883
https://github.com/qemu/qemu/commit/8802881e4d8d38c11e31c6b270686e4a0f874883
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/dma/xilinx_axidma.c
M hw/dma/xlnx-zdma.c
M hw/dma/xlnx_csu_dma.c
Log Message:
-----------
hw/dma: Declare link using static DEFINE_PROP_LINK() macro
Declare link statically using DEFINE_PROP_LINK().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20231017140150.44995-6-philmd@linaro.org>
Commit: 4f472537fa9842ad7facb76b63ea9b625033e40e
https://github.com/qemu/qemu/commit/4f472537fa9842ad7facb76b63ea9b625033e40e
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/net/cadence_gem.c
Log Message:
-----------
hw/net: Declare link using static DEFINE_PROP_LINK() macro
Declare link statically using DEFINE_PROP_LINK().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20231017140150.44995-7-philmd@linaro.org>
Commit: 9f1b100236223d073915b8eedac3089ec64f8a6e
https://github.com/qemu/qemu/commit/9f1b100236223d073915b8eedac3089ec64f8a6e
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M chardev/msmouse.c
M chardev/wctablet.c
M hw/char/escc.c
M hw/display/xenfb.c
M hw/input/adb-kbd.c
M hw/input/hid.c
M hw/input/ps2.c
M hw/input/virtio-input-hid.c
M include/hw/virtio/virtio-input.h
M include/ui/input.h
M ui/input-legacy.c
M ui/input.c
M ui/vdagent.c
Log Message:
-----------
ui/input: Constify QemuInputHandler structure
Access to QemuInputHandlerState::handler are read-only.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20231017131251.43708-1-philmd@linaro.org>
Commit: 4ab9a7429bf7507fba4b96b97d4147628c91ba14
https://github.com/qemu/qemu/commit/4ab9a7429bf7507fba4b96b97d4147628c91ba14
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-10-21 (Sat, 21 Oct 2023)
Changed paths:
M hw/rdma/vmw/pvrdma_cmd.c
Log Message:
-----------
hw/rdma/vmw/pvrdma_cmd: Use correct struct in query_port()
In query_port() we pass the address of a local pvrdma_port_attr
struct to the rdma_query_backend_port() function. Unfortunately,
rdma_backend_query_port() wants a pointer to a struct ibv_port_attr,
and the two are not the same length.
Coverity spotted this (CID 1507146): pvrdma_port_attr is 48 bytes
long, and ibv_port_attr is 52 bytes, because it has a few extra
fields at the end.
Fortunately, all we do with the attrs struct after the call is to
read a few specific fields out of it which are all at the same
offsets in both structs, so we can simply make the local variable the
correct type. This also lets us drop the cast (which should have
been a bit of a warning flag that we were doing something wrong
here).
We do however need to add extra casts for the fields of the
struct that are enums: clang will complain about the implicit
cast to a different enum type otherwise.
Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: 0affd6785a243c8a8460abbfc4caf991e71ff9c6
https://github.com/qemu/qemu/commit/0affd6785a243c8a8460abbfc4caf991e71ff9c6
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-21 (Sat, 21 Oct 2023)
Changed paths:
M hw/ppc/ppc440_uc.c
Log Message:
-----------
hw/ppc/ppc440_uc: Remove dead l2sram_update_mappings()
Apparently l2sram_update_mappings() bit-rotted over time,
when defining MAP_L2SRAM we get:
hw/ppc/ppc440_uc.c:83:17: error: no member named 'isarc' in 'struct
ppc4xx_l2sram_t'
if (l2sram->isarc != isarc ||
~~~~~~ ^
hw/ppc/ppc440_uc.c:84:18: error: no member named 'isacntl' in 'struct
ppc4xx_l2sram_t'
(l2sram->isacntl & 0x80000000) != (isacntl & 0x80000000)) {
~~~~~~ ^
hw/ppc/ppc440_uc.c:85:21: error: no member named 'isacntl' in 'struct
ppc4xx_l2sram_t'
if (l2sram->isacntl & 0x80000000) {
~~~~~~ ^
hw/ppc/ppc440_uc.c:88:50: error: no member named 'isarc_ram' in 'struct
ppc4xx_l2sram_t'
&l2sram->isarc_ram);
~~~~~~ ^
hw/ppc/ppc440_uc.c:93:50: error: no member named 'isarc_ram' in 'struct
ppc4xx_l2sram_t'
&l2sram->isarc_ram);
~~~~~~ ^
hw/ppc/ppc440_uc.c:96:17: error: no member named 'dsarc' in 'struct
ppc4xx_l2sram_t'
if (l2sram->dsarc != dsarc ||
~~~~~~ ^
hw/ppc/ppc440_uc.c:97:18: error: no member named 'dsacntl' in 'struct
ppc4xx_l2sram_t'
(l2sram->dsacntl & 0x80000000) != (dsacntl & 0x80000000)) {
~~~~~~ ^
hw/ppc/ppc440_uc.c:98:21: error: no member named 'dsacntl' in 'struct
ppc4xx_l2sram_t'
if (l2sram->dsacntl & 0x80000000) {
~~~~~~ ^
hw/ppc/ppc440_uc.c:100:52: error: no member named 'dsarc' in 'struct
ppc4xx_l2sram_t'
if (!(isacntl & 0x80000000) || l2sram->dsarc != isarc) {
~~~~~~ ^
hw/ppc/ppc440_uc.c:103:54: error: no member named 'dsarc_ram' in 'struct
ppc4xx_l2sram_t'
&l2sram->dsarc_ram);
~~~~~~ ^
hw/ppc/ppc440_uc.c:111:54: error: no member named 'dsarc_ram' in 'struct
ppc4xx_l2sram_t'
&l2sram->dsarc_ram);
~~~~~~ ^
Remove that dead code.
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: b3e1216aa9f721ef096edf62f845ab4205e95b44
https://github.com/qemu/qemu/commit/b3e1216aa9f721ef096edf62f845ab4205e95b44
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-21 (Sat, 21 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Cover hw/ppc/ppc440_uc.c with Sam460ex board
hw/ppc/ppc440_uc.c implements the TYPE_PPC460EX_PCIE_HOST
device, which is used by the aCube Sam460ex board.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: 1805c2b1da391aea46c52abcdef8b9f388e11f3d
https://github.com/qemu/qemu/commit/1805c2b1da391aea46c52abcdef8b9f388e11f3d
Author: Thomas Huth <thuth@redhat.com>
Date: 2023-10-21 (Sat, 21 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Add the nios2 interrupt controller to the nios2 section
These files obviously belong to the nios2 target, so they should
be listed in the nios2 section in the MAINTAINERS file.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: 6345897057834644095975db98593f5034a98e3f
https://github.com/qemu/qemu/commit/6345897057834644095975db98593f5034a98e3f
Author: Thomas Huth <thuth@redhat.com>
Date: 2023-10-21 (Sat, 21 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Add include/hw/intc/i8259.h to the PC chip section
i8259.c is already listed here, so the corresponding header should
be mentioned in this section, too.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: 2635f961b0aff7fa2e4958cce1059b8d10881b60
https://github.com/qemu/qemu/commit/2635f961b0aff7fa2e4958cce1059b8d10881b60
Author: Thomas Huth <thuth@redhat.com>
Date: 2023-10-21 (Sat, 21 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Add docs/devel/ebpf_rss.rst to the EBPF section
This doc file obviously belongs to the EBPF section.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: 5cf9a81e3400edcee408a25dff9ed30a07650eb8
https://github.com/qemu/qemu/commit/5cf9a81e3400edcee408a25dff9ed30a07650eb8
Author: Eric Farman <farman@linux.ibm.com>
Date: 2023-10-21 (Sat, 21 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Fix a couple s390 paths
These are simple typos, since the directories don't exist but the
files themselves do in hw/s390x/
Fixes: 56e3483402 ("MAINTAINERS: split out s390x sections")
Signed-off-by: Eric Farman <farman@linux.ibm.com>
Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: 64cf81b8128196823cc0ea15d84952d7c5c21dd4
https://github.com/qemu/qemu/commit/64cf81b8128196823cc0ea15d84952d7c5c21dd4
Author: Cédric Le Goater <clg@kaod.org>
Date: 2023-10-21 (Sat, 21 Oct 2023)
Changed paths:
M hw/ppc/ppc440_bamboo.c
M hw/ppc/virtex_ml507.c
Log Message:
-----------
ppc/{bamboo, virtex_ml507}: Remove useless dependency on ppc405.h header
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> (odd fixer:virtex_ml507)
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: 6d7144604fb36149d3ddd69c52e33a01076ea8c2
https://github.com/qemu/qemu/commit/6d7144604fb36149d3ddd69c52e33a01076ea8c2
Author: Cédric Le Goater <clg@kaod.org>
Date: 2023-10-21 (Sat, 21 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Adjust file list for PPC ref405ep machine
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: e20dbe54f2df52719a698739f10195e31e7f992d
https://github.com/qemu/qemu/commit/e20dbe54f2df52719a698739f10195e31e7f992d
Author: Cédric Le Goater <clg@kaod.org>
Date: 2023-10-21 (Sat, 21 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Adjust file list for PPC 4xx CPUs
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: ab8e1af2475bd26e8a2d6b9dd14782a8cfec1032
https://github.com/qemu/qemu/commit/ab8e1af2475bd26e8a2d6b9dd14782a8cfec1032
Author: Cédric Le Goater <clg@kaod.org>
Date: 2023-10-21 (Sat, 21 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Adjust file list for PPC e500 machines
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: d79d9989764f1a645312fe5bea6dc4ebb3d9e1cf
https://github.com/qemu/qemu/commit/d79d9989764f1a645312fe5bea6dc4ebb3d9e1cf
Author: Cédric Le Goater <clg@kaod.org>
Date: 2023-10-21 (Sat, 21 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Adjust file list for PPC pseries machine
The fdt.{c.h} files provide a helper routine used by the pseries and
pnv machines. Attached it to the list of the larger one: pseries.
Protected Execution Facility (PEF) is the confidential guest support
for PPC pseries machines.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: 6198558781f5d8abde33f2f05d3c6015140d74d8
https://github.com/qemu/qemu/commit/6198558781f5d8abde33f2f05d3c6015140d74d8
Author: Cédric Le Goater <clg@kaod.org>
Date: 2023-10-21 (Sat, 21 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Add fw_cfg.c to PPC mac99 machine
The hw/ppc/fw_cfg.c file contains the implementation of
fw_cfg_arch_key_name(), used by the common nvram model. List it under
mac99 machine next to the mac_nvram model.
Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: 9c46b512e3a49e2b60a735ba603d44c07b9f4668
https://github.com/qemu/qemu/commit/9c46b512e3a49e2b60a735ba603d44c07b9f4668
Author: Cédric Le Goater <clg@kaod.org>
Date: 2023-10-21 (Sat, 21 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Add PPC common files to PowerPC TCG CPUs
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: 71c1d34455d59cd7772f473354906ee08c877225
https://github.com/qemu/qemu/commit/71c1d34455d59cd7772f473354906ee08c877225
Author: Thomas Huth <thuth@redhat.com>
Date: 2023-10-21 (Sat, 21 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Add unvalued folders in tests/tcg/ to the right sections
Some subfolders in tests/tcg/ are already listed in the MAINTAINERS
file, some others aren't listed yet. Add the missing ones now to the
MAINTAINERS file, too, to make sure that get_maintainers.pl reports
the correct maintainer.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: b96a7487d589fe3beb1d63fdb0be30f6a6311a44
https://github.com/qemu/qemu/commit/b96a7487d589fe3beb1d63fdb0be30f6a6311a44
Author: Thomas Huth <thuth@redhat.com>
Date: 2023-10-21 (Sat, 21 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Fix typo in openpic_kvm.c entry
It's a .c file, not a header!
Fixes: ff8cdbbd7e ("MAINTAINERS: Add information for OpenPIC")
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: a4a2f7f8161ed1dbaa748350c4bc2d86c4d77d97
https://github.com/qemu/qemu/commit/a4a2f7f8161ed1dbaa748350c4bc2d86c4d77d97
Author: Thomas Huth <thuth@redhat.com>
Date: 2023-10-21 (Sat, 21 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Add the ompic.c file to the or1k-sim section
The or1k-sim machine is the only one using the ompic, so let's add
this file to the corresponding sections in the MAINTAINERS file.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: 1428831981edc53fe819f76d07306f6b041fe55c
https://github.com/qemu/qemu/commit/1428831981edc53fe819f76d07306f6b041fe55c
Author: Laszlo Ersek <lersek@redhat.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/virtio/vhost-user.c
Log Message:
-----------
vhost-user: strip superfluous whitespace
Cc: "Michael S. Tsirkin" <mst@redhat.com> (supporter:vhost)
Cc: Eugenio Perez Martin <eperezma@redhat.com>
Cc: German Maglione <gmaglione@redhat.com>
Cc: Liu Jiang <gerry@linux.alibaba.com>
Cc: Sergio Lopez Pascual <slp@redhat.com>
Cc: Stefano Garzarella <sgarzare@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Albert Esteve <aesteve@redhat.com>
Reviewed-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20231002203221.17241-2-lersek@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: ed0b3ebbae4d3afd9f742613ed64444e4d04ae0a
https://github.com/qemu/qemu/commit/ed0b3ebbae4d3afd9f742613ed64444e4d04ae0a
Author: Laszlo Ersek <lersek@redhat.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/virtio/vhost-user.c
Log Message:
-----------
vhost-user: tighten "reply_supported" scope in "set_vring_addr"
In the vhost_user_set_vring_addr() function, we calculate
"reply_supported" unconditionally, even though we'll only need it if
"wait_for_reply" is also true.
Restrict the scope of "reply_supported" to the minimum.
This is purely refactoring -- no observable change.
Cc: "Michael S. Tsirkin" <mst@redhat.com> (supporter:vhost)
Cc: Eugenio Perez Martin <eperezma@redhat.com>
Cc: German Maglione <gmaglione@redhat.com>
Cc: Liu Jiang <gerry@linux.alibaba.com>
Cc: Sergio Lopez Pascual <slp@redhat.com>
Cc: Stefano Garzarella <sgarzare@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Tested-by: Albert Esteve <aesteve@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20231002203221.17241-3-lersek@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 54ae36822f6f14603ed117b09fd1b59d6ebfb963
https://github.com/qemu/qemu/commit/54ae36822f6f14603ed117b09fd1b59d6ebfb963
Author: Laszlo Ersek <lersek@redhat.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/virtio/vhost-user.c
Log Message:
-----------
vhost-user: factor out "vhost_user_write_sync"
The tails of the "vhost_user_set_vring_addr" and "vhost_user_set_u64"
functions are now byte-for-byte identical. Factor the common tail out to a
new function called "vhost_user_write_sync".
This is purely refactoring -- no observable change.
Cc: "Michael S. Tsirkin" <mst@redhat.com> (supporter:vhost)
Cc: Eugenio Perez Martin <eperezma@redhat.com>
Cc: German Maglione <gmaglione@redhat.com>
Cc: Liu Jiang <gerry@linux.alibaba.com>
Cc: Sergio Lopez Pascual <slp@redhat.com>
Cc: Stefano Garzarella <sgarzare@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Tested-by: Albert Esteve <aesteve@redhat.com>
Reviewed-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20231002203221.17241-4-lersek@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 99ad9ec89d45dbc532471537a4468b9a5ea386e3
https://github.com/qemu/qemu/commit/99ad9ec89d45dbc532471537a4468b9a5ea386e3
Author: Laszlo Ersek <lersek@redhat.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/virtio/vhost-user.c
Log Message:
-----------
vhost-user: flatten "enforce_reply" into "vhost_user_write_sync"
At this point, only "vhost_user_write_sync" calls "enforce_reply"; embed
the latter into the former.
This is purely refactoring -- no observable change.
Cc: "Michael S. Tsirkin" <mst@redhat.com> (supporter:vhost)
Cc: Eugenio Perez Martin <eperezma@redhat.com>
Cc: German Maglione <gmaglione@redhat.com>
Cc: Liu Jiang <gerry@linux.alibaba.com>
Cc: Sergio Lopez Pascual <slp@redhat.com>
Cc: Stefano Garzarella <sgarzare@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Tested-by: Albert Esteve <aesteve@redhat.com>
Reviewed-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20231002203221.17241-5-lersek@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: df3b2abc32c319352e6b350990919d3387520669
https://github.com/qemu/qemu/commit/df3b2abc32c319352e6b350990919d3387520669
Author: Laszlo Ersek <lersek@redhat.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/virtio/vhost-user.c
Log Message:
-----------
vhost-user: hoist "write_sync", "get_features", "get_u64"
In order to avoid a forward-declaration for "vhost_user_write_sync" in a
subsequent patch, hoist "vhost_user_write_sync" ->
"vhost_user_get_features" -> "vhost_user_get_u64" just above
"vhost_set_vring".
This is purely code movement -- no observable change.
Cc: "Michael S. Tsirkin" <mst@redhat.com> (supporter:vhost)
Cc: Eugenio Perez Martin <eperezma@redhat.com>
Cc: German Maglione <gmaglione@redhat.com>
Cc: Liu Jiang <gerry@linux.alibaba.com>
Cc: Sergio Lopez Pascual <slp@redhat.com>
Cc: Stefano Garzarella <sgarzare@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Tested-by: Albert Esteve <aesteve@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20231002203221.17241-6-lersek@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 75b6b6da21a225b7853515d9e14775f8a5d9af3a
https://github.com/qemu/qemu/commit/75b6b6da21a225b7853515d9e14775f8a5d9af3a
Author: Laszlo Ersek <lersek@redhat.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/virtio/vhost-user.c
Log Message:
-----------
vhost-user: allow "vhost_set_vring" to wait for a reply
The "vhost_set_vring" function already centralizes the common parts of
"vhost_user_set_vring_num", "vhost_user_set_vring_base" and
"vhost_user_set_vring_enable". We'll want to allow some of those callers
to wait for a reply.
Therefore, rebase "vhost_set_vring" from just "vhost_user_write" to
"vhost_user_write_sync", exposing the "wait_for_reply" parameter.
This is purely refactoring -- there is no observable change. That's
because:
- all three callers pass in "false" for "wait_for_reply", which disables
all logic in "vhost_user_write_sync" except the call to
"vhost_user_write";
- the fds=NULL and fd_num=0 arguments of the original "vhost_user_write"
call inside "vhost_set_vring" are hard-coded within
"vhost_user_write_sync".
Cc: "Michael S. Tsirkin" <mst@redhat.com> (supporter:vhost)
Cc: Eugenio Perez Martin <eperezma@redhat.com>
Cc: German Maglione <gmaglione@redhat.com>
Cc: Liu Jiang <gerry@linux.alibaba.com>
Cc: Sergio Lopez Pascual <slp@redhat.com>
Cc: Stefano Garzarella <sgarzare@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Tested-by: Albert Esteve <aesteve@redhat.com>
Reviewed-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20231002203221.17241-7-lersek@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: d7dc0682f5cb549ea9afdc418f95412e83cc5e8c
https://github.com/qemu/qemu/commit/d7dc0682f5cb549ea9afdc418f95412e83cc5e8c
Author: Laszlo Ersek <lersek@redhat.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/virtio/vhost-user.c
Log Message:
-----------
vhost-user: call VHOST_USER_SET_VRING_ENABLE synchronously
(1) The virtio-1.2 specification
<http://docs.oasis-open.org/virtio/virtio/v1.2/virtio-v1.2.html> writes:
> 3 General Initialization And Device Operation
> 3.1 Device Initialization
> 3.1.1 Driver Requirements: Device Initialization
>
> [...]
>
> 7. Perform device-specific setup, including discovery of virtqueues for
> the device, optional per-bus setup, reading and possibly writing the
> device’s virtio configuration space, and population of virtqueues.
>
> 8. Set the DRIVER_OK status bit. At this point the device is “live”.
and
> 4 Virtio Transport Options
> 4.1 Virtio Over PCI Bus
> 4.1.4 Virtio Structure PCI Capabilities
> 4.1.4.3 Common configuration structure layout
> 4.1.4.3.2 Driver Requirements: Common configuration structure layout
>
> [...]
>
> The driver MUST configure the other virtqueue fields before enabling the
> virtqueue with queue_enable.
>
> [...]
(The same statements are present in virtio-1.0 identically, at
<http://docs.oasis-open.org/virtio/virtio/v1.0/virtio-v1.0.html>.)
These together mean that the following sub-sequence of steps is valid for
a virtio-1.0 guest driver:
(1.1) set "queue_enable" for the needed queues as the final part of device
initialization step (7),
(1.2) set DRIVER_OK in step (8),
(1.3) immediately start sending virtio requests to the device.
(2) When vhost-user is enabled, and the VHOST_USER_F_PROTOCOL_FEATURES
special virtio feature is negotiated, then virtio rings start in disabled
state, according to
<https://qemu-project.gitlab.io/qemu/interop/vhost-user.html#ring-states>.
In this case, explicit VHOST_USER_SET_VRING_ENABLE messages are needed for
enabling vrings.
Therefore setting "queue_enable" from the guest (1.1) -- which is
technically "buffered" on the QEMU side until the guest sets DRIVER_OK
(1.2) -- is a *control plane* operation, which -- after (1.2) -- travels
from the guest through QEMU to the vhost-user backend, using a unix domain
socket.
Whereas sending a virtio request (1.3) is a *data plane* operation, which
evades QEMU -- it travels from guest to the vhost-user backend via
eventfd.
This means that operations ((1.1) + (1.2)) and (1.3) travel through
different channels, and their relative order can be reversed, as perceived
by the vhost-user backend.
That's exactly what happens when OVMF's virtiofs driver (VirtioFsDxe) runs
against the Rust-language virtiofsd version 1.7.2. (Which uses version
0.10.1 of the vhost-user-backend crate, and version 0.8.1 of the vhost
crate.)
Namely, when VirtioFsDxe binds a virtiofs device, it goes through the
device initialization steps (i.e., control plane operations), and
immediately sends a FUSE_INIT request too (i.e., performs a data plane
operation). In the Rust-language virtiofsd, this creates a race between
two components that run *concurrently*, i.e., in different threads or
processes:
- Control plane, handling vhost-user protocol messages:
The "VhostUserSlaveReqHandlerMut::set_vring_enable" method
[crates/vhost-user-backend/src/handler.rs] handles
VHOST_USER_SET_VRING_ENABLE messages, and updates each vring's "enabled"
flag according to the message processed.
- Data plane, handling virtio / FUSE requests:
The "VringEpollHandler::handle_event" method
[crates/vhost-user-backend/src/event_loop.rs] handles the incoming
virtio / FUSE request, consuming the virtio kick at the same time. If
the vring's "enabled" flag is set, the virtio / FUSE request is
processed genuinely. If the vring's "enabled" flag is clear, then the
virtio / FUSE request is discarded.
Note that OVMF enables the queue *first*, and sends FUSE_INIT *second*.
However, if the data plane processor in virtiofsd wins the race, then it
sees the FUSE_INIT *before* the control plane processor took notice of
VHOST_USER_SET_VRING_ENABLE and green-lit the queue for the data plane
processor. Therefore the latter drops FUSE_INIT on the floor, and goes
back to waiting for further virtio / FUSE requests with epoll_wait.
Meanwhile OVMF is stuck waiting for the FUSET_INIT response -- a deadlock.
The deadlock is not deterministic. OVMF hangs infrequently during first
boot. However, OVMF hangs almost certainly during reboots from the UEFI
shell.
The race can be "reliably masked" by inserting a very small delay -- a
single debug message -- at the top of "VringEpollHandler::handle_event",
i.e., just before the data plane processor checks the "enabled" field of
the vring. That delay suffices for the control plane processor to act upon
VHOST_USER_SET_VRING_ENABLE.
We can deterministically prevent the race in QEMU, by blocking OVMF inside
step (1.2) -- i.e., in the write to the device status register that
"unleashes" queue enablement -- until VHOST_USER_SET_VRING_ENABLE actually
*completes*. That way OVMF's VCPU cannot advance to the FUSE_INIT
submission before virtiofsd's control plane processor takes notice of the
queue being enabled.
Wait for VHOST_USER_SET_VRING_ENABLE completion by:
- setting the NEED_REPLY flag on VHOST_USER_SET_VRING_ENABLE, and waiting
for the reply, if the VHOST_USER_PROTOCOL_F_REPLY_ACK vhost-user feature
has been negotiated, or
- performing a separate VHOST_USER_GET_FEATURES *exchange*, which requires
a backend response regardless of VHOST_USER_PROTOCOL_F_REPLY_ACK.
Cc: "Michael S. Tsirkin" <mst@redhat.com> (supporter:vhost)
Cc: Eugenio Perez Martin <eperezma@redhat.com>
Cc: German Maglione <gmaglione@redhat.com>
Cc: Liu Jiang <gerry@linux.alibaba.com>
Cc: Sergio Lopez Pascual <slp@redhat.com>
Cc: Stefano Garzarella <sgarzare@redhat.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Tested-by: Albert Esteve <aesteve@redhat.com>
[lersek@redhat.com: work Eugenio's explanation into the commit message,
about QEMU containing step (1.1) until step (1.2)]
Reviewed-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20231002203221.17241-8-lersek@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: b15c18c51910ec5ef8c506f641f487507e42c79b
https://github.com/qemu/qemu/commit/b15c18c51910ec5ef8c506f641f487507e42c79b
Author: Ilya Maximets <i.maximets@ovn.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M include/exec/memory.h
Log Message:
-----------
memory: initialize 'fv' in MemoryRegionCache to make Coverity happy
Coverity scan reports multiple false-positive "defects" for the
following series of actions in virtio.c:
MemoryRegionCache indirect_desc_cache;
address_space_cache_init_empty(&indirect_desc_cache);
address_space_cache_destroy(&indirect_desc_cache);
For some reason it's unable to recognize the dependency between 'mrs.mr'
and 'fv' and insists that '!mrs.mr' check in address_space_cache_destroy
may take a 'false' branch, even though it is explicitly initialized to
NULL in the address_space_cache_init_empty():
*** CID 1522371: Memory - illegal accesses (UNINIT)
/qemu/hw/virtio/virtio.c: 1627 in virtqueue_split_pop()
1621 }
1622
1623 vq->inuse++;
1624
1625 trace_virtqueue_pop(vq, elem, elem->in_num, elem->out_num);
1626 done:
>>> CID 1522371: Memory - illegal accesses (UNINIT)
>>> Using uninitialized value "indirect_desc_cache.fv" when
>>> calling "address_space_cache_destroy".
1627 address_space_cache_destroy(&indirect_desc_cache);
1628
1629 return elem;
1630
1631 err_undo_map:
1632 virtqueue_undo_map_desc(out_num, in_num, iov);
** CID 1522370: Memory - illegal accesses (UNINIT)
Instead of trying to silence these false positive reports in 4
different places, initializing 'fv' as well, as this doesn't result
in any noticeable performance impact.
Signed-off-by: Ilya Maximets <i.maximets@ovn.org>
Message-Id: <20231009104322.3085887-1-i.maximets@ovn.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Commit: 22d2464f7ee6242114733e62541eed14cde15977
https://github.com/qemu/qemu/commit/22d2464f7ee6242114733e62541eed14cde15977
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/scsi/vhost-user-scsi.c
M hw/virtio/vhost-user.c
Log Message:
-----------
vhost-user: do not send RESET_OWNER on device reset
The VHOST_USER_RESET_OWNER message is deprecated in the spec:
This is no longer used. Used to be sent to request disabling all
rings, but some back-ends interpreted it to also discard connection
state (this interpretation would lead to bugs). It is recommended
that back-ends either ignore this message, or use it to disable all
rings.
The only caller of vhost_user_reset_device() is vhost_user_scsi_reset().
It checks that F_RESET_DEVICE was negotiated before calling it:
static void vhost_user_scsi_reset(VirtIODevice *vdev)
{
VHostSCSICommon *vsc = VHOST_SCSI_COMMON(vdev);
struct vhost_dev *dev = &vsc->dev;
/*
* Historically, reset was not implemented so only reset devices
* that are expecting it.
*/
if (!virtio_has_feature(dev->protocol_features,
VHOST_USER_PROTOCOL_F_RESET_DEVICE)) {
return;
}
if (dev->vhost_ops->vhost_reset_device) {
dev->vhost_ops->vhost_reset_device(dev);
}
}
Therefore VHOST_USER_RESET_OWNER is actually never sent by
vhost_user_reset_device(). Remove the dead code. This effectively moves
the vhost-user protocol specific code from vhost-user-scsi.c into
vhost-user.c where it belongs.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-Id: <20231004014532.1228637-2-stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Raphael Norwitz <raphael.norwitz@nutanix.com>
Commit: e6383293eb01928692047e617665a742cca87e23
https://github.com/qemu/qemu/commit/e6383293eb01928692047e617665a742cca87e23
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/virtio/vhost-backend.c
Log Message:
-----------
vhost-backend: remove vhost_kernel_reset_device()
vhost_kernel_reset_device() invokes RESET_OWNER, which disassociates the
owner process from the device. The device is left non-operational since
SET_OWNER is only called once during startup in vhost_dev_init().
vhost_kernel_reset_device() is never called so this latent bug never
appears. Get rid of vhost_kernel_reset_device() for now. If someone
needs it in the future they'll need to implement it correctly.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-Id: <20231004014532.1228637-3-stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Raphael Norwitz <raphael.norwitz@nutanix.com>
Reviewed-by: Hanna Czenczek <hreitz@redhat.com>
Commit: c0c4f147291f37765a5275aa24c3e1195468903b
https://github.com/qemu/qemu/commit/c0c4f147291f37765a5275aa24c3e1195468903b
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/scsi/vhost-user-scsi.c
M hw/virtio/vhost.c
M hw/virtio/virtio.c
M include/hw/virtio/vhost.h
M meson.build
Log Message:
-----------
virtio: call ->vhost_reset_device() during reset
vhost-user-scsi has a VirtioDeviceClass->reset() function that calls
->vhost_reset_device(). The other vhost devices don't notify the vhost
device upon reset.
Stateful vhost devices may need to handle device reset in order to free
resources or prevent stale device state from interfering after reset.
Call ->vhost_device_reset() from virtio_reset() so that that vhost
devices are notified of device reset.
This patch affects behavior as follows:
- vhost-kernel: No change in behavior since ->vhost_reset_device() is
not implemented.
- vhost-user: back-ends that negotiate
VHOST_USER_PROTOCOL_F_RESET_DEVICE now receive a
VHOST_USER_DEVICE_RESET message upon device reset. Otherwise there is
no change in behavior. DPDK, SPDK, libvhost-user, and the
vhost-user-backend crate do not negotiate
VHOST_USER_PROTOCOL_F_RESET_DEVICE automatically.
- vhost-vdpa: an extra SET_STATUS 0 call is made during device reset.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-Id: <20231004014532.1228637-4-stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Raphael Norwitz <raphael.norwitz@nutanix.com>
Reviewed-by: Hanna Czenczek <hreitz@redhat.com>
Commit: bd7a6d88ec900a9a2c5b3ef09f941558908d3cda
https://github.com/qemu/qemu/commit/bd7a6d88ec900a9a2c5b3ef09f941558908d3cda
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/i386/acpi-build.c
Log Message:
-----------
hw/i386/acpi-build: Remove build-time assertion on PIIX/ICH9 reset registers
being identical
Commit 6103451aeb74 ("hw/i386: Build-time assertion on pc/q35 reset register
being identical.") introduced a build-time check where the addresses of the
reset registers are expected to be equal. Back then rev3 of the FADT was used
which required the reset register to be populated and there was common code.
In commit 3a3fcc75f92a ("pc: acpi: force FADT rev1 for 440fx based machine
types") the FADT was downgraded to rev1 for PIIX where the reset register isn't
available. Thus, there is no need for the assertion any longer, so remove it.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Ani Sinha <anisinha@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20231004092355.12929-1-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 74d7ea50627a60257a92e77402780897075654fd
https://github.com/qemu/qemu/commit/74d7ea50627a60257a92e77402780897075654fd
Author: Damien Zammit <damien@zamaudio.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/timer/i8254_common.c
Log Message:
-----------
timer/i8254: Fix one shot PIT mode
Currently, the one-shot (mode 1) PIT expires far too quickly,
due to the output being set under the wrong logic.
This change fixes the one-shot PIT mode to behave similarly to mode 0.
TESTED: using the one-shot PIT mode to calibrate a local apic timer.
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Message-Id: <20230226015755.52624-1-damien@zamaudio.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 9b50fd02900c11e6e50c7913e5772031749b3e8d
https://github.com/qemu/qemu/commit/9b50fd02900c11e6e50c7913e5772031749b3e8d
Author: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/display/virtio-dmabuf.c
Log Message:
-----------
hw/display: fix memleak from virtio_add_resource
When the given uuid is already present in the hash table,
virtio_add_resource() does not add the passed VirtioSharedObject. In
this case, free it in the callers to avoid leaking memory. This fixed
the following `make check` error, when built with --enable-sanitizers:
4/166 qemu:unit / test-virtio-dmabuf ERROR 1.51s exit status 1
==7716==ERROR: LeakSanitizer: detected memory leaks
Direct leak of 320 byte(s) in 20 object(s) allocated from:
#0 0x7f6fc16e3808 in __interceptor_malloc
../../../../src/libsanitizer/asan/asan_malloc_linux.cc:144
#1 0x7f6fc1503e98 in g_malloc
(/lib/x86_64-linux-gnu/libglib-2.0.so.0+0x57e98)
#2 0x564d63cafb6b in test_add_invalid_resource
../tests/unit/test-virtio-dmabuf.c:100
#3 0x7f6fc152659d (/lib/x86_64-linux-gnu/libglib-2.0.so.0+0x7a59d)
SUMMARY: AddressSanitizer: 320 byte(s) leaked in 20 allocation(s).
The changes at virtio_add_resource() itself are not strictly necessary
for the memleak fix, but they make it more obvious that, on an error
return, the passed object is not added to the hash.
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Message-Id:
<c61c13f9a0c67dec473bdbfc8789c29ef26c900b.1696624734.git.quic_mathbern@quicinc.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Albert Esteve <aesteve@redhat.com>
Signed-off-by: Matheus Tavares Bernardino <<a
href="mailto:quic_mathbern@quicinc.com";
target="_blank">quic_mathbern@quicinc.com</a>><br>
Commit: 9c91051119f8c493a5802c4f5347516679e55552
https://github.com/qemu/qemu/commit/9c91051119f8c493a5802c4f5347516679e55552
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/i386/pc.c
Log Message:
-----------
hw/i386/pc: Merge two if statements into one
By being the only entity assigning a non-NULL value to "rtc_irq", the first if
statement determines whether the second if statement is executed. So merge the
two statements into one.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-2-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: fe9a7350c2900c9609e7a8ce1e042e3458a245e2
https://github.com/qemu/qemu/commit/fe9a7350c2900c9609e7a8ce1e042e3458a245e2
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/i386/pc_piix.c
Log Message:
-----------
hw/i386/pc_piix: Allow for setting properties before realizing PIIX3 south
bridge
The next patches will need to take advantage of it.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231007123843.127151-3-shentey@gmail.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 8b6cf5128ee510729895e00a669fa7ce7457c949
https://github.com/qemu/qemu/commit/8b6cf5128ee510729895e00a669fa7ce7457c949
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/i386/pc_piix.c
Log Message:
-----------
hw/i386/pc_piix: Assign PIIX3's ISA interrupts before its realize()
Unlike its PIIX4 counterpart, TYPE_PIIX3_DEVICE doesn't instantiate a PIC
itself. Instead, it relies on the board to do so. This means that the board
needs to wire the ISA IRQs to the PIIX3 device model. As long as the board
assigns the ISA IRQs after PIIX3's realize(), internal devices can't be wired in
pci_piix3_realize() since the qemu_irqs are still NULL. Fix that by assigning
the ISA interrupts before realize(). This will allow for embedding child devices
into the host device as already done for PIIX4.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-4-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 32f29b26ff150dba6d1c455b826e44447b9ead45
https://github.com/qemu/qemu/commit/32f29b26ff150dba6d1c455b826e44447b9ead45
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/isa/piix3.c
M include/hw/southbridge/piix.h
Log Message:
-----------
hw/isa/piix3: Resolve redundant PIIX_NUM_PIC_IRQS
PIIX_NUM_PIC_IRQS is assumed to be the same as ISA_NUM_IRQS, otherwise
inconsistencies can occur.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231007123843.127151-5-shentey@gmail.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 001cb25f3fb84768db4c1fb0ffd77779e0676745
https://github.com/qemu/qemu/commit/001cb25f3fb84768db4c1fb0ffd77779e0676745
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/i386/pc_piix.c
M hw/isa/piix3.c
M include/hw/southbridge/piix.h
Log Message:
-----------
hw/i386/pc_piix: Wire PIIX3's ISA interrupts by new "isa-irqs" property
Avoid assigning the private member of struct PIIX3State from outside which goes
against best QOM practices. Instead, implement best QOM practice by adding an
"isa-irqs" array property to TYPE_PIIX3_DEVICE and assign it in board code, i.e.
from outside.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-6-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: b9a8b8d29f438b6a695b12bd2d3e0567cbae5dc7
https://github.com/qemu/qemu/commit/b9a8b8d29f438b6a695b12bd2d3e0567cbae5dc7
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/i386/pc_piix.c
Log Message:
-----------
hw/i386/pc_piix: Remove redundant "piix3" variable
The variable is never used by its declared type. Eliminate it.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-7-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 40f70623875b4ae46e04f57cfa7c80b6af917e1b
https://github.com/qemu/qemu/commit/40f70623875b4ae46e04f57cfa7c80b6af917e1b
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/isa/piix3.c
M include/hw/southbridge/piix.h
Log Message:
-----------
hw/isa/piix3: Rename "pic" attribute to "isa_irqs_in"
TYPE_PIIX3_DEVICE doesn't instantiate a PIC since it relies on the board to do
so. The "pic" attribute, however, suggests that there is one. Rename the
attribute to reflect that it represents ISA interrupt lines. Use the same naming
convention as in the VIA south bridges as well as in TYPE_I82378.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-8-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 295385127e83a923e166f8b4fe1e543ee4540018
https://github.com/qemu/qemu/commit/295385127e83a923e166f8b4fe1e543ee4540018
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/i386/pc_q35.c
M hw/isa/lpc_ich9.c
Log Message:
-----------
hw/i386/pc_q35: Wire ICH9 LPC function's interrupts before its realize()
When the board assigns the ISA IRQs after the device's realize(), internal
devices such as the RTC can't be wired in ich9_lpc_realize() since the qemu_irqs
are still NULL. Fix that by assigning the ISA interrupts before realize().
This change is necessary for PIIX consolidation because PIIX4 wires the RTC
interrupts in its realize() method, so PIIX3 needs to do so as well. Since the
PC and Q35 boards share RTC code, and since PIIX3 needs the change, ICH9 needs
to be adapted as well.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-9-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 64127940aeb674cb5d9d8d0ea4ca20591bf2b010
https://github.com/qemu/qemu/commit/64127940aeb674cb5d9d8d0ea4ca20591bf2b010
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/i386/pc_piix.c
M hw/isa/piix3.c
Log Message:
-----------
hw/isa/piix3: Wire PIC IRQs to ISA bus in host device
Thie PIIX3 south bridge implements both the PIC and the ISA bus, so wiring the
interrupts there makes the device model more self-contained. Furthermore, this
allows the ISA interrupts to be wired to internal child devices in
pci_piix3_realize() which will be performed in subsequent patches.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-10-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 56b1f50e3c101bfe5f52bac73de0e88438de11bd
https://github.com/qemu/qemu/commit/56b1f50e3c101bfe5f52bac73de0e88438de11bd
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/i386/pc.c
M hw/isa/lpc_ich9.c
M hw/isa/piix3.c
Log Message:
-----------
hw/i386/pc: Wire RTC ISA IRQs in south bridges
Makes the south bridges a bit more self-contained and aligns PIIX3 more with
PIIX4. The latter is needed for consolidating the PIIX south bridges.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-11-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: e47e5a5b79ffd6b3ca72ea383e3c756b68402735
https://github.com/qemu/qemu/commit/e47e5a5b79ffd6b3ca72ea383e3c756b68402735
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/i386/Kconfig
M hw/i386/pc_piix.c
M hw/isa/Kconfig
M hw/isa/piix3.c
M include/hw/southbridge/piix.h
Log Message:
-----------
hw/isa/piix3: Create IDE controller in host device
The IDE controller is an integral part of PIIX3 (function 1). So create it as
part of the south bridge.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231007123843.127151-12-shentey@gmail.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 6fe4464c05f45e726fcfa4a7927f4ed27444a0ca
https://github.com/qemu/qemu/commit/6fe4464c05f45e726fcfa4a7927f4ed27444a0ca
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/i386/pc_piix.c
M hw/isa/Kconfig
M hw/isa/piix3.c
M include/hw/southbridge/piix.h
Log Message:
-----------
hw/isa/piix3: Create USB controller in host device
The USB controller is an integral part of PIIX3 (function 2). So create
it as part of the south bridge.
Note that the USB function is optional in QEMU. This is why it gets
object_initialize_child()'ed in realize rather than in instance_init.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231007123843.127151-13-shentey@gmail.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 0a15cf0801815a359af211361fba309a2cc5c1e8
https://github.com/qemu/qemu/commit/0a15cf0801815a359af211361fba309a2cc5c1e8
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/i386/pc_piix.c
M hw/isa/Kconfig
M hw/isa/piix3.c
M include/hw/southbridge/piix.h
Log Message:
-----------
hw/isa/piix3: Create power management controller in host device
The power management controller is an integral part of PIIX3 (function 3). So
create it as part of the south bridge.
Note that the ACPI function is optional in QEMU. This is why it gets
object_initialize_child()'ed in realize rather than in instance_init.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231007123843.127151-14-shentey@gmail.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 9769cfc3e419a704ff1d7feb4621da660903499a
https://github.com/qemu/qemu/commit/9769cfc3e419a704ff1d7feb4621da660903499a
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/isa/piix3.c
M include/hw/southbridge/piix.h
Log Message:
-----------
hw/isa/piix3: Drop the "3" from PIIX base class name
TYPE_PIIX3_PCI_DEVICE was the former base class of the Xen and non-Xen variants
of the PIIX3 ISA device models. It will become the base class for the PIIX3 and
PIIX4 device models, so drop the "3" from the type names.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231007123843.127151-15-shentey@gmail.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 06f6efefe06c7958471cbf84c56ccc87624577d8
https://github.com/qemu/qemu/commit/06f6efefe06c7958471cbf84c56ccc87624577d8
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/isa/piix4.c
Log Message:
-----------
hw/isa/piix4: Remove unused inbound ISA interrupt lines
The Malta board, which is the only user of PIIX4, doesn't connect to the
exported interrupt lines. PIIX3 doesn't expose such interrupt lines
either, so remove them for PIIX4 for simplicity and consistency.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231007123843.127151-16-shentey@gmail.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: de710ac40867a409d5e3fbd83940ce9e1f6922d7
https://github.com/qemu/qemu/commit/de710ac40867a409d5e3fbd83940ce9e1f6922d7
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/isa/piix4.c
Log Message:
-----------
hw/isa/piix4: Rename "isa" attribute to "isa_irqs_in"
Rename the "isa" attribute to align it with PIIX3 for consolidation.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-17-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 80ec6f5b574e5368007d8076fd32316765bf4ffb
https://github.com/qemu/qemu/commit/80ec6f5b574e5368007d8076fd32316765bf4ffb
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/isa/piix4.c
Log Message:
-----------
hw/isa/piix4: Rename reset control operations to match PIIX3
Both implementations are the same and will be shared upon merging.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231007123843.127151-18-shentey@gmail.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 74bdcfb4b2ba7958efe8e66e06757579d61ebbb3
https://github.com/qemu/qemu/commit/74bdcfb4b2ba7958efe8e66e06757579d61ebbb3
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/isa/piix4.c
M include/hw/southbridge/piix.h
Log Message:
-----------
hw/isa/piix4: Reuse struct PIIXState from PIIX3
PIIX4 has its own, private PIIX4State structure. PIIX3 has almost the
same structure, provided in a public header. So reuse it and add a
cpu_intr attribute to it which is only used by PIIX4.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-19-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 1697189977032c5bce6e63036277ad4d8ea2f44b
https://github.com/qemu/qemu/commit/1697189977032c5bce6e63036277ad4d8ea2f44b
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M MAINTAINERS
M hw/i386/Kconfig
M hw/isa/Kconfig
M hw/isa/meson.build
A hw/isa/piix.c
R hw/isa/piix3.c
R hw/isa/piix4.c
M hw/mips/Kconfig
Log Message:
-----------
hw/isa/piix3: Merge hw/isa/piix4.c
Now that the PIIX3 and PIIX4 device models are sufficiently prepared, their
implementations can be merged into one file for further consolidation.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231007123843.127151-20-shentey@gmail.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 2d7630f5c7dbe5ec1fc42082d135eb6e5f159ebd
https://github.com/qemu/qemu/commit/2d7630f5c7dbe5ec1fc42082d135eb6e5f159ebd
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/i386/pc_piix.c
M hw/isa/piix.c
M include/hw/southbridge/piix.h
Log Message:
-----------
hw/isa/piix: Allow for optional PIC creation in PIIX3
In the PC machine, the PIC is created in board code to allow it to be
virtualized with various virtualization techniques. So explicitly disable its
creation in the PC machine via a property which defaults to enabled. Once the
PIIX implementations are consolidated this default will keep Malta working
without further ado.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-21-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: ac4330359bee7a8cf3dab7f8639190dd17f1f4d1
https://github.com/qemu/qemu/commit/ac4330359bee7a8cf3dab7f8639190dd17f1f4d1
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/i386/pc_piix.c
M hw/isa/piix.c
M include/hw/southbridge/piix.h
Log Message:
-----------
hw/isa/piix: Allow for optional PIT creation in PIIX3
In the PC machine, the PIT is created in board code to allow it to be
virtualized with various virtualization techniques. So explicitly disable its
creation in the PC machine via a property which defaults to enabled. Once the
PIIX implementations are consolidated this default will keep Malta working
without further ado.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-22-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: f97479cad8447caa1d77c862a0890e6ff1a3acc6
https://github.com/qemu/qemu/commit/f97479cad8447caa1d77c862a0890e6ff1a3acc6
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/isa/piix.c
Log Message:
-----------
hw/isa/piix: Harmonize names of reset control memory regions
There is no need for having different names here. Having the same name
further allows code to be shared between PIIX3 and PIIX4.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231007123843.127151-23-shentey@gmail.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 7d6f26594bc1ea1f9e7d115051e63c3a71cf0b60
https://github.com/qemu/qemu/commit/7d6f26594bc1ea1f9e7d115051e63c3a71cf0b60
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/isa/piix.c
Log Message:
-----------
hw/isa/piix: Share PIIX3's base class with PIIX4
Having a common base class will allow for futher code sharing between PIIX3 and
PIIX4. Moreover, it makes PIIX4 implement the acpi-dev-aml-interface.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231007123843.127151-24-shentey@gmail.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 2922dbc28c74a4b3976cb4bc020980030ccfef67
https://github.com/qemu/qemu/commit/2922dbc28c74a4b3976cb4bc020980030ccfef67
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/isa/piix.c
M hw/mips/malta.c
Log Message:
-----------
hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4
Resolves duplicate code. Also makes PIIX4 respect the PIIX3 properties which get
added, too. This allows for using PIIX4 in the PC machine.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-25-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 2a62c47926420128bb23edd2ba7d4b339db86660
https://github.com/qemu/qemu/commit/2a62c47926420128bb23edd2ba7d4b339db86660
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/isa/piix.c
Log Message:
-----------
hw/isa/piix: Rename functions to be shared for PCI interrupt triggering
PIIX4 will get the same optimizations which are already implemented for
PIIX3.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231007123843.127151-26-shentey@gmail.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 0c9fd5a309c8449c70c727f271baf554491d4ecd
https://github.com/qemu/qemu/commit/0c9fd5a309c8449c70c727f271baf554491d4ecd
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/isa/piix.c
Log Message:
-----------
hw/isa/piix: Reuse PIIX3's PCI interrupt triggering in PIIX4
Speeds up PIIX4 which resolves an old TODO. Also makes PIIX4 compatible with Xen
which relies on pci_bus_fire_intx_routing_notifier() to be fired.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231007123843.127151-27-shentey@gmail.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: a203cc532a18fdb89942fa8c87d332a2a3470379
https://github.com/qemu/qemu/commit/a203cc532a18fdb89942fa8c87d332a2a3470379
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/isa/piix.c
Log Message:
-----------
hw/isa/piix: Resolve duplicate code regarding PCI interrupt wiring
Now that both PIIX3 and PIIX4 use piix_set_irq() to trigger PCI IRQs the wiring
in the respective realize methods can be shared, too.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20231007123843.127151-28-shentey@gmail.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 12cecd45505c239dedc8bad2ded8eab8bc2f0391
https://github.com/qemu/qemu/commit/12cecd45505c239dedc8bad2ded8eab8bc2f0391
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/isa/piix.c
Log Message:
-----------
hw/isa/piix: Implement multi-process QEMU support also for PIIX4
So far multi-process QEMU was only implemented for PIIX3. Move the support into
the base class to achieve feature parity between both device models.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-29-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: aa0c9aec575f6dba4e6548ad9e5de1b1899d843e
https://github.com/qemu/qemu/commit/aa0c9aec575f6dba4e6548ad9e5de1b1899d843e
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M docs/system/target-i386-desc.rst.inc
M hw/i386/pc.c
M hw/i386/pc_piix.c
M include/hw/i386/pc.h
Log Message:
-----------
hw/i386/pc_piix: Make PIIX4 south bridge usable in PC machine
QEMU's PIIX3 implementation actually models the real PIIX4, but with different
PCI IDs. Usually, guests deal just fine with it. Still, in order to provide a
more consistent illusion to guests, allow QEMU's PIIX4 implementation to be used
in the PC machine.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-30-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: f7bd1437ba877e6509fff2b5ffce82500bc79559
https://github.com/qemu/qemu/commit/f7bd1437ba877e6509fff2b5ffce82500bc79559
Author: Li Feng <fengli@smartx.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/scsi/vhost-scsi-common.c
Log Message:
-----------
vhost-user-common: send get_inflight_fd once
Currently the get_inflight_fd will be sent every time the device is started, and
the backend will allocate shared memory to save the inflight state. If the
backend finds that it receives the second get_inflight_fd, it will release the
previous shared memory, which breaks inflight working logic.
This patch is a preparation for the following patches.
Signed-off-by: Li Feng <fengli@smartx.com>
Reviewed-by: Raphael Norwitz <raphael.norwitz@nutanix.com>
Message-Id: <20231009044735.941655-2-fengli@smartx.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 4dfcc09f48c4f81a9a4e2300065edbe6b589a6ce
https://github.com/qemu/qemu/commit/4dfcc09f48c4f81a9a4e2300065edbe6b589a6ce
Author: Li Feng <fengli@smartx.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/block/vhost-user-blk.c
M hw/virtio/vhost-user-gpio.c
M include/hw/virtio/vhost.h
Log Message:
-----------
vhost: move and rename the conn retry times
Multiple devices need this macro, move it to a common header.
Signed-off-by: Li Feng <fengli@smartx.com>
Reviewed-by: Raphael Norwitz <raphael.norwitz@nutanix.com>
Message-Id: <20231009044735.941655-3-fengli@smartx.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 7962e432b4e40e4395a93aa121045c58f34195fb
https://github.com/qemu/qemu/commit/7962e432b4e40e4395a93aa121045c58f34195fb
Author: Li Feng <fengli@smartx.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/scsi/vhost-scsi-common.c
M hw/scsi/vhost-scsi.c
M hw/scsi/vhost-user-scsi.c
M include/hw/virtio/vhost-scsi-common.h
M include/hw/virtio/vhost-user-scsi.h
Log Message:
-----------
vhost-user-scsi: support reconnect to backend
If the backend crashes and restarts, the device is broken.
This patch adds reconnect for vhost-user-scsi.
This patch also improves the error messages, and reports some silent errors.
Tested with spdk backend.
Signed-off-by: Li Feng <fengli@smartx.com>
Message-Id: <20231009044735.941655-4-fengli@smartx.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
Commit: a6a30a7ec01c743fe71ab7461655d89afe152fcf
https://github.com/qemu/qemu/commit/a6a30a7ec01c743fe71ab7461655d89afe152fcf
Author: Li Feng <fengli@smartx.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/scsi/vhost-user-scsi.c
Log Message:
-----------
vhost-user-scsi: start vhost when guest kicks
Let's keep the same behavior as vhost-user-blk.
Some old guests kick virtqueue before setting VIRTIO_CONFIG_S_DRIVER_OK.
Signed-off-by: Li Feng <fengli@smartx.com>
Reviewed-by: Raphael Norwitz <raphael.norwitz@nutanix.com>
Message-Id: <20231009044735.941655-5-fengli@smartx.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: f02a4b8e6431598612466f76aac64ab492849abf
https://github.com/qemu/qemu/commit/f02a4b8e6431598612466f76aac64ab492849abf
Author: Li Feng <fengli@smartx.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/block/vhost-user-blk.c
M hw/scsi/vhost-user-scsi.c
M hw/virtio/vhost-user-gpio.c
M hw/virtio/vhost-user.c
M include/hw/virtio/vhost-user.h
Log Message:
-----------
vhost-user: fix lost reconnect
When the vhost-user is reconnecting to the backend, and if the vhost-user fails
at the get_features in vhost_dev_init(), then the reconnect will fail
and it will not be retriggered forever.
The reason is:
When the vhost-user fails at get_features, the vhost_dev_cleanup will be called
immediately.
vhost_dev_cleanup calls 'memset(hdev, 0, sizeof(struct vhost_dev))'.
The reconnect path is:
vhost_user_blk_event
vhost_user_async_close(.. vhost_user_blk_disconnect ..)
qemu_chr_fe_set_handlers <----- clear the notifier callback
schedule vhost_user_async_close_bh
The vhost->vdev is null, so the vhost_user_blk_disconnect will not be
called, then the event fd callback will not be reinstalled.
All vhost-user devices have this issue, including vhost-user-blk/scsi.
With this patch, if the vdev->vdev is null, the fd callback will still
be reinstalled.
Fixes: 71e076a07d ("hw/virtio: generalise CHR_EVENT_CLOSED handling")
Signed-off-by: Li Feng <fengli@smartx.com>
Reviewed-by: Raphael Norwitz <raphael.norwitz@nutanix.com>
Message-Id: <20231009044735.941655-6-fengli@smartx.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 4076bc86a3afd626338f2e3d018f6b884a972143
https://github.com/qemu/qemu/commit/4076bc86a3afd626338f2e3d018f6b884a972143
Author: Ani Sinha <anisinha@redhat.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/i386/pc.c
Log Message:
-----------
hw/i386/cxl: ensure maxram is greater than ram size for calculating cxl range
pc_get_device_memory_range() finds the device memory size by calculating the
difference between maxram and ram sizes. This calculation makes sense only when
maxram is greater than the ram size. Make sure we check for that before calling
pc_get_device_memory_range().
Signed-off-by: Ani Sinha <anisinha@redhat.com>
Message-Id: <20231011105335.42296-1-anisinha@redhat.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 57a6beacd88b67af7ca9dbaf29800442a0e1bfed
https://github.com/qemu/qemu/commit/57a6beacd88b67af7ca9dbaf29800442a0e1bfed
Author: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tests/qtest/bios-tables-test-allowed-diff.h
Log Message:
-----------
tests/acpi: Allow update of DSDT.cxl
Addition of QTG in following patch requires an update to the test
data.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Message-Id: <20231012125623.21101-2-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 6cdd46f66ff91a9c13c5dc4d018ae53d2f28d74a
https://github.com/qemu/qemu/commit/6cdd46f66ff91a9c13c5dc4d018ae53d2f28d74a
Author: Dave Jiang <dave.jiang@intel.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/acpi/cxl.c
M hw/i386/acpi-build.c
M include/hw/acpi/cxl.h
Log Message:
-----------
hw/cxl: Add QTG _DSM support for ACPI0017 device
Add a simple _DSM call support for the ACPI0017 device to return fake QTG
ID values of 0 and 1 in all cases. This for _DSM plumbing testing from the OS.
Following edited for readability
Device (CXLM)
{
Name (_HID, "ACPI0017") // _HID: Hardware ID
...
Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
{
If ((Arg0 == ToUUID ("f365f9a6-a7de-4071-a66a-b40c0b4f8e52")))
{
If ((Arg2 == Zero))
{
Return (Buffer (One) { 0x01 })
}
If ((Arg2 == One))
{
Return (Package (0x02)
{
One,
Package (0x02)
{
Zero,
One
}
})
}
}
}
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20231012125623.21101-3-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: e0c72452559ea8dd723c5f13c64318cd1d1fef4c
https://github.com/qemu/qemu/commit/e0c72452559ea8dd723c5f13c64318cd1d1fef4c
Author: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tests/data/acpi/q35/DSDT.cxl
M tests/qtest/bios-tables-test-allowed-diff.h
Log Message:
-----------
tests/acpi: Update DSDT.cxl with QTG DSM
Description of change in previous patch.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Message-Id: <20231012125623.21101-4-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: d4eb50380807f5e881cbb66630f210e3e6eb9750
https://github.com/qemu/qemu/commit/d4eb50380807f5e881cbb66630f210e3e6eb9750
Author: Hanna Czenczek <hreitz@redhat.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M docs/interop/vhost-user.rst
M include/hw/virtio/vhost-user.h
M subprojects/libvhost-user/libvhost-user.h
Log Message:
-----------
vhost-user: Fix protocol feature bit conflict
The VHOST_USER_PROTOCOL_F_XEN_MMAP feature bit was defined in
f21e95ee97d, which has been part of qemu's 8.1.0 release. However, it
seems it was never added to qemu's code, but it is well possible that it
is already used by different front-ends outside of qemu (i.e., Xen).
VHOST_USER_PROTOCOL_F_SHARED_OBJECT in contrast was added to qemu's code
in 16094766627, but never defined in the vhost-user specification. As a
consequence, both bits were defined to be 17, which cannot work.
Regardless of whether actual code or the specification should take
precedence, F_XEN_MMAP is already part of a qemu release, while
F_SHARED_OBJECT is not. Therefore, bump the latter to take number 18
instead of 17, and add this to the specification.
Take the opportunity to add at least a little note on the
VhostUserShared structure to the specification. This structure is
referenced by the new commands introduced in 16094766627, but was not
defined.
Fixes: 160947666276c5b7f6bca4d746bcac2966635d79
("vhost-user: add shared_object msg")
Signed-off-by: Hanna Czenczek <hreitz@redhat.com>
Message-Id: <20231016083201.23736-1-hreitz@redhat.com>
Reviewed-by: Emmanouil Pitsidianakis <manos.pitsidianakis@linaro.org>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 5e7abc29c56f7823f9a122898685bdfcfac2e522
https://github.com/qemu/qemu/commit/5e7abc29c56f7823f9a122898685bdfcfac2e522
Author: Thomas Huth <thuth@redhat.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Add include/hw/intc/i8259.h to the PC chip section
i8259.c is already listed here, so the corresponding header should
be mentioned in this section, too.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20231017152625.229022-1-thuth@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: c7016bf700cfbee52d2797bc4c592a39b17c4de7
https://github.com/qemu/qemu/commit/c7016bf700cfbee52d2797bc4c592a39b17c4de7
Author: David Woodhouse <dwmw@amazon.co.uk>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M hw/i386/intel_iommu.c
M hw/i386/intel_iommu_internal.h
Log Message:
-----------
intel-iommu: Report interrupt remapping faults, fix return value
A generic X86IOMMUClass->int_remap function should not return VT-d
specific values; fix it to return 0 if the interrupt was successfully
translated or -EINVAL if not.
The VTD_FR_IR_xxx values are supposed to be used to actually raise
faults through the fault reporting mechanism, so do that instead for
the case where the IRQ is actually being injected.
There is more work to be done here, as pretranslations for the KVM IRQ
routing table can't fault; an untranslatable IRQ should be handled in
userspace and the fault raised only when the IRQ actually happens (if
indeed the IRTE is still not valid at that time). But we can work on
that later; we can at least raise faults for the direct case.
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Message-Id: <31bbfc9041690449d3ac891f4431ec82174ee1b4.camel@infradead.org>
Acked-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 096d118592caa03188db6a190988221b65a2bd81
https://github.com/qemu/qemu/commit/096d118592caa03188db6a190988221b65a2bd81
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Untabify tcg-target.c.inc
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 03434d52024934620a001a875b540b06abd0b169
https://github.com/qemu/qemu/commit/03434d52024934620a001a875b540b06abd0b169
Author: Jordan Niethe <jniethe5@gmail.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Enable direct branching tcg_out_goto_tb with TCG_REG_TB
Direct branch patching was disabled when using TCG_REG_TB in commit
736a1588c1 ("tcg/ppc: Fix race in goto_tb implementation").
The issue with direct branch patching with TCG_REG_TB is the lack of
synchronization between the new TCG_REG_TB being established and the
direct branch being patched in.
If each translation block is responsible for establishing its own
TCG_REG_TB then there can be no synchronization issue.
Make each translation block begin by setting up its own TCG_REG_TB.
Use the preferred 'bcl 20,31,$+4' sequence.
Signed-off-by: Jordan Niethe <jniethe5@gmail.com>
[rth: Split out tcg_out_tb_start, power9 addpcis]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 4430b60c7f201eefac28c711c1bf93983e5966e9
https://github.com/qemu/qemu/commit/4430b60c7f201eefac28c711c1bf93983e5966e9
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Reinterpret tb-relative to TB+4
It saves one insn to load the address of TB+4 instead of TB.
Adjust all of the indexing to match.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 3acd75b851759ccfa70a900c04d9ca030140de01
https://github.com/qemu/qemu/commit/3acd75b851759ccfa70a900c04d9ca030140de01
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Use ADDPCIS in tcg_out_tb_start
With ISA v3.0, we can use ADDPCIS instead of BCL+MFLR to load NIA.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 776cd9b64834d735db9c4cac7924497509739755
https://github.com/qemu/qemu/commit/776cd9b64834d735db9c4cac7924497509739755
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Use ADDPCIS in tcg_out_movi_int
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 7a379976d6f12d44d8c97dd4ae68dab5240475b3
https://github.com/qemu/qemu/commit/7a379976d6f12d44d8c97dd4ae68dab5240475b3
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Use ADDPCIS for the constant pool
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 4a388c7932322476e2395eed350ee6b23a08bf87
https://github.com/qemu/qemu/commit/4a388c7932322476e2395eed350ee6b23a08bf87
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Use ADDPCIS in tcg_out_goto_tb
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 103044e4062c55b956617971985c6baa8843ed6b
https://github.com/qemu/qemu/commit/103044e4062c55b956617971985c6baa8843ed6b
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Use PADDI in tcg_out_movi
PADDI can load 34-bit immediates and 34-bit pc-relative addresses.
Reviewed-by: Jordan Niethe <jniethe5@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 1f8e4dc182b7ee8240a4d016162847ff4b581399
https://github.com/qemu/qemu/commit/1f8e4dc182b7ee8240a4d016162847ff4b581399
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Use prefixed instructions in tcg_out_mem_long
When the offset is out of range of the non-prefixed insn, but
fits the 34-bit immediate of the prefixed insn, use that.
Reviewed-by: Jordan Niethe <jniethe5@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d90b23af6dedb93384c8964882d9fad4af0f3cab
https://github.com/qemu/qemu/commit/d90b23af6dedb93384c8964882d9fad4af0f3cab
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Use PLD in tcg_out_movi for constant pool
The prefixed instruction has a pc-relative form to use here.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: c90f897a541951821af1abdadca3b68c3f74c3ae
https://github.com/qemu/qemu/commit/c90f897a541951821af1abdadca3b68c3f74c3ae
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Use prefixed instructions in tcg_out_dupi_vec
The prefixed instructions have a pc-relative form to use here.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 1958dbbd2a79b9fe7cae80da66e04e11b86f5455
https://github.com/qemu/qemu/commit/1958dbbd2a79b9fe7cae80da66e04e11b86f5455
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Use PLD in tcg_out_goto_tb
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: cc3f99aac41903362521fac551b835abe369659a
https://github.com/qemu/qemu/commit/cc3f99aac41903362521fac551b835abe369659a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Disable TCG_REG_TB for Power9/Power10
This appears to slightly improve performance on power9/10.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 397cabaae035102afb547155757fd506620b2bb2
https://github.com/qemu/qemu/commit/397cabaae035102afb547155757fd506620b2bb2
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M include/tcg/tcg.h
M tcg/tcg-op-ldst.c
M tcg/tcg.c
Log Message:
-----------
tcg: Introduce tcg_use_softmmu
Begin disconnecting CONFIG_SOFTMMU from !CONFIG_USER_ONLY.
Introduce a variable which can be set at startup to select
one method or another for user-only.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 23088ca0bcf491eaa3e99a2760cf85f4cd7a3bce
https://github.com/qemu/qemu/commit/23088ca0bcf491eaa3e99a2760cf85f4cd7a3bce
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/tcg.c
Log Message:
-----------
tcg: Provide guest_base fallback for system mode
Provide a define to allow !tcg_use_softmmu code paths to
compile in system mode, but require elimination.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 2c53bdf110ef09422ceed89357a7dd8fc7d0b7a8
https://github.com/qemu/qemu/commit/2c53bdf110ef09422ceed89357a7dd8fc7d0b7a8
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/arm/tcg-target.c.inc
Log Message:
-----------
tcg/arm: Use tcg_use_softmmu
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e2b7a40d05c682e8a254d9f664b368af9fdb1e8f
https://github.com/qemu/qemu/commit/e2b7a40d05c682e8a254d9f664b368af9fdb1e8f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
Log Message:
-----------
tcg/aarch64: Use tcg_use_softmmu
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 915e1d52e205cdfa85cfc848e022b470f35a090e
https://github.com/qemu/qemu/commit/915e1d52e205cdfa85cfc848e022b470f35a090e
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/i386/tcg-target.c.inc
Log Message:
-----------
tcg/i386: Use tcg_use_softmmu
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 10e1fd2784e59e1781ce09f65b0499784938e83b
https://github.com/qemu/qemu/commit/10e1fd2784e59e1781ce09f65b0499784938e83b
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/loongarch64/tcg-target.c.inc
Log Message:
-----------
tcg/loongarch64: Use tcg_use_softmmu
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e3a650cd9dca1d10df8ac426fc59736e009ebd7f
https://github.com/qemu/qemu/commit/e3a650cd9dca1d10df8ac426fc59736e009ebd7f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/mips/tcg-target.c.inc
Log Message:
-----------
tcg/mips: Use tcg_use_softmmu
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 5b5bd4a9b1ddd724b5f12725fa186e75047dbfe1
https://github.com/qemu/qemu/commit/5b5bd4a9b1ddd724b5f12725fa186e75047dbfe1
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Use tcg_use_softmmu
Fix TCG_GUEST_BASE_REG to use 'TCG_REG_R30' instead of '30'.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: cf0ed30eb10c7341fd1f253446e3bbb6e0114c30
https://github.com/qemu/qemu/commit/cf0ed30eb10c7341fd1f253446e3bbb6e0114c30
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/riscv/tcg-target.c.inc
Log Message:
-----------
tcg/riscv: Do not reserve TCG_GUEST_BASE_REG for guest_base zero
Fixes: 92c041c59b ("tcg/riscv: Add the prologue generation and register the
JIT")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 4944d359107fa3e88200697daef28e3b5878daa6
https://github.com/qemu/qemu/commit/4944d359107fa3e88200697daef28e3b5878daa6
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/riscv/tcg-target.c.inc
Log Message:
-----------
tcg/riscv: Use tcg_use_softmmu
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 2e486b5901986134863487352df961331a2b56c2
https://github.com/qemu/qemu/commit/2e486b5901986134863487352df961331a2b56c2
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/s390x/tcg-target.c.inc
Log Message:
-----------
tcg/s390x: Use tcg_use_softmmu
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 40f40fc8f09edd8db620786a16a927e711257ff2
https://github.com/qemu/qemu/commit/40f40fc8f09edd8db620786a16a927e711257ff2
Author: Mike Frysinger <vapier@gentoo.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M include/tcg/tcg-op.h
Log Message:
-----------
tcg: drop unused tcg_temp_free define
Use of the API was removed a while back, but the define wasn't.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20231015010046.16020-1-vapier@gentoo.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: bfefdbea9ee491842d4e61e54f97508c040913a8
https://github.com/qemu/qemu/commit/bfefdbea9ee491842d4e61e54f97508c040913a8
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/tcg-op.c
Log Message:
-----------
tcg: Use constant zero when expanding with divu2
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d97f8f394184403beb655f5f077bef8ef83ffa3a
https://github.com/qemu/qemu/commit/d97f8f394184403beb655f5f077bef8ef83ffa3a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M tcg/optimize.c
Log Message:
-----------
tcg: Optimize past conditional branches
We already register allocate through extended basic blocks,
optimize through extended basic blocks as well.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: a01d9792a737f371a5050c483097e38eab9fa81c
https://github.com/qemu/qemu/commit/a01d9792a737f371a5050c483097e38eab9fa81c
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M include/tcg/tcg-op-common.h
M tcg/tcg-op.c
Log Message:
-----------
tcg: Add tcg_gen_{ld,st}_i128
Do not require the translators to jump through concat and
extract of i64 in order to move values to and from env.
Tested-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 46c684c86260489eef485311aa76bb7aa94cedfc
https://github.com/qemu/qemu/commit/46c684c86260489eef485311aa76bb7aa94cedfc
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M target/i386/tcg/translate.c
Log Message:
-----------
target/i386: Use i128 for 128 and 256-bit loads and stores
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 93c86ecd77a308e023fe158936abc78ea01072d5
https://github.com/qemu/qemu/commit/93c86ecd77a308e023fe158936abc78ea01072d5
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M include/tcg/tcg-op-common.h
M include/tcg/tcg-op.h
M tcg/tcg-op.c
Log Message:
-----------
tcg: add negsetcondi
This can be useful to write a shift bit extraction that does not
depend on TARGET_LONG_BITS.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20231019104648.389942-15-pbonzini@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: f1c29532e7f85932d541fc733fda82e8cf887311
https://github.com/qemu/qemu/commit/f1c29532e7f85932d541fc733fda82e8cf887311
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M include/tcg/tcg-op-common.h
M include/tcg/tcg-op.h
M tcg/tcg-op-ldst.c
Log Message:
-----------
tcg: Export tcg_gen_ext_{i32,i64,tl}
The two concrete type functions already existed, merely needing
a bit of hardening to invalid inputs.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: c048b68385c2146931ea032d775479a8ab1cddf3
https://github.com/qemu/qemu/commit/c048b68385c2146931ea032d775479a8ab1cddf3
Author: Paolo Bonzini <pbonzini@redhat.com>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M include/exec/target_long.h
Log Message:
-----------
tcg: Define MO_TL
This will also come in handy later for "less than" comparisons.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <03ba02fd-fade-4409-be16-2f81a5690b4c@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 2f02c14b21cfe0954e203353af21cd41bce76822
https://github.com/qemu/qemu/commit/2f02c14b21cfe0954e203353af21cd41bce76822
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M target/arm/tcg/translate-a64.c
Log Message:
-----------
target/arm: Use tcg_gen_ext_i64
The ext_and_shift_reg helper does this plus a shift.
The non-zero check for shift count is duplicate to
the one done within tcg_gen_shli_i64.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 23f3d586e4da86b86df8ab38e8dacad8a804ed3f
https://github.com/qemu/qemu/commit/23f3d586e4da86b86df8ab38e8dacad8a804ed3f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M target/i386/tcg/translate.c
Log Message:
-----------
target/i386: Use tcg_gen_ext_tl
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 443025e4d0f71bb82fe80369032bf1a04f433352
https://github.com/qemu/qemu/commit/443025e4d0f71bb82fe80369032bf1a04f433352
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M target/m68k/translate.c
Log Message:
-----------
target/m68k: Use tcg_gen_ext_i32
We still need to check OS_{BYTE,WORD,LONG},
because m68k includes floating point in OS_*.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 0d67249c6d30a626434815c4fc39ab6bc60708f6
https://github.com/qemu/qemu/commit/0d67249c6d30a626434815c4fc39ab6bc60708f6
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M target/rx/translate.c
Log Message:
-----------
target/rx: Use tcg_gen_ext_i32
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 8b8bb295489fe8853a650aabf7349cd7aa6d1e9c
https://github.com/qemu/qemu/commit/8b8bb295489fe8853a650aabf7349cd7aa6d1e9c
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M target/tricore/translate.c
Log Message:
-----------
target/tricore: Use tcg_gen_*extract_tl
The EXTR instructions can use the extract opcodes.
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e40df3522b384d3b7dd38187d735bd6228b20e47
https://github.com/qemu/qemu/commit/e40df3522b384d3b7dd38187d735bd6228b20e47
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-22 (Sun, 22 Oct 2023)
Changed paths:
M target/xtensa/translate.c
Log Message:
-----------
target/xtensa: Use tcg_gen_sextract_i32
Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 338cf82fbe2ba00afba89e5e77e6ae576e35d751
https://github.com/qemu/qemu/commit/338cf82fbe2ba00afba89e5e77e6ae576e35d751
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-10-23 (Mon, 23 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
Merge tag 'hw-misc-20231020' of https://github.com/philmd/qemu into staging
Misc hardware patch queue
- MAINTAINERS updates (Zoltan, Thomas)
- Fix cutils::get_relocated_path on Windows host (Akihiko)
- Housekeeping in Memory APIs (Marc-André)
- SDHCI fix for SDMA transfer (Lu, Jianxian)
- Various QOM/QDev/SysBus cleanups (Philippe)
- Constify QemuInputHandler structure (Philippe)
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[full]
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* tag 'hw-misc-20231020' of https://github.com/philmd/qemu: (41 commits)
ui/input: Constify QemuInputHandler structure
hw/net: Declare link using static DEFINE_PROP_LINK() macro
hw/dma: Declare link using static DEFINE_PROP_LINK() macro
hw/scsi/virtio-scsi: Use VIRTIO_SCSI_COMMON() macro
hw/display/virtio-gpu: Use VIRTIO_DEVICE() macro
hw/block/vhost-user-blk: Use DEVICE() / VIRTIO_DEVICE() macros
hw/virtio/virtio-pmem: Replace impossible check by assertion
hw/s390x/css-bridge: Realize sysbus device before accessing it
hw/isa: Realize ISA bridge device before accessing it
hw/arm/virt: Realize ARM_GICV2M sysbus device before accessing it
hw/acpi: Realize ACPI_GED sysbus device before accessing it
hw/pci-host/bonito: Do not use SysBus API to map local MMIO region
hw/misc/allwinner-dramc: Do not use SysBus API to map local MMIO region
hw/misc/allwinner-dramc: Move sysbus_mmio_map call from init -> realize
hw/i386/intel_iommu: Do not use SysBus API to map local MMIO region
hw/i386/amd_iommu: Do not use SysBus API to map local MMIO region
hw/intc/spapr_xive: Do not use SysBus API to map local MMIO region
hw/intc/spapr_xive: Move sysbus_init_mmio() calls around
hw/ppc/pnv: Do not use SysBus API to map local MMIO region
hw/ppc/pnv_xscom: Do not use SysBus API to map local MMIO region
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Commit: b093277edc8175a19189c62bd51e91ea93ef1673
https://github.com/qemu/qemu/commit/b093277edc8175a19189c62bd51e91ea93ef1673
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-10-23 (Mon, 23 Oct 2023)
Changed paths:
M MAINTAINERS
M hw/ppc/ppc440_bamboo.c
M hw/ppc/ppc440_uc.c
M hw/ppc/virtex_ml507.c
M hw/rdma/vmw/pvrdma_cmd.c
Log Message:
-----------
Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging
trivial patches for 2023-10-21
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# gpg: Signature made Sat 21 Oct 2023 05:03:48 PDT
# gpg: using RSA key 7B73BAD68BE7A2C289314B22701B4F6B1A693E59
# gpg: issuer "mjt@tls.msk.ru"
# gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" [full]
# gpg: aka "Michael Tokarev <mjt@corpit.ru>" [full]
# gpg: aka "Michael Tokarev <mjt@debian.org>" [full]
# Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D 4324 457C E0A0 8044 65C5
# Subkey fingerprint: 7B73 BAD6 8BE7 A2C2 8931 4B22 701B 4F6B 1A69 3E59
* tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu:
MAINTAINERS: Add the ompic.c file to the or1k-sim section
MAINTAINERS: Fix typo in openpic_kvm.c entry
MAINTAINERS: Add unvalued folders in tests/tcg/ to the right sections
MAINTAINERS: Add PPC common files to PowerPC TCG CPUs
MAINTAINERS: Add fw_cfg.c to PPC mac99 machine
MAINTAINERS: Adjust file list for PPC pseries machine
MAINTAINERS: Adjust file list for PPC e500 machines
MAINTAINERS: Adjust file list for PPC 4xx CPUs
MAINTAINERS: Adjust file list for PPC ref405ep machine
ppc/{bamboo, virtex_ml507}: Remove useless dependency on ppc405.h header
MAINTAINERS: Fix a couple s390 paths
MAINTAINERS: Add docs/devel/ebpf_rss.rst to the EBPF section
MAINTAINERS: Add include/hw/intc/i8259.h to the PC chip section
MAINTAINERS: Add the nios2 interrupt controller to the nios2 section
MAINTAINERS: Cover hw/ppc/ppc440_uc.c with Sam460ex board
hw/ppc/ppc440_uc: Remove dead l2sram_update_mappings()
hw/rdma/vmw/pvrdma_cmd: Use correct struct in query_port()
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Commit: 1b4a5a20daab8fe787dd8cef1c13973d44a0bcf0
https://github.com/qemu/qemu/commit/1b4a5a20daab8fe787dd8cef1c13973d44a0bcf0
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-10-23 (Mon, 23 Oct 2023)
Changed paths:
M MAINTAINERS
M docs/interop/vhost-user.rst
M docs/system/target-i386-desc.rst.inc
M hw/acpi/cxl.c
M hw/block/vhost-user-blk.c
M hw/display/virtio-dmabuf.c
M hw/i386/Kconfig
M hw/i386/acpi-build.c
M hw/i386/intel_iommu.c
M hw/i386/intel_iommu_internal.h
M hw/i386/pc.c
M hw/i386/pc_piix.c
M hw/i386/pc_q35.c
M hw/isa/Kconfig
M hw/isa/lpc_ich9.c
M hw/isa/meson.build
A hw/isa/piix.c
R hw/isa/piix3.c
R hw/isa/piix4.c
M hw/mips/Kconfig
M hw/mips/malta.c
M hw/scsi/vhost-scsi-common.c
M hw/scsi/vhost-scsi.c
M hw/scsi/vhost-user-scsi.c
M hw/timer/i8254_common.c
M hw/virtio/vhost-backend.c
M hw/virtio/vhost-shadow-virtqueue.c
M hw/virtio/vhost-shadow-virtqueue.h
M hw/virtio/vhost-user-gpio.c
M hw/virtio/vhost-user.c
M hw/virtio/vhost.c
M hw/virtio/virtio.c
M include/exec/memory.h
M include/hw/acpi/cxl.h
M include/hw/i386/pc.h
M include/hw/southbridge/piix.h
M include/hw/virtio/vhost-scsi-common.h
M include/hw/virtio/vhost-user-scsi.h
M include/hw/virtio/vhost-user.h
M include/hw/virtio/vhost.h
M meson.build
M net/vhost-vdpa.c
M subprojects/libvhost-user/libvhost-user.h
M tests/data/acpi/q35/DSDT.cxl
Log Message:
-----------
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu
into staging
virtio,pc,pci: features, cleanups
infrastructure for vhost-vdpa shadow work
piix south bridge rework
reconnect for vhost-user-scsi
dummy ACPI QTG DSM for cxl
tests, cleanups, fixes all over the place
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# -----BEGIN PGP SIGNATURE-----
#
# iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmU06PMPHG1zdEByZWRo
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# 7UBmyC+kacVyybZatq69aK2BHKFtiIRlT78d9Izgtjmp8V7oyKoz14Esh8wkE+FT
# ypHUa70Addi6alNm6BVkm7bxZxi0Wrmf3THqF8ViYvufzHKl7JR5e17fKWEG0BqV
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# zDOuXCCskUWuRapiCwY0E4g7cCaT8/JR6JjjBaTgkjJgvo5Y8Eg=
# =ILek
# -----END PGP SIGNATURE-----
# gpg: Signature made Sun 22 Oct 2023 02:18:43 PDT
# gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469
# gpg: issuer "mst@redhat.com"
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full]
# gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full]
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67
# Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (62
commits)
intel-iommu: Report interrupt remapping faults, fix return value
MAINTAINERS: Add include/hw/intc/i8259.h to the PC chip section
vhost-user: Fix protocol feature bit conflict
tests/acpi: Update DSDT.cxl with QTG DSM
hw/cxl: Add QTG _DSM support for ACPI0017 device
tests/acpi: Allow update of DSDT.cxl
hw/i386/cxl: ensure maxram is greater than ram size for calculating cxl range
vhost-user: fix lost reconnect
vhost-user-scsi: start vhost when guest kicks
vhost-user-scsi: support reconnect to backend
vhost: move and rename the conn retry times
vhost-user-common: send get_inflight_fd once
hw/i386/pc_piix: Make PIIX4 south bridge usable in PC machine
hw/isa/piix: Implement multi-process QEMU support also for PIIX4
hw/isa/piix: Resolve duplicate code regarding PCI interrupt wiring
hw/isa/piix: Reuse PIIX3's PCI interrupt triggering in PIIX4
hw/isa/piix: Rename functions to be shared for PCI interrupt triggering
hw/isa/piix: Reuse PIIX3 base class' realize method in PIIX4
hw/isa/piix: Share PIIX3's base class with PIIX4
hw/isa/piix: Harmonize names of reset control memory regions
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Commit: a95260486aa7e78d7c7194eba65cf03311ad94ad
https://github.com/qemu/qemu/commit/a95260486aa7e78d7c7194eba65cf03311ad94ad
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-10-23 (Mon, 23 Oct 2023)
Changed paths:
M include/exec/target_long.h
M include/tcg/tcg-op-common.h
M include/tcg/tcg-op.h
M include/tcg/tcg.h
M target/arm/tcg/translate-a64.c
M target/i386/tcg/translate.c
M target/m68k/translate.c
M target/rx/translate.c
M target/tricore/translate.c
M target/xtensa/translate.c
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
M tcg/i386/tcg-target.c.inc
M tcg/loongarch64/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/optimize.c
M tcg/ppc/tcg-target.c.inc
M tcg/riscv/tcg-target.c.inc
M tcg/s390x/tcg-target.c.inc
M tcg/tcg-op-ldst.c
M tcg/tcg-op.c
M tcg/tcg.c
Log Message:
-----------
Merge tag 'pull-tcg-20231023' of https://gitlab.com/rth7680/qemu into staging
tcg: Drop unused tcg_temp_free define
tcg: Introduce tcg_use_softmmu
tcg: Optimize past conditional branches
tcg: Use constant zero when expanding with divu2
tcg: Add negsetcondi
tcg: Define MO_TL
tcg: Export tcg_gen_ext_{i32,i64,tl}
target/*: Use tcg_gen_ext_*
tcg/ppc: Enable direct branching tcg_out_goto_tb with TCG_REG_TB
tcg/ppc: Use ADDPCIS for power9
tcg/ppc: Use prefixed instructions for power10
tcg/ppc: Disable TCG_REG_TB for Power9/Power10
tcg/ppc: Enable direct branching tcg_out_goto_tb with TCG_REG_TB
tcg/ppc: Use ADDPCIS for power9
tcg/ppc: Use prefixed instructions for power10
tcg/ppc: Disable TCG_REG_TB for Power9/Power10
# -----BEGIN PGP SIGNATURE-----
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# =lgiT
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 23 Oct 2023 11:11:43 PDT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
[full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-tcg-20231023' of https://gitlab.com/rth7680/qemu: (38 commits)
target/xtensa: Use tcg_gen_sextract_i32
target/tricore: Use tcg_gen_*extract_tl
target/rx: Use tcg_gen_ext_i32
target/m68k: Use tcg_gen_ext_i32
target/i386: Use tcg_gen_ext_tl
target/arm: Use tcg_gen_ext_i64
tcg: Define MO_TL
tcg: Export tcg_gen_ext_{i32,i64,tl}
tcg: add negsetcondi
target/i386: Use i128 for 128 and 256-bit loads and stores
tcg: Add tcg_gen_{ld,st}_i128
tcg: Optimize past conditional branches
tcg: Use constant zero when expanding with divu2
tcg: drop unused tcg_temp_free define
tcg/s390x: Use tcg_use_softmmu
tcg/riscv: Use tcg_use_softmmu
tcg/riscv: Do not reserve TCG_GUEST_BASE_REG for guest_base zero
tcg/ppc: Use tcg_use_softmmu
tcg/mips: Use tcg_use_softmmu
tcg/loongarch64: Use tcg_use_softmmu
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Compare: https://github.com/qemu/qemu/compare/384dbdda94c0...a95260486aa7