[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-commits] [qemu/qemu] e5dc72: accel: Rename accel_cpu_realizefn() -
|
From: |
Alex Bennée |
|
Subject: |
[Qemu-commits] [qemu/qemu] e5dc72: accel: Rename accel_cpu_realizefn() -> accel_cpu_r... |
|
Date: |
Thu, 05 Oct 2023 08:56:54 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: e5dc722ca9f8b02da21e0fd7852a44b65a5686c6
https://github.com/qemu/qemu/commit/e5dc722ca9f8b02da21e0fd7852a44b65a5686c6
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-03 (Tue, 03 Oct 2023)
Changed paths:
M accel/accel-common.c
M cpu.c
M include/qemu/accel.h
M target/i386/kvm/kvm-cpu.c
Log Message:
-----------
accel: Rename accel_cpu_realizefn() -> accel_cpu_realize()
We use the '*fn' suffix for handlers, this is a public method.
Drop the suffix.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <20231003123026.99229-2-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 6294e502a95e64f75d63bd95c5a24aa4d7f00196
https://github.com/qemu/qemu/commit/6294e502a95e64f75d63bd95c5a24aa4d7f00196
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-03 (Tue, 03 Oct 2023)
Changed paths:
M accel/accel-common.c
M include/hw/core/accel-cpu.h
M target/i386/hvf/hvf-cpu.c
M target/i386/kvm/kvm-cpu.c
M target/i386/tcg/tcg-cpu.c
Log Message:
-----------
accel: Rename AccelCPUClass::cpu_realizefn() -> cpu_target_realize()
The AccelCPUClass::cpu_realizefn handler is meant for target
specific code, rename it using '_target_' to emphasis it.
Suggested-by: Claudio Fontana <cfontana@suse.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20231003123026.99229-3-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: bd684b2f3f57dd390ba715fce1597eb7ad97ee8d
https://github.com/qemu/qemu/commit/bd684b2f3f57dd390ba715fce1597eb7ad97ee8d
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-03 (Tue, 03 Oct 2023)
Changed paths:
M accel/accel-common.c
M cpu.c
M include/qemu/accel.h
M target/i386/kvm/kvm-cpu.c
Log Message:
-----------
accel: Rename accel_cpu_realize() -> accel_cpu_common_realize()
accel_cpu_realize() is a generic function working with CPUs
from any target. Rename it using '_common_' to emphasis it is
not target specific.
Suggested-by: Claudio Fontana <cfontana@suse.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20231003123026.99229-4-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 1aa1d8308d46c5ee3b8558f9f916f5da2492a60a
https://github.com/qemu/qemu/commit/1aa1d8308d46c5ee3b8558f9f916f5da2492a60a
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-03 (Tue, 03 Oct 2023)
Changed paths:
M accel/accel-common.c
M cpu.c
M include/qemu/accel.h
Log Message:
-----------
accel: Introduce accel_cpu_common_unrealize() stub
Prepare the stub for parity with accel_cpu_common_realize().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20231003123026.99229-5-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 59851868a2fb632dbf080feda814137fd60242db
https://github.com/qemu/qemu/commit/59851868a2fb632dbf080feda814137fd60242db
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-03 (Tue, 03 Oct 2023)
Changed paths:
M accel/accel-common.c
M include/qemu/accel.h
Log Message:
-----------
accel: Declare AccelClass::cpu_common_[un]realize() handlers
Currently accel_cpu_realize() only performs target-specific
realization. Introduce the cpu_common_[un]realize fields in
the base AccelClass to be able to perform target-agnostic
[un]realization of vCPUs.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20231003123026.99229-6-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: fa312f2eaf50d7abb84dcc0d9b5d15f1ddf6f66b
https://github.com/qemu/qemu/commit/fa312f2eaf50d7abb84dcc0d9b5d15f1ddf6f66b
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-03 (Tue, 03 Oct 2023)
Changed paths:
M accel/tcg/cpu-exec.c
M include/exec/cpu-all.h
Log Message:
-----------
accel/tcg: Have tcg_exec_realizefn() return a boolean
Following the example documented since commit e3fe3988d7 ("error:
Document Error API usage rules"), have tcg_exec_realizefn() return
a boolean indicating whether an error is set or not.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <20231003123026.99229-7-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 23af78b070ebfc0bfa8f114796a2eb9b5ed31e92
https://github.com/qemu/qemu/commit/23af78b070ebfc0bfa8f114796a2eb9b5ed31e92
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-03 (Tue, 03 Oct 2023)
Changed paths:
M accel/tcg/internal.h
M accel/tcg/tcg-all.c
M cpu.c
M include/exec/cpu-all.h
Log Message:
-----------
accel/tcg: Restrict tcg_exec_[un]realizefn() to TCG
We don't need to expose these TCG-specific methods to the
whole code base. Register them as AccelClass handlers, they
will be called by the generic accel_cpu_[un]realize() methods.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <20231003123026.99229-8-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: a81fef4b6440046e21e3531329e1e21f58645c76
https://github.com/qemu/qemu/commit/a81fef4b6440046e21e3531329e1e21f58645c76
Author: Anton Johansson <anjo@rev.ng>
Date: 2023-10-03 (Tue, 03 Oct 2023)
Changed paths:
M include/exec/cpu-defs.h
M target/arm/cpu-param.h
M target/arm/ptw.c
M target/arm/tcg/mte_helper.c
M target/arm/tcg/sve_helper.c
M target/arm/tcg/tlb_helper.c
M target/arm/tcg/translate-a64.c
Log Message:
-----------
target/arm: Replace TARGET_PAGE_ENTRY_EXTRA
TARGET_PAGE_ENTRY_EXTRA is a macro that allows guests to specify additional
fields for caching with the full TLB entry. This macro is replaced with
a union in CPUTLBEntryFull, thus making CPUTLB target-agnostic at the
cost of slightly inflated CPUTLBEntryFull for non-arm guests.
Note, this is needed to ensure that fields in CPUTLB don't vary in
offset between various targets.
(arm is the only guest actually making use of this feature.)
Signed-off-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230912153428.17816-2-anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ef6d8210a2570b5f7c5e02ab422c92f527b62be7
https://github.com/qemu/qemu/commit/ef6d8210a2570b5f7c5e02ab422c92f527b62be7
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-03 (Tue, 03 Oct 2023)
Changed paths:
M include/exec/cpu-defs.h
M include/hw/core/cpu.h
Log Message:
-----------
accel/tcg: Move CPUTLB definitions from cpu-defs.h
Accept that we will consume space in CPUState for CONFIG_USER_ONLY,
since we cannot test CONFIG_SOFTMMU within hw/core/cpu.h.
Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ad4ec2798fd7066bc9d879dcbdeae96073ad370f
https://github.com/qemu/qemu/commit/ad4ec2798fd7066bc9d879dcbdeae96073ad370f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-03 (Tue, 03 Oct 2023)
Changed paths:
M qom/object.c
Log Message:
-----------
qom: Propagate alignment through type system
Propagate alignment just like size. This is required in order to
get the correct alignment on most cpu subclasses where the size and
alignment is only specified for the base cpu type.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 61cd357698231386f482f4257fc9fc1d66c750d8
https://github.com/qemu/qemu/commit/61cd357698231386f482f4257fc9fc1d66c750d8
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-03 (Tue, 03 Oct 2023)
Changed paths:
M target/arm/cpu.c
M target/arm/cpu64.c
Log Message:
-----------
target/arm: Remove size and alignment for cpu subclasses
Inherit the size and alignment from TYPE_ARM_CPU.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: f669c99241adfcd4186aebff6990cefdac25125b
https://github.com/qemu/qemu/commit/f669c99241adfcd4186aebff6990cefdac25125b
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-03 (Tue, 03 Oct 2023)
Changed paths:
M target/alpha/cpu.c
M target/avr/cpu.c
M target/cris/cpu.c
M target/hexagon/cpu.c
M target/hppa/cpu.c
M target/i386/cpu.c
M target/loongarch/cpu.c
M target/m68k/cpu.c
M target/microblaze/cpu.c
M target/mips/cpu.c
M target/nios2/cpu.c
M target/openrisc/cpu.c
M target/riscv/cpu.c
M target/rx/cpu.c
M target/sh4/cpu.c
M target/sparc/cpu.c
M target/tricore/cpu.c
M target/xtensa/cpu.c
Log Message:
-----------
target/*: Add instance_align to all cpu base classes
The omission of alignment has technically been wrong since
269bd5d8f61, where QEMU_ALIGNED was added to CPUTLBDescFast.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 5d30bdcb1b72ec1d44397ee7047417617066d97a
https://github.com/qemu/qemu/commit/5d30bdcb1b72ec1d44397ee7047417617066d97a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-03 (Tue, 03 Oct 2023)
Changed paths:
M include/exec/cpu-all.h
Log Message:
-----------
accel/tcg: Validate placement of CPUNegativeOffsetState
Verify that the distance between CPUNegativeOffsetState and
CPUArchState is no greater than any alignment requirements.
Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 3b3d7df545ff30762b169147398dbf90c42eb452
https://github.com/qemu/qemu/commit/3b3d7df545ff30762b169147398dbf90c42eb452
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-03 (Tue, 03 Oct 2023)
Changed paths:
M accel/tcg/translate-all.c
M accel/tcg/translator.c
M include/exec/cpu-all.h
M include/hw/core/cpu.h
M target/alpha/cpu.h
M target/arm/cpu.h
M target/avr/cpu.h
M target/cris/cpu.h
M target/hexagon/cpu.h
M target/hppa/cpu.h
M target/i386/cpu.h
M target/loongarch/cpu.h
M target/m68k/cpu.h
M target/microblaze/cpu.h
M target/mips/cpu.h
M target/nios2/cpu.h
M target/openrisc/cpu.h
M target/ppc/cpu.h
M target/riscv/cpu.h
M target/rx/cpu.h
M target/s390x/cpu.h
M target/sh4/cpu.h
M target/sparc/cpu.h
M target/tricore/cpu.h
M target/xtensa/cpu.h
Log Message:
-----------
accel/tcg: Move CPUNegativeOffsetState into CPUState
Retain the separate structure to emphasize its importance.
Enforce CPUArchState always follows CPUState without padding.
Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e62de981113350194f9c1f78a6a8fd35c03b1599
https://github.com/qemu/qemu/commit/e62de981113350194f9c1f78a6a8fd35c03b1599
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-03 (Tue, 03 Oct 2023)
Changed paths:
M hw/core/cpu-common.c
M include/exec/cpu-all.h
M include/hw/core/cpu.h
Log Message:
-----------
accel/tcg: Remove CPUState.icount_decr_ptr
We can now access icount_decr directly.
Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 464dacf6090d859a919596ba7452498c7446ced1
https://github.com/qemu/qemu/commit/464dacf6090d859a919596ba7452498c7446ced1
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-03 (Tue, 03 Oct 2023)
Changed paths:
M accel/dummy-cpus.c
M accel/hvf/hvf-accel-ops.c
M accel/kvm/kvm-accel-ops.c
M accel/tcg/cpu-exec-common.c
M accel/tcg/cpu-exec.c
M accel/tcg/cputlb.c
M accel/tcg/tcg-accel-ops-icount.c
M accel/tcg/tcg-accel-ops-mttcg.c
M accel/tcg/tcg-accel-ops-rr.c
M accel/tcg/translator.c
M hw/core/cpu-common.c
M include/hw/core/cpu.h
M softmmu/icount.c
M softmmu/watchpoint.c
Log Message:
-----------
accel/tcg: Move can_do_io to CPUNegativeOffsetState
Minimize the displacement to can_do_io, since it may
be touched at the start of each TranslationBlock.
It fits into other padding within the substructure.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: a953b5fa153fc384d2631cda8213efe983501609
https://github.com/qemu/qemu/commit/a953b5fa153fc384d2631cda8213efe983501609
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-03 (Tue, 03 Oct 2023)
Changed paths:
M accel/tcg/cpu-exec.c
M accel/tcg/tcg-accel-ops-icount.c
M accel/tcg/tcg-accel-ops.c
M accel/tcg/translate-all.c
M include/exec/cpu-all.h
M include/exec/exec-all.h
M softmmu/icount.c
Log Message:
-----------
accel/tcg: Remove cpu_neg()
Now that CPUNegativeOffsetState is part of CPUState,
we can reference it directly.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ad75a51e84af9638e4ec51aa1e6ec5f3ff642558
https://github.com/qemu/qemu/commit/ad75a51e84af9638e4ec51aa1e6ec5f3ff642558
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-03 (Tue, 03 Oct 2023)
Changed paths:
M accel/tcg/plugin-gen.c
M accel/tcg/translator.c
M include/tcg/tcg.h
M target/alpha/translate.c
M target/arm/tcg/translate-a32.h
M target/arm/tcg/translate-a64.c
M target/arm/tcg/translate-a64.h
M target/arm/tcg/translate-m-nocp.c
M target/arm/tcg/translate-mve.c
M target/arm/tcg/translate-neon.c
M target/arm/tcg/translate-sme.c
M target/arm/tcg/translate-sve.c
M target/arm/tcg/translate-vfp.c
M target/arm/tcg/translate.c
M target/arm/tcg/translate.h
M target/avr/translate.c
M target/cris/translate.c
M target/cris/translate_v10.c.inc
M target/hexagon/README
M target/hexagon/gen_tcg.h
M target/hexagon/gen_tcg_funcs.py
M target/hexagon/gen_tcg_hvx.h
M target/hexagon/genptr.c
M target/hexagon/idef-parser/parser-helpers.c
M target/hexagon/macros.h
M target/hexagon/translate.c
M target/hppa/translate.c
M target/i386/tcg/decode-new.c.inc
M target/i386/tcg/emit.c.inc
M target/i386/tcg/translate.c
M target/loongarch/insn_trans/trans_atomic.c.inc
M target/loongarch/insn_trans/trans_branch.c.inc
M target/loongarch/insn_trans/trans_extra.c.inc
M target/loongarch/insn_trans/trans_farith.c.inc
M target/loongarch/insn_trans/trans_fcmp.c.inc
M target/loongarch/insn_trans/trans_fmemory.c.inc
M target/loongarch/insn_trans/trans_fmov.c.inc
M target/loongarch/insn_trans/trans_memory.c.inc
M target/loongarch/insn_trans/trans_privileged.c.inc
M target/loongarch/insn_trans/trans_vec.c.inc
M target/loongarch/translate.c
M target/m68k/translate.c
M target/microblaze/translate.c
M target/mips/tcg/lcsr_translate.c
M target/mips/tcg/micromips_translate.c.inc
M target/mips/tcg/msa_translate.c
M target/mips/tcg/mxu_translate.c
M target/mips/tcg/nanomips_translate.c.inc
M target/mips/tcg/translate.c
M target/mips/tcg/translate.h
M target/mips/tcg/vr54xx_translate.c
M target/nios2/translate.c
M target/openrisc/translate.c
M target/ppc/power8-pmu-regs.c.inc
M target/ppc/translate.c
M target/ppc/translate/branch-impl.c.inc
M target/ppc/translate/dfp-impl.c.inc
M target/ppc/translate/fixedpoint-impl.c.inc
M target/ppc/translate/fp-impl.c.inc
M target/ppc/translate/processor-ctrl-impl.c.inc
M target/ppc/translate/spe-impl.c.inc
M target/ppc/translate/storage-ctrl-impl.c.inc
M target/ppc/translate/vmx-impl.c.inc
M target/ppc/translate/vsx-impl.c.inc
M target/riscv/insn_trans/trans_privileged.c.inc
M target/riscv/insn_trans/trans_rvbf16.c.inc
M target/riscv/insn_trans/trans_rvd.c.inc
M target/riscv/insn_trans/trans_rvf.c.inc
M target/riscv/insn_trans/trans_rvh.c.inc
M target/riscv/insn_trans/trans_rvi.c.inc
M target/riscv/insn_trans/trans_rvm.c.inc
M target/riscv/insn_trans/trans_rvv.c.inc
M target/riscv/insn_trans/trans_rvvk.c.inc
M target/riscv/insn_trans/trans_rvzce.c.inc
M target/riscv/insn_trans/trans_rvzfa.c.inc
M target/riscv/insn_trans/trans_rvzfh.c.inc
M target/riscv/insn_trans/trans_rvzicbo.c.inc
M target/riscv/insn_trans/trans_svinval.c.inc
M target/riscv/insn_trans/trans_xthead.c.inc
M target/riscv/translate.c
M target/rx/translate.c
M target/s390x/tcg/translate.c
M target/s390x/tcg/translate_vx.c.inc
M target/sh4/translate.c
M target/sparc/translate.c
M target/tricore/translate.c
M target/xtensa/translate.c
M tcg/tcg-op-gvec.c
M tcg/tcg-op-ldst.c
M tcg/tcg-op.c
M tcg/tcg.c
Log Message:
-----------
tcg: Rename cpu_env to tcg_env
Allow the name 'cpu_env' to be used for something else.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 4565917bb034479a29c04f0b44124e7f61585ccf
https://github.com/qemu/qemu/commit/4565917bb034479a29c04f0b44124e7f61585ccf
Author: Michael S. Tsirkin <mst@redhat.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/core/machine.c
M hw/pci/pci.c
M hw/pci/pci_bridge.c
M include/hw/pci/pci_bridge.h
Log Message:
-----------
pci: SLT must be RO
current code sets PCI_SEC_LATENCY_TIMER to RW, but for
pcie to pcie bridges it must be RO 0 according to
pci express spec which says:
This register does not apply to PCI Express. It must be read-only
and hardwired to 00h. For PCI Express to PCI/PCI-X Bridges, refer to the
[PCIe-to-PCI-PCI-X-Bridge] for requirements for this register.
also, fix typo in comment where it's made writeable - this typo
is likely what prevented us noticing we violate this requirement
in the 1st place.
Reported-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Message-Id:
<de9d05366a70172e1789d10591dbe59e39c3849c.1693432039.git.mst@redhat.com>
Tested-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 961d60e934e793a6065fb17d2312d5bced25031e
https://github.com/qemu/qemu/commit/961d60e934e793a6065fb17d2312d5bced25031e
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/virtio/vhost-vdpa.c
Log Message:
-----------
hw/virtio: Propagate page_mask to vhost_vdpa_listener_skipped_section()
In order to make vhost-vdpa.c a target-agnostic source unit,
we need to remove the TARGET_PAGE_SIZE / TARGET_PAGE_MASK /
TARGET_PAGE_ALIGN uses. TARGET_PAGE_SIZE will be replaced by
the runtime qemu_target_page_size(). The other ones will be
deduced from TARGET_PAGE_SIZE.
Since the 3 macros are used in 3 related functions (sharing
the same call tree), we'll refactor them to only depend on
TARGET_PAGE_MASK.
Having the following call tree:
vhost_vdpa_listener_region_del()
-> vhost_vdpa_listener_skipped_section()
-> vhost_vdpa_section_end()
The first step is to propagate TARGET_PAGE_MASK to
vhost_vdpa_listener_skipped_section().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230710094931.84402-2-philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 8b1a8884c6aacd9a35863d18a757be17ec7b1369
https://github.com/qemu/qemu/commit/8b1a8884c6aacd9a35863d18a757be17ec7b1369
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/virtio/vhost-vdpa.c
Log Message:
-----------
hw/virtio: Propagate page_mask to vhost_vdpa_section_end()
Propagate TARGET_PAGE_MASK (see the previous commit for
rationale).
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230710094931.84402-3-philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 1dca36fb3d4f07354c9f6bc38b6e5c72fe1e9855
https://github.com/qemu/qemu/commit/1dca36fb3d4f07354c9f6bc38b6e5c72fe1e9855
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/virtio/vhost-vdpa.c
Log Message:
-----------
hw/virtio/vhost-vdpa: Inline TARGET_PAGE_ALIGN() macro
Use TARGET_PAGE_SIZE to calculate TARGET_PAGE_ALIGN
(see the rationale in previous commits).
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230710094931.84402-4-philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 33f21860b766701f92c01094dcfc5390974d4020
https://github.com/qemu/qemu/commit/33f21860b766701f92c01094dcfc5390974d4020
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/virtio/vhost-vdpa.c
Log Message:
-----------
hw/virtio/vhost-vdpa: Use target-agnostic qemu_target_page_mask()
Similarly to commit e414ed2c47 ("virtio-iommu: Use
target-agnostic qemu_target_page_mask"), Replace the
target-specific TARGET_PAGE_SIZE and TARGET_PAGE_MASK
definitions by a call to the runtime qemu_target_page_size()
helper which is target agnostic.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230710094931.84402-5-philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 05632635f84311f241ad4dbffdb591f97339a5dc
https://github.com/qemu/qemu/commit/05632635f84311f241ad4dbffdb591f97339a5dc
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/virtio/meson.build
Log Message:
-----------
hw/virtio: Build vhost-vdpa.o once
The previous commit removed the dependencies on the
target-specific TARGET_PAGE_FOO macros. We can now
move vhost-vdpa.c to the 'softmmu_virtio_ss' source
set to build it once for all our targets.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230710100432.84819-1-philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: f05356f84d2e3cb4f6437716cc9b5dc59baf769d
https://github.com/qemu/qemu/commit/f05356f84d2e3cb4f6437716cc9b5dc59baf769d
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/virtio/meson.build
Log Message:
-----------
hw/virtio/meson: Rename softmmu_virtio_ss[] -> system_virtio_ss[]
Similarly to commit de6cd7599b ("meson: Replace softmmu_ss
-> system_ss"), rename the virtio source set common to all
system emulation as 'system_virtio_ss[]'. This is clearer
because softmmu can be used for user emulation.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230710100510.84862-1-philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: eee77809733d3a94c0d78a29a93d032c1faefd2c
https://github.com/qemu/qemu/commit/eee77809733d3a94c0d78a29a93d032c1faefd2c
Author: Alex Bennée <alex.bennee@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/virtio/meson.build
A hw/virtio/vhost-user-device-pci.c
A hw/virtio/vhost-user-device.c
A include/hw/virtio/vhost-user-device.h
Log Message:
-----------
virtio: add vhost-user-base and a generic vhost-user-device
In theory we shouldn't need to repeat so much boilerplate to support
vhost-user backends. This provides a generic vhost-user-base QOM
object and a derived vhost-user-device for which the user needs to
provide the few bits of information that aren't currently provided by
the vhost-user protocol. This should provide a baseline implementation
from which the other vhost-user stub can specialise.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20230710153522.3469097-8-alex.bennee@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: f92a2d61cd86fd585b1b2a57295fcde278aebd78
https://github.com/qemu/qemu/commit/f92a2d61cd86fd585b1b2a57295fcde278aebd78
Author: Alex Bennée <alex.bennee@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/virtio/vhost-user-device.c
M include/hw/virtio/vhost-user-device.h
Log Message:
-----------
hw/virtio: add config support to vhost-user-device
To use the generic device the user will need to provide the config
region size via the command line. We also add a notifier so the guest
can be pinged if the remote daemon updates the config.
With these changes:
-device vhost-user-device-pci,virtio-id=41,num_vqs=2,config_size=8
is equivalent to:
-device vhost-user-gpio-pci
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20230710153522.3469097-11-alex.bennee@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 06b636a1e2ad12ab130edcbb0ccf995118440706
https://github.com/qemu/qemu/commit/06b636a1e2ad12ab130edcbb0ccf995118440706
Author: Hawkins Jiawei <yin31149@gmail.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/net/virtio-net.c
Log Message:
-----------
virtio-net: do not reset vlan filtering at set_features
This function is called after virtio_load, so all vlan configuration is
lost in migration case.
Just allow all the vlan-tagged packets if vlan is not configured, and
trust device reset to clear all filtered vlans.
Fixes: 0b1eaa8803 ("virtio-net: Do not filter VLANs without F_CTRL_VLAN")
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Reviewed-by: Hawkins Jiawei <yin31149@gmail.com>
Signed-off-by: Hawkins Jiawei <yin31149@gmail.com>
Message-Id:
<95af0d013281282f48ad3f47f6ad1ac4ca9e52eb.1690106284.git.yin31149@gmail.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: e19751a32f140a232fafb037e703abb961a94abb
https://github.com/qemu/qemu/commit/e19751a32f140a232fafb037e703abb961a94abb
Author: Hawkins Jiawei <yin31149@gmail.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/net/virtio-net.c
M include/hw/virtio/virtio-net.h
Log Message:
-----------
virtio-net: Expose MAX_VLAN
vhost-vdpa shadowed CVQ needs to know the maximum number of
vlans supported by the virtio-net device, so QEMU can restore
the VLAN state in a migration.
Co-developed-by: Eugenio Pérez <eperezma@redhat.com>
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Signed-off-by: Hawkins Jiawei <yin31149@gmail.com>
Message-Id:
<ca03403319c6405ea7c400836a572255bbc9ceba.1690106284.git.yin31149@gmail.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 8f7e9967484dec2a727c24a509962ca3a4f5dad4
https://github.com/qemu/qemu/commit/8f7e9967484dec2a727c24a509962ca3a4f5dad4
Author: Hawkins Jiawei <yin31149@gmail.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M net/vhost-vdpa.c
Log Message:
-----------
vdpa: Restore vlan filtering state
This patch introduces vhost_vdpa_net_load_single_vlan()
and vhost_vdpa_net_load_vlan() to restore the vlan
filtering state at device's startup.
Co-developed-by: Eugenio Pérez <eperezma@redhat.com>
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Signed-off-by: Hawkins Jiawei <yin31149@gmail.com>
Message-Id:
<e76a29f77bb3f386e4a643c8af94b77b775d1752.1690106284.git.yin31149@gmail.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: e213c45a042db2506b5e8f16293f1f1c5083a577
https://github.com/qemu/qemu/commit/e213c45a042db2506b5e8f16293f1f1c5083a577
Author: Hawkins Jiawei <yin31149@gmail.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M net/vhost-vdpa.c
Log Message:
-----------
vdpa: Allow VIRTIO_NET_F_CTRL_VLAN in SVQ
Enable SVQ with VIRTIO_NET_F_CTRL_VLAN feature.
Co-developed-by: Eugenio Pérez <eperezma@redhat.com>
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Signed-off-by: Hawkins Jiawei <yin31149@gmail.com>
Message-Id:
<38dc63102a42c31c72fd293d0e6e2828fd54c86e.1690106284.git.yin31149@gmail.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 43d6376980d5567f2a6d00cfb30d10c0961671e6
https://github.com/qemu/qemu/commit/43d6376980d5567f2a6d00cfb30d10c0961671e6
Author: Ilya Maximets <i.maximets@ovn.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/virtio/virtio.c
M include/exec/memory.h
Log Message:
-----------
virtio: don't zero out memory region cache for indirect descriptors
Lots of virtio functions that are on a hot path in data transmission
are initializing indirect descriptor cache at the point of stack
allocation. It's a 112 byte structure that is getting zeroed out on
each call adding unnecessary overhead. It's going to be correctly
initialized later via special init function. The only reason to
actually initialize right away is the ability to safely destruct it.
Replacing a designated initializer with a function to only initialize
what is necessary.
Removal of the unnecessary stack initializations improves throughput
of virtio-net devices in terms of 64B packets per second by 6-14 %
depending on the case. Tested with a proposed af-xdp network backend
and a dpdk testpmd application in the guest, but should be beneficial
for other virtio devices as well.
Signed-off-by: Ilya Maximets <i.maximets@ovn.org>
Message-Id: <20230811143423.3258788-1-i.maximets@ovn.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Acked-by: Jason Wang <jasowang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: b40eba9cdde3b041f02a9cbaa23ca0eeda9bd9c1
https://github.com/qemu/qemu/commit/b40eba9cdde3b041f02a9cbaa23ca0eeda9bd9c1
Author: Eugenio Pérez <eperezma@redhat.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M net/vhost-vdpa.c
Log Message:
-----------
vdpa: use first queue SVQ state for CVQ default
Previous to this patch the only way CVQ would be shadowed is if it does
support to isolate CVQ group or if all vqs were shadowed from the
beginning. The second condition was checked at the beginning, and no
more configuration was done.
After this series we need to check if data queues are shadowed because
they are in the middle of the migration. As checking if they are
shadowed already covers the previous case, let's just mimic it.
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Acked-by: Jason Wang <jasowang@redhat.com>
Message-Id: <20230822085330.3978829-2-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: d7ce0841767d01c226fc0e22436ce22a0ec74226
https://github.com/qemu/qemu/commit/d7ce0841767d01c226fc0e22436ce22a0ec74226
Author: Eugenio Pérez <eperezma@redhat.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/virtio/trace-events
M hw/virtio/vhost-vdpa.c
M include/hw/virtio/vhost-vdpa.h
Log Message:
-----------
vdpa: export vhost_vdpa_set_vring_ready
The vhost-vdpa net backend needs to enable vrings in a different order
than default, so export it.
No functional change intended except for tracing, that now includes the
(virtio) index being enabled and the return value of the ioctl.
Still ignoring return value of this function if called from
vhost_vdpa_dev_start, as reorganize calling code around it is out of
the scope of this series.
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Acked-by: Jason Wang <jasowang@redhat.com>
Message-Id: <20230822085330.3978829-3-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: f3fada598c909bac12bd18da36437d9bed0b9f06
https://github.com/qemu/qemu/commit/f3fada598c909bac12bd18da36437d9bed0b9f06
Author: Eugenio Pérez <eperezma@redhat.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M net/vhost-vdpa.c
Log Message:
-----------
vdpa: rename vhost_vdpa_net_load to vhost_vdpa_net_cvq_load
Next patches will add the corresponding data load.
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Acked-by: Jason Wang <jasowang@redhat.com>
Message-Id: <20230822085330.3978829-4-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 6c4825476a4351530bcac17abab72295b75ffe98
https://github.com/qemu/qemu/commit/6c4825476a4351530bcac17abab72295b75ffe98
Author: Eugenio Pérez <eperezma@redhat.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/virtio/vdpa-dev.c
M hw/virtio/vhost-vdpa.c
M net/vhost-vdpa.c
Log Message:
-----------
vdpa: move vhost_vdpa_set_vring_ready to the caller
Doing that way allows CVQ to be enabled before the dataplane vqs,
restoring the state as MQ or MAC addresses properly in the case of a
migration.
The patch does it by defining a ->load NetClientInfo callback also for
dataplane. Ideally, this should be done by an independent patch, but
the function is already static so it would only add an empty
vhost_vdpa_net_data_load stub.
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20230822085330.3978829-5-eperezma@redhat.com>
Acked-by: Jason Wang <jasowang@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: f13f5f6412fc51574c961f39dbd625357948282b
https://github.com/qemu/qemu/commit/f13f5f6412fc51574c961f39dbd625357948282b
Author: Eugenio Pérez <eperezma@redhat.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M net/vhost-vdpa.c
Log Message:
-----------
vdpa: remove net cvq migration blocker
Now that we have add migration blockers if the device does not support
all the needed features, remove the general blocker applied to all net
devices with CVQ.
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Acked-by: Jason Wang <jasowang@redhat.com>
Message-Id: <20230822085330.3978829-6-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: b0de17a2e28de477e09e77a587fcbeafbbc897c4
https://github.com/qemu/qemu/commit/b0de17a2e28de477e09e77a587fcbeafbbc897c4
Author: Hawkins Jiawei <yin31149@gmail.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/virtio/vhost-shadow-virtqueue.c
M hw/virtio/vhost-shadow-virtqueue.h
M net/vhost-vdpa.c
Log Message:
-----------
vhost: Add count argument to vhost_svq_poll()
Next patches in this series will no longer perform an
immediate poll and check of the device's used buffers
for each CVQ state load command. Instead, they will
send CVQ state load commands in parallel by polling
multiple pending buffers at once.
To achieve this, this patch refactoring vhost_svq_poll()
to accept a new argument `num`, which allows vhost_svq_poll()
to wait for the device to use multiple elements,
rather than polling for a single element.
Signed-off-by: Hawkins Jiawei <yin31149@gmail.com>
Acked-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id:
<950b3bfcfc5d446168b9d6a249d554a013a691d4.1693287885.git.yin31149@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: b532c684e0d71bc69fa56a30f1c7588101aa086a
https://github.com/qemu/qemu/commit/b532c684e0d71bc69fa56a30f1c7588101aa086a
Author: Jonah Palmer <jonah.palmer@oracle.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/virtio/virtio-qmp.c
M hw/virtio/virtio-qmp.h
M hw/virtio/virtio.c
Log Message:
-----------
qmp: remove virtio_list, search QOM tree instead
The virtio_list duplicates information about virtio devices that already
exist in the QOM composition tree. Instead of creating this list of
realized virtio devices, search the QOM composition tree instead.
This patch modifies the QMP command qmp_x_query_virtio to instead
recursively search the QOM composition tree for devices of type
'TYPE_VIRTIO_DEVICE'. The device is also checked to ensure it's
realized.
Signed-off-by: Jonah Palmer <jonah.palmer@oracle.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20230926224107.2951144-2-jonah.palmer@oracle.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 58f81689789f63853d7585c5168f687f1633893a
https://github.com/qemu/qemu/commit/58f81689789f63853d7585c5168f687f1633893a
Author: Jonah Palmer <jonah.palmer@oracle.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/virtio/vhost-user-gpio.c
M hw/virtio/virtio-qmp.c
Log Message:
-----------
qmp: update virtio feature maps, vhost-user-gpio introspection
Add new vhost-user protocol feature to vhost-user protocol feature map
and enumeration:
- VHOST_USER_PROTOCOL_F_STATUS
Add new virtio device features for several virtio devices to their
respective feature mappings:
virtio-blk:
- VIRTIO_BLK_F_SECURE_ERASE
virtio-net:
- VIRTIO_NET_F_NOTF_COAL
- VIRTIO_NET_F_GUEST_USO4
- VIRTIO_NET_F_GUEST_USO6
- VIRTIO_NET_F_HOST_USO
virtio/vhost-user-gpio:
- VIRTIO_GPIO_F_IRQ
- VHOST_USER_F_PROTOCOL_FEATURES
Add support for introspection on vhost-user-gpio devices.
Signed-off-by: Jonah Palmer <jonah.palmer@oracle.com>
Reviewed-by: Emmanouil Pitsidianakis <manos.pitsidianakis@linaro.org>
Message-Id: <20230926224107.2951144-3-jonah.palmer@oracle.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 3d123a8b411706423581db7d26a7bbe548360751
https://github.com/qemu/qemu/commit/3d123a8b411706423581db7d26a7bbe548360751
Author: Jonah Palmer <jonah.palmer@oracle.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/scsi/vhost-user-scsi.c
M hw/virtio/vhost-user.c
M hw/virtio/virtio-qmp.c
M include/hw/virtio/vhost-user.h
Log Message:
-----------
vhost-user: move VhostUserProtocolFeature definition to header file
Move the definition of VhostUserProtocolFeature to
include/hw/virtio/vhost-user.h.
Remove previous definitions in hw/scsi/vhost-user-scsi.c,
hw/virtio/vhost-user.c, and hw/virtio/virtio-qmp.c.
Previously there were 3 separate definitions of this over 3 different
files. Now only 1 definition of this will be present for these 3 files.
Signed-off-by: Jonah Palmer <jonah.palmer@oracle.com>
Reviewed-by: Emmanouil Pitsidianakis <manos.pitsidianakis@linaro.org>
Message-Id: <20230926224107.2951144-4-jonah.palmer@oracle.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 886e0a5f31bf3d40dd8d9199674a4bad64942fde
https://github.com/qemu/qemu/commit/886e0a5f31bf3d40dd8d9199674a4bad64942fde
Author: David Woodhouse <dwmw@amazon.co.uk>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/isa/lpc_ich9.c
Log Message:
-----------
hw/isa/ich9: Add comment on imperfect emulation of PIC vs. I/O APIC routing
As noted in the comment, the PCI INTx lines are supposed to be routed
to *both* the PIC and the I/O APIC. It's just that we don't cope with
the concept of an IRQ being asserted to two *different* pins on the
two irqchips.
So we have this hack of routing to I/O APIC only if the PIRQ routing to
the PIC is disabled. Which seems to work well enough, even when I try
hard to break it with kexec. But should be explicitly documented and
understood.
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Message-Id: <112a09643b8191c4eae7d92fa247a861ab90a9ee.camel@infradead.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: b77af26e973705e8fd96cff102fc978ee44043da
https://github.com/qemu/qemu/commit/b77af26e973705e8fd96cff102fc978ee44043da
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M accel/tcg/cpu-exec.c
M accel/tcg/cputlb.c
M accel/tcg/plugin-gen.c
M accel/tcg/translate-all.c
M bsd-user/main.c
M bsd-user/signal.c
M gdbstub/gdbstub.c
M gdbstub/user-target.c
M hw/i386/kvm/clock.c
M hw/intc/mips_gic.c
M hw/intc/riscv_aclint.c
M hw/intc/riscv_imsic.c
M hw/ppc/e500.c
M hw/ppc/spapr.c
M include/exec/cpu-all.h
M include/hw/core/cpu.h
M linux-user/elfload.c
M linux-user/i386/cpu_loop.c
M linux-user/main.c
M linux-user/signal.c
M monitor/hmp-cmds-target.c
M semihosting/arm-compat-semi.c
M semihosting/syscalls.c
M target/alpha/translate.c
M target/arm/common-semi-target.h
M target/arm/cpu.c
M target/arm/helper.c
M target/arm/tcg/translate-a64.c
M target/arm/tcg/translate.c
M target/avr/translate.c
M target/cris/translate.c
M target/hexagon/translate.c
M target/hppa/mem_helper.c
M target/hppa/translate.c
M target/i386/nvmm/nvmm-all.c
M target/i386/tcg/decode-new.c.inc
M target/i386/tcg/sysemu/excp_helper.c
M target/i386/tcg/tcg-cpu.c
M target/i386/tcg/translate.c
M target/i386/whpx/whpx-all.c
M target/loongarch/translate.c
M target/m68k/translate.c
M target/microblaze/translate.c
M target/mips/tcg/sysemu/mips-semi.c
M target/mips/tcg/translate.c
M target/nios2/translate.c
M target/openrisc/translate.c
M target/ppc/excp_helper.c
M target/ppc/translate.c
M target/riscv/translate.c
M target/rx/cpu.c
M target/rx/translate.c
M target/s390x/tcg/translate.c
M target/sh4/op_helper.c
M target/sh4/translate.c
M target/sparc/translate.c
M target/tricore/translate.c
M target/xtensa/translate.c
Log Message:
-----------
accel/tcg: Replace CPUState.env_ptr with cpu_env()
Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 8fa08d7ec7d8c36fc2c96bd135cb09c086b26a14
https://github.com/qemu/qemu/commit/8fa08d7ec7d8c36fc2c96bd135cb09c086b26a14
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M include/exec/cpu-all.h
M target/alpha/cpu.c
M target/arm/cpu.c
M target/avr/cpu.c
M target/cris/cpu.c
M target/hexagon/cpu.c
M target/hppa/cpu.c
M target/i386/cpu.c
M target/loongarch/cpu.c
M target/m68k/cpu.c
M target/microblaze/cpu.c
M target/mips/cpu.c
M target/nios2/cpu.c
M target/openrisc/cpu.c
M target/ppc/cpu_init.c
M target/riscv/cpu.c
M target/rx/cpu.c
M target/s390x/cpu.c
M target/sh4/cpu.c
M target/sparc/cpu.c
M target/tricore/cpu.c
M target/xtensa/cpu.c
Log Message:
-----------
accel/tcg: Remove cpu_set_cpustate_pointers
This function is now empty, so remove it. In the case of
m68k and tricore, this empties the class instance initfn,
so remove those as well.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 06ddecff244a7fbb2c98352cdfed44fea66608bc
https://github.com/qemu/qemu/commit/06ddecff244a7fbb2c98352cdfed44fea66608bc
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M include/exec/cpu-all.h
Log Message:
-----------
accel/tcg: Remove env_neg()
Replace the single use within env_tlb() and remove.
Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 7857ee114c6518165653d3ba87f24a1815c26f6f
https://github.com/qemu/qemu/commit/7857ee114c6518165653d3ba87f24a1815c26f6f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M accel/tcg/translate-all.c
M include/tcg/tcg.h
M tcg/tcg.c
Log Message:
-----------
tcg: Remove TCGContext.tlb_fast_offset
Now that there is no padding between CPUNegativeOffsetState
and CPUArchState, this value is constant across all targets.
Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 10b32e2cd9ab203c1643fbb0522550e64be8376f
https://github.com/qemu/qemu/commit/10b32e2cd9ab203c1643fbb0522550e64be8376f
Author: Anton Johansson <anjo@rev.ng>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M accel/tcg/cputlb.c
M include/exec/cpu_ldst.h
Log Message:
-----------
accel/tcg: Modify tlb_*() to use CPUState
Changes tlb_*() functions to take CPUState instead of CPUArchState, as
they don't require the full CPUArchState. This makes it easier to
decouple target-(in)dependent code.
Signed-off-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230912153428.17816-4-anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
[rth: Use cpu->neg.tlb instead of cpu_tlb()]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 5afec1c63bcc6e23bec6fa8a1895f61d1f7f3cbe
https://github.com/qemu/qemu/commit/5afec1c63bcc6e23bec6fa8a1895f61d1f7f3cbe
Author: Anton Johansson <anjo@rev.ng>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M accel/tcg/cputlb.c
Log Message:
-----------
accel/tcg: Modify probe_access_internal() to use CPUState
probe_access_internal() is changed to instead take the generic CPUState
over CPUArchState, in order to lessen the target-specific coupling of
cputlb.c. Note: probe_access*() also don't need the full CPUArchState,
but aren't touched in this patch as they are target-facing.
Signed-off-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230912153428.17816-5-anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
[rth: Use cpu->neg.tlb instead of cpu_tlb()]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d50ef4467c4c0a35b6b57c532da5814a8327275c
https://github.com/qemu/qemu/commit/d50ef4467c4c0a35b6b57c532da5814a8327275c
Author: Anton Johansson <anjo@rev.ng>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M accel/tcg/cputlb.c
Log Message:
-----------
accel/tcg: Modify memory access functions to use CPUState
do_[ld|st]*() and mmu_lookup*() are changed to use CPUState over
CPUArchState, moving the target-dependence to the target-facing facing
cpu_[ld|st] functions.
Signed-off-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230912153428.17816-6-anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
[rth: Use cpu->neg.tlb instead of cpu_tlb; cpu_env instead of env_ptr.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d560225fc4c3b75e65665df503c0641e3030bd08
https://github.com/qemu/qemu/commit/d560225fc4c3b75e65665df503c0641e3030bd08
Author: Anton Johansson <anjo@rev.ng>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M accel/tcg/atomic_template.h
M accel/tcg/cputlb.c
M accel/tcg/user-exec.c
Log Message:
-----------
accel/tcg: Modify atomic_mmu_lookup() to use CPUState
The goal is to (in the future) allow for per-target compilation of
functions in atomic_template.h whilst atomic_mmu_lookup() and cputlb.c
are compiled once-per user- or system mode.
Signed-off-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230912153428.17816-7-anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
[rth: Use cpu->neg.tlb instead of cpu_tlb()]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 73fda56f33151331b86bba5f6d1fbd001902776b
https://github.com/qemu/qemu/commit/73fda56f33151331b86bba5f6d1fbd001902776b
Author: Anton Johansson <anjo@rev.ng>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M accel/tcg/cputlb.c
M accel/tcg/ldst_atomicity.c.inc
M accel/tcg/user-exec.c
Log Message:
-----------
accel/tcg: Use CPUState in atomicity helpers
Makes ldst_atomicity.c.inc almost target-independent, with the exception
of TARGET_PAGE_MASK, which will be addressed in a future patch.
Signed-off-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230912153428.17816-8-anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 623912cc140c8778edb1e8f1e29853b1256866cb
https://github.com/qemu/qemu/commit/623912cc140c8778edb1e8f1e29853b1256866cb
Author: Anton Johansson <anjo@rev.ng>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M include/exec/cpu-all.h
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
Log Message:
-----------
accel/tcg: Remove env_tlb()
The function is no longer used to access the TLB,
and has been replaced by cpu->neg.tlb.
Signed-off-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230912153428.17816-9-anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
[rth: Merge comment update patch]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e20f73fba5240dce86f0b49c01b2c824a0ce9f1f
https://github.com/qemu/qemu/commit/e20f73fba5240dce86f0b49c01b2c824a0ce9f1f
Author: Anton Johansson <anjo@rev.ng>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M accel/tcg/cputlb.c
M accel/tcg/user-exec.c
Log Message:
-----------
accel/tcg: Unify user and softmmu do_[st|ld]*_mmu()
The prototype of do_[st|ld]*_mmu() is unified between system- and
user-mode allowing a large chunk of helper_[st|ld]*() and cpu_[st|ld]*()
functions to be expressed in same manner between both modes. These
functions will be moved to ldst_common.c.inc in a following commit.
Signed-off-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230912153428.17816-11-anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 27c46fadf6724b68dcbe275479f86992f33d7c24
https://github.com/qemu/qemu/commit/27c46fadf6724b68dcbe275479f86992f33d7c24
Author: Anton Johansson <anjo@rev.ng>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M accel/tcg/cputlb.c
M accel/tcg/ldst_common.c.inc
M accel/tcg/user-exec.c
Log Message:
-----------
accel/tcg: move ld/st helpers to ldst_common.c.inc
A large chunk of ld/st functions are moved from cputlb.c and user-exec.c
to ldst_common.c.inc as their implementation is the same between both
modes.
Eventually, ldst_common.c.inc could be compiled into a separate
target-specific compilation unit, and be linked in with the targets.
Keeping CPUArchState usage out of cputlb.c (CPUArchState is primarily
used to access the mmu index in these functions).
Signed-off-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230912153428.17816-12-anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 65b074daa03cded3cc2c36e4eba7afc5b406b962
https://github.com/qemu/qemu/commit/65b074daa03cded3cc2c36e4eba7afc5b406b962
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M include/exec/cpu-all.h
M include/exec/cpu-common.h
Log Message:
-----------
exec: Make EXCP_FOO definitions target agnostic
The EXCP_* definitions don't need to be target specific,
move them to "exec/cpu-common.h".
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230914185718.76241-2-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 3549118b498873c84b442bc280a5edafbb61e0a4
https://github.com/qemu/qemu/commit/3549118b498873c84b442bc280a5edafbb61e0a4
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M include/exec/cpu-common.h
M include/exec/exec-all.h
Log Message:
-----------
exec: Move cpu_loop_foo() target agnostic functions to 'cpu-common.h'
While these functions are not TCG specific, they are not target
specific. Move them to "exec/cpu-common.h" so their callers don't
have to be tainted as target specific.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230914185718.76241-3-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 7ada976fee54c1b67dac2d9c0cb3bb02173084cc
https://github.com/qemu/qemu/commit/7ada976fee54c1b67dac2d9c0cb3bb02173084cc
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M accel/tcg/internal.h
M include/exec/cpu-all.h
Log Message:
-----------
accel/tcg: Restrict dump_exec_info() declaration
In commit 00c9a5c2c3 ("accel/tcg: Restrict 'qapi-commands-machine.h'
to system emulation") we moved the definition to accel/tcg/ which is
where this function is called. No need to expose it outside.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230914185718.76241-4-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: c9955713e9d275980ca2177cf7fbc94b49bc89e5
https://github.com/qemu/qemu/commit/c9955713e9d275980ca2177cf7fbc94b49bc89e5
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M accel/meson.build
Log Message:
-----------
accel: Make accel-blocker.o target agnostic
accel-blocker.c is not target specific, move it to system_ss[].
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230914185718.76241-5-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e8b845b9b1a172c367bb77e16498664290736ad6
https://github.com/qemu/qemu/commit/e8b845b9b1a172c367bb77e16498664290736ad6
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
R accel/accel-common.c
A accel/accel-target.c
M accel/meson.build
Log Message:
-----------
accel: Rename accel-common.c -> accel-target.c
We use the '-common.c' suffix for target agnostic units.
This file is target specific, rename it using the '-target'
suffix.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230914185718.76241-6-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: fe0007f3c1d7254ef738c36997ef7dbd4e5e36b3
https://github.com/qemu/qemu/commit/fe0007f3c1d7254ef738c36997ef7dbd4e5e36b3
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M MAINTAINERS
A cpu-common.c
A cpu-target.c
R cpu.c
R cpus-common.c
M meson.build
Log Message:
-----------
exec: Rename cpu.c -> cpu-target.c
We have exec/cpu code split in 2 files for target agnostic
("common") and specific. Rename 'cpu.c' which is target
specific using the '-target' suffix. Update MAINTAINERS.
Remove the 's from 'cpus-common.c' to match the API cpu_foo()
functions.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230914185718.76241-7-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 8c7907a1807b681b2ccf1ca339e7f841b2ecf877
https://github.com/qemu/qemu/commit/8c7907a1807b681b2ccf1ca339e7f841b2ecf877
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M MAINTAINERS
M meson.build
A page-vary-target.c
R page-vary.c
Log Message:
-----------
exec: Rename target specific page-vary.c -> page-vary-target.c
This matches the target agnostic 'page-vary-common.c' counterpart.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230914185718.76241-8-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 4c268d6d03d297b83f2aa0af2de2e867af2389fc
https://github.com/qemu/qemu/commit/4c268d6d03d297b83f2aa0af2de2e867af2389fc
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M accel/tcg/cpu-exec-common.c
M accel/tcg/cpu-exec.c
M accel/tcg/cputlb.c
A accel/tcg/internal-target.h
R accel/tcg/internal.h
M accel/tcg/monitor.c
M accel/tcg/tb-maint.c
M accel/tcg/tcg-all.c
M accel/tcg/translate-all.c
M accel/tcg/translator.c
M accel/tcg/user-exec.c
Log Message:
-----------
accel/tcg: Rename target-specific 'internal.h' -> 'internal-target.h'
accel/tcg/internal.h contains target specific declarations.
Unit files including it become "target tainted": they can not
be compiled as target agnostic. Rename using the '-target'
suffix to make this explicit.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230914185718.76241-9-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 5934660fa2aabaf76e650dcd1fccc2b676122137
https://github.com/qemu/qemu/commit/5934660fa2aabaf76e650dcd1fccc2b676122137
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M accel/tcg/cpu-exec.c
A accel/tcg/internal-common.h
M accel/tcg/internal-target.h
M accel/tcg/meson.build
M accel/tcg/monitor.c
M accel/tcg/translate-all.c
Log Message:
-----------
accel/tcg: Make monitor.c a target-agnostic unit
Move target-agnostic declarations from "internal-target.h"
to a new "internal-common.h" header.
monitor.c now don't include target specific headers and can
be compiled once in system_ss[].
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230914185718.76241-10-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 467bf3fc09d08937061c86eefef185341e4c2cf8
https://github.com/qemu/qemu/commit/467bf3fc09d08937061c86eefef185341e4c2cf8
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M MAINTAINERS
A accel/tcg/icount-common.c
M accel/tcg/meson.build
R softmmu/icount.c
M softmmu/meson.build
Log Message:
-----------
accel/tcg: Make icount.o a target agnostic unit
Remove the unused "exec/exec-all.h" header. There is
no more target specific code in it: make it target
agnostic (rename using the '-common' suffix). Since
it is TCG specific, move it to accel/tcg, updating
MAINTAINERS.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230914185718.76241-11-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 43e7a2d3f9d2c09c22f494f282dc8a421d3e649f
https://github.com/qemu/qemu/commit/43e7a2d3f9d2c09c22f494f282dc8a421d3e649f
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M accel/tcg/cpu-exec-common.c
M accel/tcg/cputlb.c
M accel/tcg/internal-common.h
M accel/tcg/internal-target.h
M accel/tcg/meson.build
M accel/tcg/tb-maint.c
M accel/tcg/user-exec.c
Log Message:
-----------
accel/tcg: Make cpu-exec-common.c a target agnostic unit
cpu_in_serial_context() is not target specific,
move it declaration to "internal-common.h" (which
we include in the 4 source files modified).
Remove the unused "exec/exec-all.h" header from
cpu-exec-common.c. There is no more target specific
code in this file: make it target agnostic.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230914185718.76241-12-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 935f75ae639bab5e443aeea7c79a78b949c55fe8
https://github.com/qemu/qemu/commit/935f75ae639bab5e443aeea7c79a78b949c55fe8
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M accel/tcg/tcg-all.c
M bsd-user/main.c
M include/tcg/tcg.h
M linux-user/main.c
M tcg/tcg.c
Log Message:
-----------
tcg: Remove argument to tcg_prologue_init
We can load tcg_ctx just as easily within the callee.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d7ec12f83cbb63343dd6e76392241e16a58f41e8
https://github.com/qemu/qemu/commit/d7ec12f83cbb63343dd6e76392241e16a58f41e8
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M accel/tcg/tcg-accel-ops-mttcg.c
M accel/tcg/tcg-accel-ops-rr.c
M accel/tcg/tcg-all.c
M bsd-user/main.c
A include/tcg/startup.h
M include/tcg/tcg.h
M linux-user/main.c
M linux-user/syscall.c
M tcg/tcg.c
Log Message:
-----------
tcg: Split out tcg init functions to tcg/startup.h
The tcg/tcg.h header is a big bucket, containing stuff related to
the translators and the JIT backend. The places that initialize
tcg or create new threads do not need all of that, so split out
these three functions to a new header.
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 33bc4fa78b06fc4e5fe22e5576811a97707e0cc6
https://github.com/qemu/qemu/commit/33bc4fa78b06fc4e5fe22e5576811a97707e0cc6
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M linux-user/hppa/signal.c
Log Message:
-----------
linux-user/hppa: Fix struct target_sigcontext layout
Use abi_ullong not uint64_t so that the alignment of the field
and therefore the layout of the struct is correct.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: a0bc59972664194cc208e28ae714b134a26ba045
https://github.com/qemu/qemu/commit/a0bc59972664194cc208e28ae714b134a26ba045
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M bsd-user/bsd-proc.h
M bsd-user/signal.c
M docs/about/deprecated.rst
M linux-user/exit.c
M linux-user/signal.c
M meson.build
M meson_options.txt
M scripts/meson-buildoptions.sh
M tests/qemu-iotests/meson.build
Log Message:
-----------
build: Remove --enable-gprof
This build option has been deprecated since 8.0.
Remove all CONFIG_GPROF code that depends on that,
including one errant check using TARGET_GPROF.
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 432f936ae17a7f5b13bf294eaf96275ec3da46c1
https://github.com/qemu/qemu/commit/432f936ae17a7f5b13bf294eaf96275ec3da46c1
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M tests/avocado/boot_linux_console.py
M tests/avocado/machine_mips_malta.py
M tests/avocado/replay_kernel.py
M tests/avocado/tuxrun_baselines.py
Log Message:
-----------
tests/avocado: Re-enable MIPS Malta tests (GitLab issue #1884 fixed)
Commit 18a536f1f8 ("accel/tcg: Always require can_do_io") fixed
the GitLab issue #1884: we can now re-enable those tests.
This reverts commit f959c3d87ccfa585b105de6964a6261e368cc1da.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20231003063808.66564-1-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 79de3960ae1e322835112755d99187ee9b63a270
https://github.com/qemu/qemu/commit/79de3960ae1e322835112755d99187ee9b63a270
Author: gaosong <gaosong@loongson.cn>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M tcg/loongarch64/tcg-target.c.inc
Log Message:
-----------
tcg/loongarch64: Fix buid error
Fix:
In file included from ../tcg/tcg.c:735:
/home1/gaosong/bugfix/qemu/tcg/loongarch64/tcg-target.c.inc: In function
‘tcg_out_vec_op’:
/home1/gaosong/bugfix/qemu/tcg/loongarch64/tcg-target.c.inc:1855:9: error: a
label can only be part of a statement and a declaration is not a statement
TCGCond cond = args[3];
^~~~~~~
Signed-off-by: gaosong <gaosong@loongson.cn>
Message-Id: <20230926075819.3602537-1-gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: f4a06e5921ec93bbb8baeca59f662672077535c3
https://github.com/qemu/qemu/commit/f4a06e5921ec93bbb8baeca59f662672077535c3
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/i386/acpi-build.c
M hw/i386/acpi-common.c
M hw/i386/acpi-common.h
M hw/i386/acpi-microvm.c
Log Message:
-----------
hw/i386/acpi-build: Use pc_madt_cpu_entry() directly
This is x86-specific code, so there is no advantage in using
pc_madt_cpu_entry() behind an architecture-agnostic interface.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230908084234.17642-2-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 9a4fedcf12ae388722fa5430df92d0f41e3ba9be
https://github.com/qemu/qemu/commit/9a4fedcf12ae388722fa5430df92d0f41e3ba9be
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/acpi/cpu.c
M hw/i386/acpi-build.c
M include/hw/acpi/cpu.h
Log Message:
-----------
hw/acpi/cpu: Have build_cpus_aml() take a build_madt_cpu_fn callback
build_cpus_aml() is architecture independent but needs to create architecture-
specific CPU AML. So far this was achieved by using a virtual method from
TYPE_ACPI_DEVICE_IF. However, build_cpus_aml() would resolve this interface from
global (!) state. This makes it quite incomprehensible where this interface
comes from (TYPE_PIIX4_PM?, TYPE_ICH9_LPC_DEVICE?, TYPE_ACPI_GED_X86?) an can
lead to crashes when the generic code is ported to new architectures.
So far, build_cpus_aml() is only called in architecture-specific code -- and
only in x86. We can therefore simply pass pc_madt_cpu_entry() as callback to
build_cpus_aml(). This is the same callback that would be used through
TYPE_ACPI_DEVICE_IF.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230908084234.17642-3-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: c461f3e3820f2a033e7eed08689060328b31dcbf
https://github.com/qemu/qemu/commit/c461f3e3820f2a033e7eed08689060328b31dcbf
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/acpi/acpi-x86-stub.c
M hw/acpi/piix4.c
M hw/i386/generic_event_device_x86.c
M hw/isa/lpc_ich9.c
M include/hw/acpi/acpi_dev_interface.h
Log Message:
-----------
hw/acpi/acpi_dev_interface: Remove now unused madt_cpu virtual method
This virtual method was always set to the x86-specific pc_madt_cpu_entry(),
even in piix4 which is also used in MIPS. The previous changes use
pc_madt_cpu_entry() otherwise, so madt_cpu can be dropped.
Since pc_madt_cpu_entry() is now only used in x86-specific code, the stub
in hw/acpi/acpi-x86-stub can be removed as well.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230908084234.17642-4-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 4f70dd5f6366ac04b0f67d026ee2e17eb35daa45
https://github.com/qemu/qemu/commit/4f70dd5f6366ac04b0f67d026ee2e17eb35daa45
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/acpi/cpu.c
M hw/acpi/hmat.c
M hw/acpi/hmat.h
M hw/acpi/memory_hotplug.c
M include/hw/acpi/acpi_dev_interface.h
Log Message:
-----------
hw/acpi/acpi_dev_interface: Remove now unused #include "hw/boards.h"
The "hw/boards.h" is unused since the previous commit. Since its removal
requires include fixes in various unrelated files to keep the code compiling it
has been split in a dedicated commit.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230908084234.17642-5-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: c9c8ba69d5dbe5c1c6370e1f09ebd7531509d075
https://github.com/qemu/qemu/commit/c9c8ba69d5dbe5c1c6370e1f09ebd7531509d075
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
R hw/i386/generic_event_device_x86.c
M hw/i386/meson.build
M hw/i386/microvm.c
M include/hw/acpi/generic_event_device.h
Log Message:
-----------
hw/i386: Remove now redundant TYPE_ACPI_GED_X86
Now that TYPE_ACPI_GED_X86 doesn't assign AcpiDeviceIfClass::madt_cpu any more
it is the same as TYPE_ACPI_GED.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230908084234.17642-6-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 5cdb639d25f9951a90b6b7ba31d376d8ab132a61
https://github.com/qemu/qemu/commit/5cdb639d25f9951a90b6b7ba31d376d8ab132a61
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/i386/acpi-build.c
Log Message:
-----------
hw/i386/acpi-build: Determine SMI command port just once
The SMI command port is currently hardcoded by means of the ACPI_PORT_SMI_CMD
macro. This hardcoding is Intel specific and doesn't match VIA, for example.
There is already the AcpiFadtData::smi_cmd attribute which is used when building
the FADT. Let's also use it when building the DSDT which confines SMI command
port determination to just one place. This allows it to become a property later,
thus resolving the Intel assumption.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230908084234.17642-7-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 7f558ea58bb60257b111abac0424dc601ff54875
https://github.com/qemu/qemu/commit/7f558ea58bb60257b111abac0424dc601ff54875
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/acpi/core.c
M hw/acpi/piix4.c
M hw/acpi/trace-events
Log Message:
-----------
hw/acpi: Trace GPE access in all device models, not just PIIX4
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230908084234.17642-8-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 40a6b8935d5862840c602f977564d2ebbea60ed6
https://github.com/qemu/qemu/commit/40a6b8935d5862840c602f977564d2ebbea60ed6
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/acpi/core.c
M hw/acpi/trace-events
Log Message:
-----------
hw/acpi/core: Trace enable and status registers of GPE separately
The bit positions of both registers are related. Tracing the registers
independently results in the same offsets across these registers which
eases debugging.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230908084234.17642-9-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: e77db790d1bdef9370d23a0a9350c084ce45d91d
https://github.com/qemu/qemu/commit/e77db790d1bdef9370d23a0a9350c084ce45d91d
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M net/vhost-vdpa.c
Log Message:
-----------
vdpa: fix gcc cvq_isolated uninitialized variable warning
gcc 13.2.1 emits the following warning:
net/vhost-vdpa.c: In function ‘net_vhost_vdpa_init.constprop’:
net/vhost-vdpa.c:1394:25: error: ‘cvq_isolated’ may be used uninitialized
[-Werror=maybe-uninitialized]
1394 | s->cvq_isolated = cvq_isolated;
| ~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~
net/vhost-vdpa.c:1355:9: note: ‘cvq_isolated’ was declared here
1355 | int cvq_isolated;
| ^~~~~~~~~~~~
cc1: all warnings being treated as errors
Cc: Eugenio Pérez <eperezma@redhat.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Jason Wang <jasowang@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-Id: <20230911215435.4156314-1-stefanha@redhat.com>
Acked-by: Eugenio Pérez <eperezma@redhat.com>
Acked-by: Jason Wang <jasowang@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 0a7a164bc37b4ecbf74466e1e5243d72a768ad06
https://github.com/qemu/qemu/commit/0a7a164bc37b4ecbf74466e1e5243d72a768ad06
Author: Eugenio Pérez <eperezma@redhat.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M net/vhost-vdpa.c
Log Message:
-----------
vdpa net: zero vhost_vdpa iova_tree pointer at cleanup
Not zeroing it causes a SIGSEGV if the live migration is cancelled, at
net device restart.
This is caused because CVQ tries to reuse the iova_tree that is present
in the first vhost_vdpa device at the end of vhost_vdpa_net_cvq_start.
As a consequence, it tries to access an iova_tree that has been already
free.
Fixes: 00ef422e9fbf ("vdpa net: move iova tree creation from init to start")
Reported-by: Yanhui Ma <yama@redhat.com>
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20230913123408.2819185-1-eperezma@redhat.com>
Acked-by: Jason Wang <jasowang@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Si-Wei Liu <si-wei.liu@oracle.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: f5a4e1a697e98c7bd0a663d53a378d8c6918ed72
https://github.com/qemu/qemu/commit/f5a4e1a697e98c7bd0a663d53a378d8c6918ed72
Author: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/cxl/cxl-component-utils.c
M include/hw/cxl/cxl_component.h
Log Message:
-----------
hw/cxl: Push cxl_decoder_count_enc() and cxl_decode_ig() into .c
There is no strong justification for keeping these in the header
so push them down into the associated cxl-component-utils.c file.
Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230913132523.29780-2-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 87de174ac49acaa37264e38129596c9819e4a2c5
https://github.com/qemu/qemu/commit/87de174ac49acaa37264e38129596c9819e4a2c5
Author: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/cxl/cxl-component-utils.c
M include/hw/cxl/cxl_component.h
Log Message:
-----------
hw/cxl: Add utility functions decoder interleave ways and target count.
As an encoded version of these key configuration parameters is available
in a register, provide functions to extract it again so as to avoid
the need for duplicating the storage.
Whilst here update the _enc() function to include additional values
as defined in the CXL 3.0 specification. Whilst they are not
currently used in the emulation, they may be in future and it is
easier to compare with the specification if all values are covered.
Add a spec reference for cxl_interleave_ways_enc() for consistency
with the target count equivalent (and because it's nice to know where
the magic numbers come from).
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230913132523.29780-3-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 61c44bcf510f4db51c28d0288e528cfdf0ebabc3
https://github.com/qemu/qemu/commit/61c44bcf510f4db51c28d0288e528cfdf0ebabc3
Author: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/cxl/cxl-component-utils.c
M hw/cxl/cxl-host.c
M hw/mem/cxl_type3.c
M include/hw/cxl/cxl_component.h
Log Message:
-----------
hw/cxl: Fix and use same calculation for HDM decoder block size everywhere
In order to avoid having the size of the per HDM decoder register block
repeated in lots of places, create the register definitions for HDM
decoder 1 and use the offset between the first registers in HDM decoder 0 and
HDM decoder 1 to establish the offset.
Calculate in each function as this is more obvious and leads to shorter
line lengths than a single #define which would need a long name
to be specific enough.
Note that the code currently only supports one decoder, so the bugs this
fixes don't actually affect anything.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230913132523.29780-4-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: e967413fe0f2f3fe022658bb279aef95d24210ec
https://github.com/qemu/qemu/commit/e967413fe0f2f3fe022658bb279aef95d24210ec
Author: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/cxl/cxl-component-utils.c
M hw/cxl/cxl-host.c
M hw/mem/cxl_type3.c
M include/hw/cxl/cxl_component.h
Log Message:
-----------
hw/cxl: Support 4 HDM decoders at all levels of topology
Support these decoders in CXL host bridges (pxb-cxl), CXL Switch USP
and CXL Type 3 end points.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230913132523.29780-5-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 2c9ec2a827f5d36e9cf3c55d931cc0dca2f12092
https://github.com/qemu/qemu/commit/2c9ec2a827f5d36e9cf3c55d931cc0dca2f12092
Author: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/pci-bridge/cxl_upstream.c
Log Message:
-----------
hw/pci-bridge/cxl-upstream: Add serial number extended capability support
Will be needed so there is a defined serial number for
information queries via the Switch CCI.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230913133615.29876-1-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: cbc9ae87b5f6f81c52a249e0b64100d5011fca53
https://github.com/qemu/qemu/commit/cbc9ae87b5f6f81c52a249e0b64100d5011fca53
Author: Eugenio Pérez <eperezma@redhat.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M net/vhost-vdpa.c
Log Message:
-----------
vdpa net: fix error message setting virtio status
It incorrectly prints "error setting features", probably because a copy
paste miss.
Fixes: 152128d646 ("vdpa: move CVQ isolation check to net_init_vhost_vdpa")
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20230915170836.3078172-2-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: f1085882d028e5a1b227443cd6e96bbb63d66f43
https://github.com/qemu/qemu/commit/f1085882d028e5a1b227443cd6e96bbb63d66f43
Author: Eugenio Pérez <eperezma@redhat.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M net/vhost-vdpa.c
Log Message:
-----------
vdpa net: stop probing if cannot set features
Otherwise it continues the CVQ isolation probing.
Fixes: 152128d646 ("vdpa: move CVQ isolation check to net_init_vhost_vdpa")
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20230915170836.3078172-3-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 845ec38ae1578dd2d42ff15c9979f1bf44b23418
https://github.com/qemu/qemu/commit/845ec38ae1578dd2d42ff15c9979f1bf44b23418
Author: Eugenio Pérez <eperezma@redhat.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M net/vhost-vdpa.c
Log Message:
-----------
vdpa net: follow VirtIO initialization properly at cvq isolation probing
This patch solves a few issues. The most obvious is that the feature
set was done previous to ACKNOWLEDGE | DRIVER status bit set. Current
vdpa devices are permissive with this, but it is better to follow the
standard.
Fixes: 152128d646 ("vdpa: move CVQ isolation check to net_init_vhost_vdpa")
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20230915170836.3078172-4-eperezma@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 0114c4513095598cdf1cd8d7dacdfff757628121
https://github.com/qemu/qemu/commit/0114c4513095598cdf1cd8d7dacdfff757628121
Author: Akihiko Odaki <akihiko.odaki@daynix.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/i386/amd_iommu.c
M hw/i386/amd_iommu.h
Log Message:
-----------
amd_iommu: Fix APIC address check
An MSI from I/O APIC may not exactly equal to APIC_DEFAULT_ADDRESS. In
fact, Windows 17763.3650 configures I/O APIC to set the dest_mode bit.
Cover the range assigned to APIC.
Fixes: 577c470f43 ("x86_iommu/amd: Prepare for interrupt remap support")
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20230921114612.40671-1-akihiko.odaki@daynix.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: cf0386509ece089213226855ae685e2228315ffe
https://github.com/qemu/qemu/commit/cf0386509ece089213226855ae685e2228315ffe
Author: Ani Sinha <anisinha@redhat.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/i386/pc.c
M hw/i386/pc_piix.c
M hw/i386/pc_q35.c
M include/hw/i386/pc.h
M tests/qtest/bios-tables-test.c
M tests/qtest/numa-test.c
Log Message:
-----------
hw/i386/pc: improve physical address space bound check for 32-bit x86 systems
32-bit x86 systems do not have a reserved memory for hole64. On those 32-bit
systems without PSE36 or PAE CPU features, hotplugging memory devices are not
supported by QEMU as QEMU always places hotplugged memory above 4 GiB boundary
which is beyond the physical address space of the processor. Linux guests also
does not support memory hotplug on those systems. Please see Linux
kernel commit b59d02ed08690 ("mm/memory_hotplug: disable the functionality
for 32b") for more details.
Therefore, the maximum limit of the guest physical address in the absence of
additional memory devices effectively coincides with the end of
"above 4G memory space" region for 32-bit x86 without PAE/PSE36. When users
configure additional memory devices, after properly accounting for the
additional device memory region to find the maximum value of the guest
physical address, the address will be outside the range of the processor's
physical address space.
This change adds improvements to take above into consideration.
For example, previously this was allowed:
$ ./qemu-system-x86_64 -cpu pentium -m size=10G
With this change now it is no longer allowed:
$ ./qemu-system-x86_64 -cpu pentium -m size=10G
qemu-system-x86_64: Address space limit 0xffffffff < 0x2bfffffff phys-bits too
low (32)
However, the following are allowed since on both cases physical address
space of the processor is 36 bits:
$ ./qemu-system-x86_64 -cpu pentium2 -m size=10G
$ ./qemu-system-x86_64 -cpu pentium,pse36=on -m size=10G
For 32-bit, without PAE/PSE36, hotplugging additional memory is no longer
allowed.
$ ./qemu-system-i386 -m size=1G,maxmem=3G,slots=2
qemu-system-i386: Address space limit 0xffffffff < 0x1ffffffff phys-bits too
low (32)
$ ./qemu-system-i386 -machine q35 -m size=1G,maxmem=3G,slots=2
qemu-system-i386: Address space limit 0xffffffff < 0x1ffffffff phys-bits too
low (32)
A new compatibility flag is introduced to make sure pc_max_used_gpa() keeps
returning the old value for machines 8.1 and older.
Therefore, the above is still allowed for older machine types in order to
support
compatibility. Hence, the following still works:
$ ./qemu-system-i386 -machine pc-i440fx-8.1 -m size=1G,maxmem=3G,slots=2
$ ./qemu-system-i386 -machine pc-q35-8.1 -m size=1G,maxmem=3G,slots=2
Further, following is also allowed as with PSE36, the processor has 36-bit
address space:
$ ./qemu-system-i386 -cpu 486,pse36=on -m size=1G,maxmem=3G,slots=2
After calling CPUID with EAX=0x80000001, all AMD64 compliant processors
have the longmode-capable-bit turned on in the extended feature flags (bit 29)
in EDX. The absence of CPUID longmode can be used to differentiate between
32-bit and 64-bit processors and is the recommended approach. QEMU takes this
approach elsewhere (for example, please see x86_cpu_realizefn()), With
this change, pc_max_used_gpa() also uses the same method to detect 32-bit
processors.
Unit tests are modified to not run 32-bit x86 tests that use memory hotplug.
Suggested-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Ani Sinha <anisinha@redhat.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-Id: <20230922160413.165702-1-anisinha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: f1a153857abc1ba8835b12a01520df9f1b64e15b
https://github.com/qemu/qemu/commit/f1a153857abc1ba8835b12a01520df9f1b64e15b
Author: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/pci/pcie_sriov.c
Log Message:
-----------
pcie_sriov: unregister_vfs(): fix error path
local_err must be NULL before calling object_property_set_bool(), so we
must clear it on each iteration. Let's also use more convenient
error_reportf_err().
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Message-Id: <20230925194040.68592-8-vsementsov@yandex-team.ru>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: a6f4d2ec42f3feb6c399f5760a2567ca78897bd7
https://github.com/qemu/qemu/commit/a6f4d2ec42f3feb6c399f5760a2567ca78897bd7
Author: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M subprojects/libvhost-user/libvhost-user.c
Log Message:
-----------
libvhost-user.c: add assertion to vu_message_read_default
Explain Coverity that we are not going to overflow vmsg->fds.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Message-Id: <20230925194040.68592-5-vsementsov@yandex-team.ru>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 850cd20b072cd330cb24aa1c92732b9722998d40
https://github.com/qemu/qemu/commit/850cd20b072cd330cb24aa1c92732b9722998d40
Author: Ilya Maximets <i.maximets@ovn.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/virtio/virtio.c
Log Message:
-----------
virtio: use shadow_avail_idx while checking number of heads
We do not need the most up to date number of heads, we only want to
know if there is at least one.
Use shadow variable as long as it is not equal to the last available
index checked. This avoids expensive qatomic dereference of the
RCU-protected memory region cache as well as the memory access itself.
The change improves performance of the af-xdp network backend by 2-3%.
Signed-off-by: Ilya Maximets <i.maximets@ovn.org>
Message-Id: <20230927135157.2316982-1-i.maximets@ovn.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: d501f97d9607eff1750549e0270c034102786d33
https://github.com/qemu/qemu/commit/d501f97d9607eff1750549e0270c034102786d33
Author: Ilya Maximets <i.maximets@ovn.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/virtio/virtio.c
Log Message:
-----------
virtio: remove unnecessary thread fence while reading next descriptor
It was supposed to be a compiler barrier and it was a compiler barrier
initially called 'wmb' when virtio core support was introduced.
Later all the instances of 'wmb' were switched to smp_wmb to fix memory
ordering issues on non-x86 platforms. However, this one doesn't need
to be an actual barrier, as its only purpose was to ensure that the
value is not read twice.
And since commit aa570d6fb6bd ("virtio: combine the read of a descriptor")
there is no need for a barrier at all, since we're no longer reading
guest memory here, but accessing a local structure.
Signed-off-by: Ilya Maximets <i.maximets@ovn.org>
Message-Id: <20230927140016.2317404-2-i.maximets@ovn.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 70f88436aa5a8aeddd33e4d06270146af5d5bb52
https://github.com/qemu/qemu/commit/70f88436aa5a8aeddd33e4d06270146af5d5bb52
Author: Ilya Maximets <i.maximets@ovn.org>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M hw/virtio/virtio.c
Log Message:
-----------
virtio: remove unused next argument from virtqueue_split_read_next_desc()
The 'next' was converted from a local variable to an output parameter
in commit:
412e0e81b174 ("virtio: handle virtqueue_read_next_desc() errors")
But all the actual uses of the 'i/next' as an output were removed a few
months prior in commit:
aa570d6fb6bd ("virtio: combine the read of a descriptor")
Remove the unused argument to simplify the code.
Also, adding a comment to the function to describe what it is actually
doing, as it is not obvious that the 'desc' is both an input and an
output argument.
Signed-off-by: Ilya Maximets <i.maximets@ovn.org>
Message-Id: <20230927140016.2317404-3-i.maximets@ovn.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: a6ceee591acdb9c9c772bf59544a57891308222e
https://github.com/qemu/qemu/commit/a6ceee591acdb9c9c772bf59544a57891308222e
Author: Albert Esteve <aesteve@redhat.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M include/qemu/uuid.h
M tests/unit/test-uuid.c
M util/uuid.c
Log Message:
-----------
util/uuid: add a hash function
Add hash function to uuid module using the
djb2 hash algorithm.
Add a couple simple unit tests for the hash
function, checking collisions for similar UUIDs.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Albert Esteve <aesteve@redhat.com>
Message-Id: <20231002065706.94707-2-aesteve@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: faefdba8474fbc30427a64caa4dcd6df611f5b60
https://github.com/qemu/qemu/commit/faefdba8474fbc30427a64caa4dcd6df611f5b60
Author: Albert Esteve <aesteve@redhat.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M MAINTAINERS
M hw/display/meson.build
A hw/display/virtio-dmabuf.c
A include/hw/virtio/virtio-dmabuf.h
M tests/unit/meson.build
A tests/unit/test-virtio-dmabuf.c
Log Message:
-----------
hw/display: introduce virtio-dmabuf
This API manages objects (in this iteration,
dmabuf fds) that can be shared along different
virtio devices, associated to a UUID.
The API allows the different devices to add,
remove and/or retrieve the objects by simply
invoking the public functions that reside in the
virtio-dmabuf file.
For vhost backends, the API stores the pointer
to the backend holding the object.
Suggested-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Albert Esteve <aesteve@redhat.com>
Message-Id: <20231002065706.94707-3-aesteve@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 160947666276c5b7f6bca4d746bcac2966635d79
https://github.com/qemu/qemu/commit/160947666276c5b7f6bca4d746bcac2966635d79
Author: Albert Esteve <aesteve@redhat.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M docs/interop/vhost-user.rst
M hw/virtio/vhost-user.c
M include/hw/virtio/vhost-backend.h
M include/hw/virtio/vhost-user.h
Log Message:
-----------
vhost-user: add shared_object msg
Add three new vhost-user protocol
`VHOST_USER_BACKEND_SHARED_OBJECT_* messages`.
These new messages are sent from vhost-user
back-ends to interact with the virtio-dmabuf
table in order to add or remove themselves as
virtio exporters, or lookup for virtio dma-buf
shared objects.
The action taken in the front-end depends
on the type stored in the virtio shared
object hash table.
When the table holds a pointer to a vhost
backend for a given UUID, the front-end sends
a VHOST_USER_GET_SHARED_OBJECT to the
backend holding the shared object.
The messages can only be sent after successfully
negotiating a new VHOST_USER_PROTOCOL_F_SHARED_OBJECT
vhost-user protocol feature bit.
Finally, refactor code to send response message so
that all common parts both for the common REPLY_ACK
case, and other data responses, can call it and
avoid code repetition.
Signed-off-by: Albert Esteve <aesteve@redhat.com>
Message-Id: <20231002065706.94707-4-aesteve@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: ce0f3b032a960726c0dddfb4f81f223215179f26
https://github.com/qemu/qemu/commit/ce0f3b032a960726c0dddfb4f81f223215179f26
Author: Albert Esteve <aesteve@redhat.com>
Date: 2023-10-04 (Wed, 04 Oct 2023)
Changed paths:
M subprojects/libvhost-user/libvhost-user.c
M subprojects/libvhost-user/libvhost-user.h
Log Message:
-----------
libvhost-user: handle shared_object msg
In the libvhost-user library we need to
handle VHOST_USER_GET_SHARED_OBJECT requests,
and add helper functions to allow sending messages
to interact with the virtio shared objects
hash table.
Signed-off-by: Albert Esteve <aesteve@redhat.com>
Message-Id: <20231002065706.94707-5-aesteve@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Commit: 800af0aae1cfa456701c5fa1ef273ce47585179c
https://github.com/qemu/qemu/commit/800af0aae1cfa456701c5fa1ef273ce47585179c
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-10-05 (Thu, 05 Oct 2023)
Changed paths:
M MAINTAINERS
R accel/accel-common.c
A accel/accel-target.c
M accel/dummy-cpus.c
M accel/hvf/hvf-accel-ops.c
M accel/kvm/kvm-accel-ops.c
M accel/meson.build
M accel/tcg/atomic_template.h
M accel/tcg/cpu-exec-common.c
M accel/tcg/cpu-exec.c
M accel/tcg/cputlb.c
A accel/tcg/icount-common.c
A accel/tcg/internal-common.h
A accel/tcg/internal-target.h
R accel/tcg/internal.h
M accel/tcg/ldst_atomicity.c.inc
M accel/tcg/ldst_common.c.inc
M accel/tcg/meson.build
M accel/tcg/monitor.c
M accel/tcg/plugin-gen.c
M accel/tcg/tb-maint.c
M accel/tcg/tcg-accel-ops-icount.c
M accel/tcg/tcg-accel-ops-mttcg.c
M accel/tcg/tcg-accel-ops-rr.c
M accel/tcg/tcg-accel-ops.c
M accel/tcg/tcg-all.c
M accel/tcg/translate-all.c
M accel/tcg/translator.c
M accel/tcg/user-exec.c
M bsd-user/bsd-proc.h
M bsd-user/main.c
M bsd-user/signal.c
A cpu-common.c
A cpu-target.c
R cpu.c
R cpus-common.c
M docs/about/deprecated.rst
M gdbstub/gdbstub.c
M gdbstub/user-target.c
M hw/core/cpu-common.c
M hw/i386/kvm/clock.c
M hw/intc/mips_gic.c
M hw/intc/riscv_aclint.c
M hw/intc/riscv_imsic.c
M hw/ppc/e500.c
M hw/ppc/spapr.c
M include/exec/cpu-all.h
M include/exec/cpu-common.h
M include/exec/cpu-defs.h
M include/exec/cpu_ldst.h
M include/exec/exec-all.h
M include/hw/core/accel-cpu.h
M include/hw/core/cpu.h
M include/qemu/accel.h
A include/tcg/startup.h
M include/tcg/tcg.h
M linux-user/elfload.c
M linux-user/exit.c
M linux-user/hppa/signal.c
M linux-user/i386/cpu_loop.c
M linux-user/main.c
M linux-user/signal.c
M linux-user/syscall.c
M meson.build
M meson_options.txt
M monitor/hmp-cmds-target.c
A page-vary-target.c
R page-vary.c
M qom/object.c
M scripts/meson-buildoptions.sh
M semihosting/arm-compat-semi.c
M semihosting/syscalls.c
R softmmu/icount.c
M softmmu/meson.build
M softmmu/watchpoint.c
M target/alpha/cpu.c
M target/alpha/cpu.h
M target/alpha/translate.c
M target/arm/common-semi-target.h
M target/arm/cpu-param.h
M target/arm/cpu.c
M target/arm/cpu.h
M target/arm/cpu64.c
M target/arm/helper.c
M target/arm/ptw.c
M target/arm/tcg/mte_helper.c
M target/arm/tcg/sve_helper.c
M target/arm/tcg/tlb_helper.c
M target/arm/tcg/translate-a32.h
M target/arm/tcg/translate-a64.c
M target/arm/tcg/translate-a64.h
M target/arm/tcg/translate-m-nocp.c
M target/arm/tcg/translate-mve.c
M target/arm/tcg/translate-neon.c
M target/arm/tcg/translate-sme.c
M target/arm/tcg/translate-sve.c
M target/arm/tcg/translate-vfp.c
M target/arm/tcg/translate.c
M target/arm/tcg/translate.h
M target/avr/cpu.c
M target/avr/cpu.h
M target/avr/translate.c
M target/cris/cpu.c
M target/cris/cpu.h
M target/cris/translate.c
M target/cris/translate_v10.c.inc
M target/hexagon/README
M target/hexagon/cpu.c
M target/hexagon/cpu.h
M target/hexagon/gen_tcg.h
M target/hexagon/gen_tcg_funcs.py
M target/hexagon/gen_tcg_hvx.h
M target/hexagon/genptr.c
M target/hexagon/idef-parser/parser-helpers.c
M target/hexagon/macros.h
M target/hexagon/translate.c
M target/hppa/cpu.c
M target/hppa/cpu.h
M target/hppa/mem_helper.c
M target/hppa/translate.c
M target/i386/cpu.c
M target/i386/cpu.h
M target/i386/hvf/hvf-cpu.c
M target/i386/kvm/kvm-cpu.c
M target/i386/nvmm/nvmm-all.c
M target/i386/tcg/decode-new.c.inc
M target/i386/tcg/emit.c.inc
M target/i386/tcg/sysemu/excp_helper.c
M target/i386/tcg/tcg-cpu.c
M target/i386/tcg/translate.c
M target/i386/whpx/whpx-all.c
M target/loongarch/cpu.c
M target/loongarch/cpu.h
M target/loongarch/insn_trans/trans_atomic.c.inc
M target/loongarch/insn_trans/trans_branch.c.inc
M target/loongarch/insn_trans/trans_extra.c.inc
M target/loongarch/insn_trans/trans_farith.c.inc
M target/loongarch/insn_trans/trans_fcmp.c.inc
M target/loongarch/insn_trans/trans_fmemory.c.inc
M target/loongarch/insn_trans/trans_fmov.c.inc
M target/loongarch/insn_trans/trans_memory.c.inc
M target/loongarch/insn_trans/trans_privileged.c.inc
M target/loongarch/insn_trans/trans_vec.c.inc
M target/loongarch/translate.c
M target/m68k/cpu.c
M target/m68k/cpu.h
M target/m68k/translate.c
M target/microblaze/cpu.c
M target/microblaze/cpu.h
M target/microblaze/translate.c
M target/mips/cpu.c
M target/mips/cpu.h
M target/mips/tcg/lcsr_translate.c
M target/mips/tcg/micromips_translate.c.inc
M target/mips/tcg/msa_translate.c
M target/mips/tcg/mxu_translate.c
M target/mips/tcg/nanomips_translate.c.inc
M target/mips/tcg/sysemu/mips-semi.c
M target/mips/tcg/translate.c
M target/mips/tcg/translate.h
M target/mips/tcg/vr54xx_translate.c
M target/nios2/cpu.c
M target/nios2/cpu.h
M target/nios2/translate.c
M target/openrisc/cpu.c
M target/openrisc/cpu.h
M target/openrisc/translate.c
M target/ppc/cpu.h
M target/ppc/cpu_init.c
M target/ppc/excp_helper.c
M target/ppc/power8-pmu-regs.c.inc
M target/ppc/translate.c
M target/ppc/translate/branch-impl.c.inc
M target/ppc/translate/dfp-impl.c.inc
M target/ppc/translate/fixedpoint-impl.c.inc
M target/ppc/translate/fp-impl.c.inc
M target/ppc/translate/processor-ctrl-impl.c.inc
M target/ppc/translate/spe-impl.c.inc
M target/ppc/translate/storage-ctrl-impl.c.inc
M target/ppc/translate/vmx-impl.c.inc
M target/ppc/translate/vsx-impl.c.inc
M target/riscv/cpu.c
M target/riscv/cpu.h
M target/riscv/insn_trans/trans_privileged.c.inc
M target/riscv/insn_trans/trans_rvbf16.c.inc
M target/riscv/insn_trans/trans_rvd.c.inc
M target/riscv/insn_trans/trans_rvf.c.inc
M target/riscv/insn_trans/trans_rvh.c.inc
M target/riscv/insn_trans/trans_rvi.c.inc
M target/riscv/insn_trans/trans_rvm.c.inc
M target/riscv/insn_trans/trans_rvv.c.inc
M target/riscv/insn_trans/trans_rvvk.c.inc
M target/riscv/insn_trans/trans_rvzce.c.inc
M target/riscv/insn_trans/trans_rvzfa.c.inc
M target/riscv/insn_trans/trans_rvzfh.c.inc
M target/riscv/insn_trans/trans_rvzicbo.c.inc
M target/riscv/insn_trans/trans_svinval.c.inc
M target/riscv/insn_trans/trans_xthead.c.inc
M target/riscv/translate.c
M target/rx/cpu.c
M target/rx/cpu.h
M target/rx/translate.c
M target/s390x/cpu.c
M target/s390x/cpu.h
M target/s390x/tcg/translate.c
M target/s390x/tcg/translate_vx.c.inc
M target/sh4/cpu.c
M target/sh4/cpu.h
M target/sh4/op_helper.c
M target/sh4/translate.c
M target/sparc/cpu.c
M target/sparc/cpu.h
M target/sparc/translate.c
M target/tricore/cpu.c
M target/tricore/cpu.h
M target/tricore/translate.c
M target/xtensa/cpu.c
M target/xtensa/cpu.h
M target/xtensa/translate.c
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
M tcg/loongarch64/tcg-target.c.inc
M tcg/tcg-op-gvec.c
M tcg/tcg-op-ldst.c
M tcg/tcg-op.c
M tcg/tcg.c
M tests/avocado/boot_linux_console.py
M tests/avocado/machine_mips_malta.py
M tests/avocado/replay_kernel.py
M tests/avocado/tuxrun_baselines.py
M tests/qemu-iotests/meson.build
Log Message:
-----------
Merge tag 'pull-tcg-20231004' of https://gitlab.com/rth7680/qemu into staging
accel: Introduce AccelClass::cpu_common_[un]realize
accel: Target agnostic code movement
accel/tcg: Cleanups to use CPUState instead of CPUArchState
accel/tcg: Move CPUNegativeOffsetState into CPUState
tcg: Split out tcg init functions to tcg/startup.h
linux-user/hppa: Fix struct target_sigcontext layout
build: Remove --enable-gprof
# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmUdsL4dHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/iYggAvDJEyMCAXSSH97BA
# wZT/2D/MFIhOMk6xrQRnrXfrG70N0iVKz44jl9j7k1D+9BOHcso//DDJH3c96k9A
# MgDb6W2bsWvC15/Qw6BALf5bb/II0MJuCcQvj3CNX5lNkXAWhwIOBhsZx7V9ST1+
# rihN4nowpRWdV5GeCjDGaJW455Y1gc96hICYHy6Eqw1cUgUFt9vm5aYU3FHlat29
# sYRaVYKUL2hRUPPNcPiPq0AaJ8wN6/s8gT+V1UvTzkhHqskoM4ZU89RchuXVoq1h
# SvhKElyULMRzM7thWtpW8qYJPj4mxZsKArESvHjsunGD6KEz3Fh1sy6EKRcdmpG/
# II1vkg==
# =k2Io
# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 04 Oct 2023 14:36:46 EDT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
[full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-tcg-20231004' of https://gitlab.com/rth7680/qemu: (47 commits)
tcg/loongarch64: Fix buid error
tests/avocado: Re-enable MIPS Malta tests (GitLab issue #1884 fixed)
build: Remove --enable-gprof
linux-user/hppa: Fix struct target_sigcontext layout
tcg: Split out tcg init functions to tcg/startup.h
tcg: Remove argument to tcg_prologue_init
accel/tcg: Make cpu-exec-common.c a target agnostic unit
accel/tcg: Make icount.o a target agnostic unit
accel/tcg: Make monitor.c a target-agnostic unit
accel/tcg: Rename target-specific 'internal.h' -> 'internal-target.h'
exec: Rename target specific page-vary.c -> page-vary-target.c
exec: Rename cpu.c -> cpu-target.c
accel: Rename accel-common.c -> accel-target.c
accel: Make accel-blocker.o target agnostic
accel/tcg: Restrict dump_exec_info() declaration
exec: Move cpu_loop_foo() target agnostic functions to 'cpu-common.h'
exec: Make EXCP_FOO definitions target agnostic
accel/tcg: move ld/st helpers to ldst_common.c.inc
accel/tcg: Unify user and softmmu do_[st|ld]*_mmu()
accel/tcg: Remove env_tlb()
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Commit: 2f3913f4b2ad74baeb5a6f1d36efbd9ecdf1057d
https://github.com/qemu/qemu/commit/2f3913f4b2ad74baeb5a6f1d36efbd9ecdf1057d
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-10-05 (Thu, 05 Oct 2023)
Changed paths:
M MAINTAINERS
M docs/interop/vhost-user.rst
M hw/acpi/acpi-x86-stub.c
M hw/acpi/core.c
M hw/acpi/cpu.c
M hw/acpi/hmat.c
M hw/acpi/hmat.h
M hw/acpi/memory_hotplug.c
M hw/acpi/piix4.c
M hw/acpi/trace-events
M hw/core/machine.c
M hw/cxl/cxl-component-utils.c
M hw/cxl/cxl-host.c
M hw/display/meson.build
A hw/display/virtio-dmabuf.c
M hw/i386/acpi-build.c
M hw/i386/acpi-common.c
M hw/i386/acpi-common.h
M hw/i386/acpi-microvm.c
M hw/i386/amd_iommu.c
M hw/i386/amd_iommu.h
R hw/i386/generic_event_device_x86.c
M hw/i386/meson.build
M hw/i386/microvm.c
M hw/i386/pc.c
M hw/i386/pc_piix.c
M hw/i386/pc_q35.c
M hw/isa/lpc_ich9.c
M hw/mem/cxl_type3.c
M hw/net/virtio-net.c
M hw/pci-bridge/cxl_upstream.c
M hw/pci/pci.c
M hw/pci/pci_bridge.c
M hw/pci/pcie_sriov.c
M hw/scsi/vhost-user-scsi.c
M hw/virtio/meson.build
M hw/virtio/trace-events
M hw/virtio/vdpa-dev.c
M hw/virtio/vhost-shadow-virtqueue.c
M hw/virtio/vhost-shadow-virtqueue.h
A hw/virtio/vhost-user-device-pci.c
A hw/virtio/vhost-user-device.c
M hw/virtio/vhost-user-gpio.c
M hw/virtio/vhost-user.c
M hw/virtio/vhost-vdpa.c
M hw/virtio/virtio-qmp.c
M hw/virtio/virtio-qmp.h
M hw/virtio/virtio.c
M include/exec/memory.h
M include/hw/acpi/acpi_dev_interface.h
M include/hw/acpi/cpu.h
M include/hw/acpi/generic_event_device.h
M include/hw/cxl/cxl_component.h
M include/hw/i386/pc.h
M include/hw/pci/pci_bridge.h
M include/hw/virtio/vhost-backend.h
A include/hw/virtio/vhost-user-device.h
M include/hw/virtio/vhost-user.h
M include/hw/virtio/vhost-vdpa.h
A include/hw/virtio/virtio-dmabuf.h
M include/hw/virtio/virtio-net.h
M include/qemu/uuid.h
M net/vhost-vdpa.c
M subprojects/libvhost-user/libvhost-user.c
M subprojects/libvhost-user/libvhost-user.h
M tests/qtest/bios-tables-test.c
M tests/qtest/numa-test.c
M tests/unit/meson.build
M tests/unit/test-uuid.c
A tests/unit/test-virtio-dmabuf.c
M util/uuid.c
Log Message:
-----------
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu
into staging
virtio,pci: features, cleanups
vdpa:
shadow vq vlan support
net migration with cvq
cxl:
support emulating 4 HDM decoders
serial number extended capability
virtio:
hared dma-buf
Fixes, cleanups all over the place.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (53
commits)
libvhost-user: handle shared_object msg
vhost-user: add shared_object msg
hw/display: introduce virtio-dmabuf
util/uuid: add a hash function
virtio: remove unused next argument from virtqueue_split_read_next_desc()
virtio: remove unnecessary thread fence while reading next descriptor
virtio: use shadow_avail_idx while checking number of heads
libvhost-user.c: add assertion to vu_message_read_default
pcie_sriov: unregister_vfs(): fix error path
hw/i386/pc: improve physical address space bound check for 32-bit x86 systems
amd_iommu: Fix APIC address check
vdpa net: follow VirtIO initialization properly at cvq isolation probing
vdpa net: stop probing if cannot set features
vdpa net: fix error message setting virtio status
hw/pci-bridge/cxl-upstream: Add serial number extended capability support
hw/cxl: Support 4 HDM decoders at all levels of topology
hw/cxl: Fix and use same calculation for HDM decoder block size everywhere
hw/cxl: Add utility functions decoder interleave ways and target count.
hw/cxl: Push cxl_decoder_count_enc() and cxl_decode_ig() into .c
vdpa net: zero vhost_vdpa iova_tree pointer at cleanup
...
Conflicts:
hw/core/machine.c
Context conflict with commit 314e0a84cd5d ("hw/core: remove needless
includes") because it removed an adjacent #include.
Compare: https://github.com/qemu/qemu/compare/759897116708...2f3913f4b2ad