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[Qemu-commits] [qemu/qemu] 5e6f3d: target/hppa: Update to SeaBIOS-hppa v
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From: |
Alex Bennée |
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Subject: |
[Qemu-commits] [qemu/qemu] 5e6f3d: target/hppa: Update to SeaBIOS-hppa version 9 |
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Date: |
Tue, 19 Sep 2023 08:27:52 -0700 |
Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: 5e6f3db21f416645ce3e62cba23fcefc2c55b550
https://github.com/qemu/qemu/commit/5e6f3db21f416645ce3e62cba23fcefc2c55b550
Author: Helge Deller <deller@gmx.de>
Date: 2023-09-13 (Wed, 13 Sep 2023)
Changed paths:
M pc-bios/hppa-firmware.img
M roms/seabios-hppa
Log Message:
-----------
target/hppa: Update to SeaBIOS-hppa version 9
Enhancements:
- Support for Block-TLB (BTLB) on 32-bit CPUs
Signed-off-by: Helge Deller <deller@gmx.de>
Commit: 711212ac136daa954d51b3d7e3c0df54aa3da63d
https://github.com/qemu/qemu/commit/711212ac136daa954d51b3d7e3c0df54aa3da63d
Author: Helge Deller <deller@gmx.de>
Date: 2023-09-13 (Wed, 13 Sep 2023)
Changed paths:
M target/hppa/cpu.h
Log Message:
-----------
target/hppa: Allow up to 16 BTLB entries
Reserve 16 out of the 256 TLB entries for Block-TLBs.
Signed-off-by: Helge Deller <deller@gmx.de>
Commit: 0e5903436de712844b0e6cdd862b499c767e09e9
https://github.com/qemu/qemu/commit/0e5903436de712844b0e6cdd862b499c767e09e9
Author: Nicholas Piggin <npiggin@gmail.com>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M accel/tcg/tcg-accel-ops-mttcg.c
Log Message:
-----------
accel/tcg: mttcg remove false-negative halted assertion
mttcg asserts that an execution ending with EXCP_HALTED must have
cpu->halted. However between the event or instruction that sets
cpu->halted and requests exit and the assertion here, an
asynchronous event could clear cpu->halted.
This leads to crashes running AIX on ppc/pseries because it uses
H_CEDE/H_PROD hcalls, where H_CEDE sets self->halted = 1 and
H_PROD sets other cpu->halted = 0 and kicks it.
H_PROD could be turned into an interrupt to wake, but several other
places in ppc, sparc, and semihosting follow what looks like a similar
pattern setting halted = 0 directly. So remove this assertion.
Reported-by: Ivan Warren <ivan@vmfacility.fr>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Message-Id: <20230829010658.8252-1-npiggin@gmail.com>
[rth: Keep the case label and adjust the comment.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: dff1ab68d8c5d4703e07018f504fce6944c529a4
https://github.com/qemu/qemu/commit/dff1ab68d8c5d4703e07018f504fce6944c529a4
Author: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M accel/tcg/cputlb.c
M include/exec/cpu-defs.h
Log Message:
-----------
accel/tcg: Fix the comment for CPUTLBEntryFull
When memory region is ram, the lower TARGET_PAGE_BITS is not the
physical section number. Instead, its value is always 0.
Add comment and assert to make it clear.
Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Message-Id: <20230901060118.379-1-zhiwei_liu@linux.alibaba.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: a1eaa6281f8ba97a9798b6a5772621971d01c046
https://github.com/qemu/qemu/commit/a1eaa6281f8ba97a9798b6a5772621971d01c046
Author: Akihiko Odaki <akihiko.odaki@daynix.com>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M util/oslib-posix.c
Log Message:
-----------
util: Delete checks for old host definitions
IA-64 and PA-RISC host support is already removed with commit
b1cef6d02f ("Drop remaining bits of ia64 host support").
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20230810225922.21600-1-akihiko.odaki@daynix.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 8f7f7e9d40a8ecfd52d7b50f857de9e6272e196f
https://github.com/qemu/qemu/commit/8f7f7e9d40a8ecfd52d7b50f857de9e6272e196f
Author: Akihiko Odaki <akihiko.odaki@daynix.com>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M softmmu/async-teardown.c
Log Message:
-----------
softmmu: Delete checks for old host definitions
PA-RISC host support is already removed with commit
b1cef6d02f ("Drop remaining bits of ia64 host support").
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20230810225922.21600-1-akihiko.odaki@daynix.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: cbf5c83862c13f114f1be49741cb8b10da5d3954
https://github.com/qemu/qemu/commit/cbf5c83862c13f114f1be49741cb8b10da5d3954
Author: Akihiko Odaki <akihiko.odaki@daynix.com>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M include/exec/user/thunk.h
Log Message:
-----------
thunk: Delete checks for old host definitions
Alpha, IA-64, and PA-RISC hosts are no longer supported.
Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20230808152314.102036-1-akihiko.odaki@daynix.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: af88a284148ac8c95ca14203b4f637f48010175a
https://github.com/qemu/qemu/commit/af88a284148ac8c95ca14203b4f637f48010175a
Author: Jiajie Chen <c@jia.je>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M tcg/loongarch64/tcg-insn-defs.c.inc
Log Message:
-----------
tcg/loongarch64: Import LSX instructions
Add opcodes and encoder functions for LSX.
Generated from
https://github.com/jiegec/loongarch-opcodes/tree/qemu-lsx.
Signed-off-by: Jiajie Chen <c@jia.je>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230908022302.180442-2-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 16288ded94417ffb9ce8fa141f5ff6cff3800a60
https://github.com/qemu/qemu/commit/16288ded94417ffb9ce8fa141f5ff6cff3800a60
Author: Jiajie Chen <c@jia.je>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M tcg/loongarch64/tcg-target-con-set.h
M tcg/loongarch64/tcg-target-con-str.h
M tcg/loongarch64/tcg-target.c.inc
M tcg/loongarch64/tcg-target.h
A tcg/loongarch64/tcg-target.opc.h
Log Message:
-----------
tcg/loongarch64: Lower basic tcg vec ops to LSX
LSX support on host cpu is detected via hwcap.
Lower the following ops to LSX:
- dup_vec
- dupi_vec
- dupm_vec
- ld_vec
- st_vec
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230908022302.180442-3-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ebe92db2ccf791208c58d15652f9460a67cc0fdd
https://github.com/qemu/qemu/commit/ebe92db2ccf791208c58d15652f9460a67cc0fdd
Author: Jiajie Chen <c@jia.je>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
M tcg/i386/tcg-target.c.inc
M tcg/loongarch64/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/ppc/tcg-target.c.inc
M tcg/riscv/tcg-target.c.inc
M tcg/s390x/tcg-target.c.inc
M tcg/sparc64/tcg-target.c.inc
M tcg/tcg.c
M tcg/tci/tcg-target.c.inc
Log Message:
-----------
tcg: pass vece to tcg_target_const_match()
Pass vece to tcg_target_const_match() to allow correct interpretation of
const args of vector ops.
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230908022302.180442-4-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d8b6fa593d2d1ca43ba0e918ba86f55627e6d8a0
https://github.com/qemu/qemu/commit/d8b6fa593d2d1ca43ba0e918ba86f55627e6d8a0
Author: Jiajie Chen <c@jia.je>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M tcg/loongarch64/tcg-target-con-set.h
M tcg/loongarch64/tcg-target-con-str.h
M tcg/loongarch64/tcg-target.c.inc
Log Message:
-----------
tcg/loongarch64: Lower cmp_vec to vseq/vsle/vslt
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230908022302.180442-5-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e9d7c8cf95b67a9836e7f9de34e9739178412828
https://github.com/qemu/qemu/commit/e9d7c8cf95b67a9836e7f9de34e9739178412828
Author: Jiajie Chen <c@jia.je>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M tcg/loongarch64/tcg-target-con-set.h
M tcg/loongarch64/tcg-target-con-str.h
M tcg/loongarch64/tcg-target.c.inc
Log Message:
-----------
tcg/loongarch64: Lower add/sub_vec to vadd/vsub
Lower the following ops:
- add_vec
- sub_vec
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230908022302.180442-6-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 24c42fde52be2152b81ecf51ba75849d401eca63
https://github.com/qemu/qemu/commit/24c42fde52be2152b81ecf51ba75849d401eca63
Author: Jiajie Chen <c@jia.je>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M tcg/loongarch64/tcg-target-con-set.h
M tcg/loongarch64/tcg-target.c.inc
M tcg/loongarch64/tcg-target.h
Log Message:
-----------
tcg/loongarch64: Lower vector bitwise operations
Lower the following ops:
- and_vec
- andc_vec
- or_vec
- orc_vec
- xor_vec
- nor_vec
- not_vec
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230908022302.180442-7-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 7d577c3ecd21389cdedcd150c18b5a3929a570c9
https://github.com/qemu/qemu/commit/7d577c3ecd21389cdedcd150c18b5a3929a570c9
Author: Jiajie Chen <c@jia.je>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M tcg/loongarch64/tcg-target.c.inc
M tcg/loongarch64/tcg-target.h
Log Message:
-----------
tcg/loongarch64: Lower neg_vec to vneg
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230908022302.180442-8-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 76d20c205df74617e75293533d907166a0b12970
https://github.com/qemu/qemu/commit/76d20c205df74617e75293533d907166a0b12970
Author: Jiajie Chen <c@jia.je>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M tcg/loongarch64/tcg-target.c.inc
M tcg/loongarch64/tcg-target.h
Log Message:
-----------
tcg/loongarch64: Lower mul_vec to vmul
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230908022302.180442-9-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: b2f84adc009afa543879446d4486c46b1c035909
https://github.com/qemu/qemu/commit/b2f84adc009afa543879446d4486c46b1c035909
Author: Jiajie Chen <c@jia.je>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M tcg/loongarch64/tcg-target.c.inc
M tcg/loongarch64/tcg-target.h
Log Message:
-----------
tcg/loongarch64: Lower vector min max ops
Lower the following ops:
- smin_vec
- smax_vec
- umin_vec
- umax_vec
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230908022302.180442-10-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 5256ea11767bda4d765384245758b40dc4cdf195
https://github.com/qemu/qemu/commit/5256ea11767bda4d765384245758b40dc4cdf195
Author: Jiajie Chen <c@jia.je>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M tcg/loongarch64/tcg-target.c.inc
M tcg/loongarch64/tcg-target.h
Log Message:
-----------
tcg/loongarch64: Lower vector saturated ops
Lower the following ops:
- ssadd_vec
- usadd_vec
- sssub_vec
- ussub_vec
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230908022302.180442-11-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 94304d7b3dead74e87fdb557e909b57bf0f468da
https://github.com/qemu/qemu/commit/94304d7b3dead74e87fdb557e909b57bf0f468da
Author: Jiajie Chen <c@jia.je>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M tcg/loongarch64/tcg-target.c.inc
M tcg/loongarch64/tcg-target.h
Log Message:
-----------
tcg/loongarch64: Lower vector shift vector ops
Lower the following ops:
- shlv_vec
- shrv_vec
- sarv_vec
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230908022302.180442-12-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: c8b859b45e25000a427fbb4aa8ebcc55c7777503
https://github.com/qemu/qemu/commit/c8b859b45e25000a427fbb4aa8ebcc55c7777503
Author: Jiajie Chen <c@jia.je>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M tcg/loongarch64/tcg-target-con-set.h
M tcg/loongarch64/tcg-target.c.inc
M tcg/loongarch64/tcg-target.h
Log Message:
-----------
tcg/loongarch64: Lower bitsel_vec to vbitsel
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230908022302.180442-13-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 2931527b4d94d959a03033fd261af06ecd32eb8b
https://github.com/qemu/qemu/commit/2931527b4d94d959a03033fd261af06ecd32eb8b
Author: Jiajie Chen <c@jia.je>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M tcg/loongarch64/tcg-target.c.inc
M tcg/loongarch64/tcg-target.h
Log Message:
-----------
tcg/loongarch64: Lower vector shift integer ops
Lower the following ops:
- shli_vec
- shrv_vec
- sarv_vec
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230908022302.180442-14-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 0765cce114cea98bffa42bf8ab62e6c50178e93b
https://github.com/qemu/qemu/commit/0765cce114cea98bffa42bf8ab62e6c50178e93b
Author: Jiajie Chen <c@jia.je>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M tcg/loongarch64/tcg-target.c.inc
M tcg/loongarch64/tcg-target.h
Log Message:
-----------
tcg/loongarch64: Lower rotv_vec ops to LSX
Lower the following ops:
- rotrv_vec
- rotlv_vec
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230908022302.180442-15-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 561b001aef635e47930f4f12647e206c5711cf5f
https://github.com/qemu/qemu/commit/561b001aef635e47930f4f12647e206c5711cf5f
Author: Jiajie Chen <c@jia.je>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M tcg/loongarch64/tcg-target.c.inc
M tcg/loongarch64/tcg-target.h
Log Message:
-----------
tcg/loongarch64: Lower rotli_vec to vrotri
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230908022302.180442-16-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 6d1ef68ccafc7989e73b499b617f97d96ea34ac1
https://github.com/qemu/qemu/commit/6d1ef68ccafc7989e73b499b617f97d96ea34ac1
Author: Helge Deller <deller@gmx.de>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M hw/hppa/machine.c
Log Message:
-----------
target/hppa: Report and clear BTLBs via fw_cfg at startup
Report the new number of TLB entries (without BTLBs) to the
guest and drop reporting of BTLB entries which weren't used at all.
Clear all BTLB and TLB entries at machine reset.
Signed-off-by: Helge Deller <deller@gmx.de>
Commit: fa824d99f9b5c6f5246b8ddc6d7b794d4413e5f4
https://github.com/qemu/qemu/commit/fa824d99f9b5c6f5246b8ddc6d7b794d4413e5f4
Author: Helge Deller <deller@gmx.de>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M target/hppa/cpu.h
M target/hppa/int_helper.c
M target/hppa/mem_helper.c
M target/hppa/op_helper.c
Log Message:
-----------
target/hppa: Add BTLB support to hppa TLB functions
Change the TLB code to store the Block-TLBs at the beginning
of the TLB table. New 4k TLB entries which are added later
shall not overwrite any of the BTLB entries.
Make sure that when the TLB is cleared by the OS via the ptlbe
instruction, the Block-TLBs will not be dropped.
Signed-off-by: Helge Deller <deller@gmx.de>
Commit: a64b8842f17c1e607d78bef930bb58e3748551dc
https://github.com/qemu/qemu/commit/a64b8842f17c1e607d78bef930bb58e3748551dc
Author: Helge Deller <deller@gmx.de>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M target/hppa/insns.decode
Log Message:
-----------
target/hppa: Extract diagnose immediate value
Extract the immediate value given by the diagnose CPU instruction.
This is needed to distinguish the various diagnose calls.
Signed-off-by: Helge Deller <deller@gmx.de>
Commit: d8a317dbe65997939fdb73f57035aa2c3523dfa8
https://github.com/qemu/qemu/commit/d8a317dbe65997939fdb73f57035aa2c3523dfa8
Author: Helge Deller <deller@gmx.de>
Date: 2023-09-15 (Fri, 15 Sep 2023)
Changed paths:
M target/hppa/helper.h
M target/hppa/mem_helper.c
M target/hppa/translate.c
Log Message:
-----------
target/hppa: Wire up diag instruction to support BTLB
Wire up the hppa diag instruction to support Block-TLBs
when called with the 0x100 value.
The diag_btlb() helper function does all necessary steps
to emulate the PDC BTLB firmware function, which includes
providing BTLB info, adding a new BTLB, deleting a BTLB
and removing all BTLBs.
Signed-off-by: Helge Deller <deller@gmx.de>
Commit: 58f8961285a7dbb1f6b9152b2ff5a11bd1813f04
https://github.com/qemu/qemu/commit/58f8961285a7dbb1f6b9152b2ff5a11bd1813f04
Author: Jiajie Chen <c@jia.je>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M tcg/loongarch64/tcg-target-con-set.h
M tcg/loongarch64/tcg-target.c.inc
M tcg/loongarch64/tcg-target.h
Log Message:
-----------
tcg/loongarch64: Implement 128-bit load & store
If LSX is available, use LSX instructions to implement 128-bit load &
store when MO_128 is required, otherwise use two 64-bit loads & stores.
Signed-off-by: Jiajie Chen <c@jia.je>
Message-Id: <20230908022302.180442-17-c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 9622c697d1bb2addec4added61e3a0f6ad5e8bfb
https://github.com/qemu/qemu/commit/9622c697d1bb2addec4added61e3a0f6ad5e8bfb
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M accel/tcg/tcg-runtime-gvec.c
M accel/tcg/tcg-runtime.h
M include/tcg/tcg-op-gvec-common.h
M tcg/tcg-op-gvec.c
Log Message:
-----------
tcg: Add gvec compare with immediate and scalar operand
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230831030904.1194667-2-richard.henderson@linaro.org>
Commit: e8967b6152b2b1fd953943ad03189d8a8b7f637b
https://github.com/qemu/qemu/commit/e8967b6152b2b1fd953943ad03189d8a8b7f637b
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M target/arm/tcg/translate.c
Log Message:
-----------
target/arm: Use tcg_gen_gvec_cmpi for compare vs 0
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230831030904.1194667-3-richard.henderson@linaro.org>
Commit: da6aef48d9a1bcda301a3a922b240a2c1aba8026
https://github.com/qemu/qemu/commit/da6aef48d9a1bcda301a3a922b240a2c1aba8026
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M accel/tcg/cputlb.c
M include/hw/core/cpu.h
M include/qemu/typedefs.h
Log Message:
-----------
accel/tcg: Simplify tlb_plugin_lookup
Now that we defer address space update and tlb_flush until
the next async_run_on_cpu, the plugin run at the end of the
instruction no longer has to contend with a flushed tlb.
Therefore, delete SavedIOTLB entirely.
Properly return false from tlb_plugin_lookup when we do
not have a tlb match.
Fixes a bug in which SavedIOTLB had stale data, because
there were multiple i/o accesses within a single insn.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: fb3cb376e9d97970b29f571b22f8729f7ca8b945
https://github.com/qemu/qemu/commit/fb3cb376e9d97970b29f571b22f8729f7ca8b945
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M accel/tcg/cputlb.c
Log Message:
-----------
accel/tcg: Split out io_prepare and io_failed
These are common code from io_readx and io_writex.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 0e1144400fc390c0b6c37c252e95961cfab1dde9
https://github.com/qemu/qemu/commit/0e1144400fc390c0b6c37c252e95961cfab1dde9
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M accel/tcg/cputlb.c
Log Message:
-----------
accel/tcg: Use CPUTLBEntryFull.phys_addr in io_failed
Since the introduction of CPUTLBEntryFull, we can recover
the full cpu address space physical address without having
to examine the MemoryRegionSection.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 405c02d85de283dfe44560ae05db909d1f0cfd45
https://github.com/qemu/qemu/commit/405c02d85de283dfe44560ae05db909d1f0cfd45
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M accel/tcg/cputlb.c
M include/qemu/plugin-memory.h
M plugins/api.c
Log Message:
-----------
plugin: Simplify struct qemu_plugin_hwaddr
Rather than saving MemoryRegionSection and offset,
save phys_addr and MemoryRegion. This matches up
much closer with the plugin api.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: bef0c2167829366454930108c65d6d9f4e77536f
https://github.com/qemu/qemu/commit/bef0c2167829366454930108c65d6d9f4e77536f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M accel/tcg/cputlb.c
Log Message:
-----------
accel/tcg: Merge cpu_transaction_failed into io_failed
Push computation down into the if statements to the point
the data is used.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d89c64f6fd1c949ab6d698f4970fd9fd1b177f8e
https://github.com/qemu/qemu/commit/d89c64f6fd1c949ab6d698f4970fd9fd1b177f8e
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M accel/tcg/cputlb.c
Log Message:
-----------
accel/tcg: Replace direct use of io_readx/io_writex in do_{ld,st}_1
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 13e617475dc5fc7ad3491c5fe0b64f755c969e34
https://github.com/qemu/qemu/commit/13e617475dc5fc7ad3491c5fe0b64f755c969e34
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M accel/tcg/cputlb.c
Log Message:
-----------
accel/tcg: Merge io_readx into do_ld_mmio_beN
Avoid multiple calls to io_prepare for unaligned acceses.
One call to do_ld_mmio_beN will never cross pages.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 5646d6a70fc24cf434582ccdd0c8840d79fe7cc8
https://github.com/qemu/qemu/commit/5646d6a70fc24cf434582ccdd0c8840d79fe7cc8
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M accel/tcg/cputlb.c
Log Message:
-----------
accel/tcg: Merge io_writex into do_st_mmio_leN
Avoid multiple calls to io_prepare for unaligned acceses.
One call to do_st_mmio_leN will never cross pages.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 8bf6726741fabafec244c880ae809e380bd73cbc
https://github.com/qemu/qemu/commit/8bf6726741fabafec244c880ae809e380bd73cbc
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M accel/tcg/cputlb.c
Log Message:
-----------
accel/tcg: Introduce do_ld16_mmio_beN
Split out int_ld_mmio_beN, to be used by both do_ld_mmio_beN
and do_ld16_mmio_beN. Move the locks down into the two
functions, since each one now covers all accesses to once page.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 1f9823cea21c3a8de8e04b26016844aeeb2b59c6
https://github.com/qemu/qemu/commit/1f9823cea21c3a8de8e04b26016844aeeb2b59c6
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M accel/tcg/cputlb.c
Log Message:
-----------
accel/tcg: Introduce do_st16_mmio_leN
Split out int_st_mmio_leN, to be used by both do_st_mmio_leN
and do_st16_mmio_leN. Move the locks down into the two
functions, since each one now covers all accesses to once page.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 00f9ef8f3dd6940001311a6230985243c3ebb996
https://github.com/qemu/qemu/commit/00f9ef8f3dd6940001311a6230985243c3ebb996
Author: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M fpu/softfloat.c
M include/fpu/softfloat.h
Log Message:
-----------
fpu: Add conversions between bfloat16 and [u]int8
We missed these functions when upstreaming the bfloat16 support.
Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Message-Id: <20230531065458.2082-1-zhiwei_liu@linux.alibaba.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 722460652b3aee89dc19df61f1f33df53a9b97c9
https://github.com/qemu/qemu/commit/722460652b3aee89dc19df61f1f33df53a9b97c9
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M fpu/softfloat-parts.c.inc
M fpu/softfloat.c
M tests/tcg/m68k/Makefile.target
A tests/tcg/m68k/denormal.c
Log Message:
-----------
fpu: Handle m68k extended precision denormals properly
Motorola treats denormals with explicit integer bit set as
having unbiased exponent 0, unlike Intel which treats it as
having unbiased exponent 1 (more like all other IEEE formats
that have no explicit integer bit).
Add a flag on FloatFmt to differentiate the behaviour.
Reported-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 9358fbbf6e478e0d734756c9b4d547cdf69947d6
https://github.com/qemu/qemu/commit/9358fbbf6e478e0d734756c9b4d547cdf69947d6
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
M tcg/i386/tcg-target.c.inc
M tcg/loongarch64/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/ppc/tcg-target.c.inc
M tcg/riscv/tcg-target.c.inc
M tcg/s390x/tcg-target.c.inc
M tcg/sparc64/tcg-target.c.inc
M tcg/tcg.c
M tcg/tci/tcg-target.c.inc
Log Message:
-----------
tcg: Add tcg_out_tb_start backend hook
This hook may emit code at the beginning of the TB.
Suggested-by: Jordan Niethe <jniethe5@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 095859e5d97284dd3ea666c337845dc63f6ba5e7
https://github.com/qemu/qemu/commit/095859e5d97284dd3ea666c337845dc63f6ba5e7
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M host/include/aarch64/host/cpuinfo.h
M util/cpuinfo-aarch64.c
Log Message:
-----------
util/cpuinfo-aarch64: Add CPUINFO_BTI
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 5826a0dbf097c50c5b6db71054cffed972c7e9e6
https://github.com/qemu/qemu/commit/5826a0dbf097c50c5b6db71054cffed972c7e9e6
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
Log Message:
-----------
tcg/aarch64: Emit BTI insns at jump landing pads
The prologue is entered via "call"; the epilogue, each tb,
and each goto_tb continuation point are all reached via "jump".
As tcg_out_goto_long is only used by tcg_out_exit_tb, merge
the two functions. Change the indirect register used to
TCG_REG_TMP1, aka X17, so that the BTI condition created
is "jump" instead of "jump or call".
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: a97a83753c90d79ed15a716610af23fabd84aaed
https://github.com/qemu/qemu/commit/a97a83753c90d79ed15a716610af23fabd84aaed
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M tcg/region.c
Log Message:
-----------
tcg: Map code_gen_buffer with PROT_BTI
For linux aarch64 host supporting BTI, map the buffer
to require BTI instructions at branch landing pads.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 7764cf2a5006f957f812c7c516edec5e2a392c73
https://github.com/qemu/qemu/commit/7764cf2a5006f957f812c7c516edec5e2a392c73
Author: Mikulas Patocka <mpatocka@redhat.com>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M linux-user/hppa/signal.c
Log Message:
-----------
linux-user/hppa: clear the PSW 'N' bit when delivering signals
qemu-hppa may crash when delivering a signal. It can be demonstrated with
this program. Compile the program with "hppa-linux-gnu-gcc -O2 signal.c"
and run it with "qemu-hppa -one-insn-per-tb a.out". It reports that the
address of the flag is 0xb4 and it crashes when attempting to touch it.
#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <signal.h>
sig_atomic_t flag;
void sig(int n)
{
printf("&flag: %p\n", &flag);
flag = 1;
}
int main(void)
{
struct sigaction sa;
struct itimerval it;
sa.sa_handler = sig;
sigemptyset(&sa.sa_mask);
sa.sa_flags = SA_RESTART;
if (sigaction(SIGALRM, &sa, NULL)) perror("sigaction"), exit(1);
it.it_interval.tv_sec = 0;
it.it_interval.tv_usec = 100;
it.it_value.tv_sec = it.it_interval.tv_sec;
it.it_value.tv_usec = it.it_interval.tv_usec;
if (setitimer(ITIMER_REAL, &it, NULL)) perror("setitimer"), exit(1);
while (1) {
}
}
The reason for the crash is that the signal handling routine doesn't clear
the 'N' flag in the PSW. If the signal interrupts a thread when the 'N'
flag is set, the flag remains set at the beginning of the signal handler
and the first instruction of the signal handler is skipped.
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Acked-by: Helge Deller <deller@gmx.de>
Cc: qemu-stable@nongnu.org
Signed-off-by: Helge Deller <deller@gmx.de>
Commit: 303b1febe3dcd519314d6ed80d97a706cdd21f64
https://github.com/qemu/qemu/commit/303b1febe3dcd519314d6ed80d97a706cdd21f64
Author: Mikulas Patocka <mpatocka@redhat.com>
Date: 2023-09-16 (Sat, 16 Sep 2023)
Changed paths:
M linux-user/hppa/signal.c
Log Message:
-----------
linux-user/hppa: lock both words of function descriptor
The code in setup_rt_frame reads two words at haddr, but locks only one.
This patch fixes it to lock both.
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Acked-by: Helge Deller <deller@gmx.de>
Cc: qemu-stable@nongnu.org
Signed-off-by: Helge Deller <deller@gmx.de>
Commit: 2ab0ec31215e68f7af6b21b62e49141eb7c083e2
https://github.com/qemu/qemu/commit/2ab0ec31215e68f7af6b21b62e49141eb7c083e2
Author: Andrew Melnychenko <andrew@daynix.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M hw/net/e1000e_core.c
M hw/net/igb_core.c
M hw/net/virtio-net.c
M hw/net/vmxnet3.c
M include/net/net.h
M net/net.c
M net/netmap.c
M net/tap-bsd.c
M net/tap-linux.c
M net/tap-linux.h
M net/tap-solaris.c
M net/tap-stub.c
M net/tap-win32.c
M net/tap.c
M net/tap_int.h
Log Message:
-----------
tap: Add USO support to tap device.
Passing additional parameters (USOv4 and USOv6 offloads) when
setting TAP offloads
Signed-off-by: Yuri Benditovich <yuri.benditovich@daynix.com>
Signed-off-by: Andrew Melnychenko <andrew@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Commit: f03e0cf63b97a2f98d3b642ee5e7b3bb4379b4b1
https://github.com/qemu/qemu/commit/f03e0cf63b97a2f98d3b642ee5e7b3bb4379b4b1
Author: Yuri Benditovich <yuri.benditovich@daynix.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M include/net/net.h
M net/net.c
M net/tap-bsd.c
M net/tap-linux.c
M net/tap-solaris.c
M net/tap-stub.c
M net/tap.c
M net/tap_int.h
Log Message:
-----------
tap: Add check for USO features
Tap indicates support for USO features according to
capabilities of current kernel module.
Signed-off-by: Yuri Benditovich <yuri.benditovich@daynix.com>
Signed-off-by: Andrew Melnychecnko <andrew@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Commit: 9da1684954d10b4d22277b93b4c03e89d38976a1
https://github.com/qemu/qemu/commit/9da1684954d10b4d22277b93b4c03e89d38976a1
Author: Andrew Melnychenko <andrew@daynix.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M hw/net/vhost_net.c
M net/vhost-vdpa.c
Log Message:
-----------
virtio-net: Add USO flags to vhost support.
New features are subject to check with vhost-user and vdpa.
Signed-off-by: Yuri Benditovich <yuri.benditovich@daynix.com>
Signed-off-by: Andrew Melnychenko <andrew@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Commit: 53da8b5a992deab25d4f53233891b1aeed7104a6
https://github.com/qemu/qemu/commit/53da8b5a992deab25d4f53233891b1aeed7104a6
Author: Yuri Benditovich <yuri.benditovich@daynix.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M hw/core/machine.c
M hw/net/virtio-net.c
Log Message:
-----------
virtio-net: Add support for USO features
USO features of virtio-net device depend on kernel ability
to support them, for backward compatibility by default the
features are disabled on 8.0 and earlier.
Signed-off-by: Yuri Benditovich <yuri.benditovich@daynix.com>
Signed-off-by: Andrew Melnychecnko <andrew@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Commit: 2959c51dded9f5d6f35713655340f219adab5e07
https://github.com/qemu/qemu/commit/2959c51dded9f5d6f35713655340f219adab5e07
Author: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M hw/net/igb_core.c
Log Message:
-----------
igb: remove TCP ACK detection
TCP ACK detection is no longer present in igb.
Signed-off-by: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Tested-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Commit: a86aee7e953da69c444759a02f2686cab216cb93
https://github.com/qemu/qemu/commit/a86aee7e953da69c444759a02f2686cab216cb93
Author: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M hw/net/e1000e_core.c
M hw/net/igb_core.c
Log Message:
-----------
igb: rename E1000E_RingInfo_st
Rename E1000E_RingInfo_st and E1000E_RingInfo according to qemu typdefs guide.
Signed-off-by: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Tested-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Commit: ec82ad7c4d61061d78907436ceb181859ab4a8d5
https://github.com/qemu/qemu/commit/ec82ad7c4d61061d78907436ceb181859ab4a8d5
Author: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M hw/net/igb_core.c
M hw/net/igb_regs.h
M hw/net/trace-events
Log Message:
-----------
igb: RX descriptors guest writting refactoring
Refactoring is done in preparation for support of multiple advanced
descriptors RX modes, especially packet-split modes.
Signed-off-by: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Tested-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Commit: 17ccd01647960e760f9b3daa41bcdc6aabd2ddc9
https://github.com/qemu/qemu/commit/17ccd01647960e760f9b3daa41bcdc6aabd2ddc9
Author: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M hw/net/e1000e_core.c
M hw/net/igb_core.c
M tests/qtest/libqos/igb.c
Log Message:
-----------
igb: RX payload guest writting refactoring
Refactoring is done in preparation for support of multiple advanced
descriptors RX modes, especially packet-split modes.
Signed-off-by: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Tested-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Commit: 1c4e67a5be1fd89bd2c919799b2eb1478142848a
https://github.com/qemu/qemu/commit/1c4e67a5be1fd89bd2c919799b2eb1478142848a
Author: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M hw/net/igb_core.c
M hw/net/igb_regs.h
Log Message:
-----------
igb: add IPv6 extended headers traffic detection
Signed-off-by: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Tested-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Commit: 560cf339b2a50bfb6bbeb53801065119e03118f3
https://github.com/qemu/qemu/commit/560cf339b2a50bfb6bbeb53801065119e03118f3
Author: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M hw/net/igb_core.c
M hw/net/igb_regs.h
M hw/net/trace-events
Log Message:
-----------
igb: packet-split descriptors support
Packet-split descriptors are used by Linux VF driver for MTU values from 2048
Signed-off-by: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Tested-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Commit: e710f9c47008287086b73cb747c1b1d2a4e17bfb
https://github.com/qemu/qemu/commit/e710f9c47008287086b73cb747c1b1d2a4e17bfb
Author: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M hw/net/e1000e_core.c
Log Message:
-----------
e1000e: rename e1000e_ba_state and e1000e_write_hdr_to_rx_buffers
Rename e1000e_ba_state according and e1000e_write_hdr_to_rx_buffers for
consistency with IGB.
Signed-off-by: Tomasz Dzieciol <t.dzieciol@partner.samsung.com>
Reviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Tested-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Commit: a6f376e9ba1533aa12bce5136a1f72df2dc2c753
https://github.com/qemu/qemu/commit/a6f376e9ba1533aa12bce5136a1f72df2dc2c753
Author: Ilya Maximets <i.maximets@ovn.org>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M tests/docker/dockerfiles/debian-amd64-cross.docker
M tests/docker/dockerfiles/debian-amd64.docker
M tests/docker/dockerfiles/debian-arm64-cross.docker
M tests/docker/dockerfiles/debian-armel-cross.docker
M tests/docker/dockerfiles/debian-armhf-cross.docker
M tests/docker/dockerfiles/debian-ppc64el-cross.docker
M tests/docker/dockerfiles/debian-s390x-cross.docker
M tests/docker/dockerfiles/opensuse-leap.docker
M tests/docker/dockerfiles/ubuntu2004.docker
M tests/docker/dockerfiles/ubuntu2204.docker
M tests/lcitool/libvirt-ci
Log Message:
-----------
tests: bump libvirt-ci for libasan and libxdp
This pulls in the fixes for libasan version as well as support for
libxdp that will be used for af-xdp netdev in the next commits.
Signed-off-by: Ilya Maximets <i.maximets@ovn.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Commit: cb039ef3d9e3112da01e1ecd9b136ac9809ef733
https://github.com/qemu/qemu/commit/cb039ef3d9e3112da01e1ecd9b136ac9809ef733
Author: Ilya Maximets <i.maximets@ovn.org>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M MAINTAINERS
M hmp-commands.hx
M meson.build
M meson_options.txt
A net/af-xdp.c
M net/clients.h
M net/meson.build
M net/net.c
M qapi/net.json
M qemu-options.hx
M scripts/ci/org.centos/stream/8/x86_64/configure
M scripts/meson-buildoptions.sh
M tests/docker/dockerfiles/alpine.docker
M tests/docker/dockerfiles/centos8.docker
M tests/docker/dockerfiles/fedora.docker
M tests/lcitool/projects/qemu.yml
Log Message:
-----------
net: add initial support for AF_XDP network backend
AF_XDP is a network socket family that allows communication directly
with the network device driver in the kernel, bypassing most or all
of the kernel networking stack. In the essence, the technology is
pretty similar to netmap. But, unlike netmap, AF_XDP is Linux-native
and works with any network interfaces without driver modifications.
Unlike vhost-based backends (kernel, user, vdpa), AF_XDP doesn't
require access to character devices or unix sockets. Only access to
the network interface itself is necessary.
This patch implements a network backend that communicates with the
kernel by creating an AF_XDP socket. A chunk of userspace memory
is shared between QEMU and the host kernel. 4 ring buffers (Tx, Rx,
Fill and Completion) are placed in that memory along with a pool of
memory buffers for the packet data. Data transmission is done by
allocating one of the buffers, copying packet data into it and
placing the pointer into Tx ring. After transmission, device will
return the buffer via Completion ring. On Rx, device will take
a buffer form a pre-populated Fill ring, write the packet data into
it and place the buffer into Rx ring.
AF_XDP network backend takes on the communication with the host
kernel and the network interface and forwards packets to/from the
peer device in QEMU.
Usage example:
-device virtio-net-pci,netdev=guest1,mac=00:16:35:AF:AA:5C
-netdev af-xdp,ifname=ens6f1np1,id=guest1,mode=native,queues=1
XDP program bridges the socket with a network interface. It can be
attached to the interface in 2 different modes:
1. skb - this mode should work for any interface and doesn't require
driver support. With a caveat of lower performance.
2. native - this does require support from the driver and allows to
bypass skb allocation in the kernel and potentially use
zero-copy while getting packets in/out userspace.
By default, QEMU will try to use native mode and fall back to skb.
Mode can be forced via 'mode' option. To force 'copy' even in native
mode, use 'force-copy=on' option. This might be useful if there is
some issue with the driver.
Option 'queues=N' allows to specify how many device queues should
be open. Note that all the queues that are not open are still
functional and can receive traffic, but it will not be delivered to
QEMU. So, the number of device queues should generally match the
QEMU configuration, unless the device is shared with something
else and the traffic re-direction to appropriate queues is correctly
configured on a device level (e.g. with ethtool -N).
'start-queue=M' option can be used to specify from which queue id
QEMU should start configuring 'N' queues. It might also be necessary
to use this option with certain NICs, e.g. MLX5 NICs. See the docs
for examples.
In a general case QEMU will need CAP_NET_ADMIN and CAP_SYS_ADMIN
or CAP_BPF capabilities in order to load default XSK/XDP programs to
the network interface and configure BPF maps. It is possible, however,
to run with no capabilities. For that to work, an external process
with enough capabilities will need to pre-load default XSK program,
create AF_XDP sockets and pass their file descriptors to QEMU process
on startup via 'sock-fds' option. Network backend will need to be
configured with 'inhibit=on' to avoid loading of the program.
QEMU will need 32 MB of locked memory (RLIMIT_MEMLOCK) per queue
or CAP_IPC_LOCK.
There are few performance challenges with the current network backends.
First is that they do not support IO threads. This means that data
path is handled by the main thread in QEMU and may slow down other
work or may be slowed down by some other work. This also means that
taking advantage of multi-queue is generally not possible today.
Another thing is that data path is going through the device emulation
code, which is not really optimized for performance. The fastest
"frontend" device is virtio-net. But it's not optimized for heavy
traffic either, because it expects such use-cases to be handled via
some implementation of vhost (user, kernel, vdpa). In practice, we
have virtio notifications and rcu lock/unlock on a per-packet basis
and not very efficient accesses to the guest memory. Communication
channels between backend and frontend devices do not allow passing
more than one packet at a time as well.
Some of these challenges can be avoided in the future by adding better
batching into device emulation or by implementing vhost-af-xdp variant.
There are also a few kernel limitations. AF_XDP sockets do not
support any kinds of checksum or segmentation offloading. Buffers
are limited to a page size (4K), i.e. MTU is limited. Multi-buffer
support implementation for AF_XDP is in progress, but not ready yet.
Also, transmission in all non-zero-copy modes is synchronous, i.e.
done in a syscall. That doesn't allow high packet rates on virtual
interfaces.
However, keeping in mind all of these challenges, current implementation
of the AF_XDP backend shows a decent performance while running on top
of a physical NIC with zero-copy support.
Test setup:
2 VMs running on 2 physical hosts connected via ConnectX6-Dx card.
Network backend is configured to open the NIC directly in native mode.
The driver supports zero-copy. NIC is configured to use 1 queue.
Inside a VM - iperf3 for basic TCP performance testing and dpdk-testpmd
for PPS testing.
iperf3 result:
TCP stream : 19.1 Gbps
dpdk-testpmd (single queue, single CPU core, 64 B packets) results:
Tx only : 3.4 Mpps
Rx only : 2.0 Mpps
L2 FWD Loopback : 1.5 Mpps
In skb mode the same setup shows much lower performance, similar to
the setup where pair of physical NICs is replaced with veth pair:
iperf3 result:
TCP stream : 9 Gbps
dpdk-testpmd (single queue, single CPU core, 64 B packets) results:
Tx only : 1.2 Mpps
Rx only : 1.0 Mpps
L2 FWD Loopback : 0.7 Mpps
Results in skb mode or over the veth are close to results of a tap
backend with vhost=on and disabled segmentation offloading bridged
with a NIC.
Signed-off-by: Ilya Maximets <i.maximets@ovn.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> (docker/lcitool)
Signed-off-by: Jason Wang <jasowang@redhat.com>
Commit: 2a6cb383e2ec7224d8631c3c0a324bff469c9c64
https://github.com/qemu/qemu/commit/2a6cb383e2ec7224d8631c3c0a324bff469c9c64
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M hw/net/fsl_etsec/rings.c
Log Message:
-----------
hw/net/fsl_etsec/rings.c: Avoid variable length array
In fill_rx_bd() we create a variable length array of size
etsec->rx_padding. In fact we know that this will never be
larger than 64 bytes, because rx_padding is set in rx_init_frame()
in a way that ensures it is only that large. Use a fixed sized
array and assert that it is big enough.
Since padd[] is now potentially rather larger than the actual
padding required, adjust the memset() we do on it to match the
size that we write with cpu_physical_memory_write(), rather than
clearing the entire array.
The codebase has very few VLAs, and if we can get rid of them all we
can make the compiler error on new additions. This is a defensive
measure against security bugs where an on-stack dynamic allocation
isn't correctly size-checked (e.g. CVE-2021-3527).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Commit: 1257065783df26a83934195a5cd70f951ef9c51d
https://github.com/qemu/qemu/commit/1257065783df26a83934195a5cd70f951ef9c51d
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M hw/net/rocker/rocker_of_dpa.c
Log Message:
-----------
hw/net/rocker: Avoid variable length array
Replace an on-stack variable length array in of_dpa_ig() with
a g_autofree heap allocation.
The codebase has very few VLAs, and if we can get rid of them all we
can make the compiler error on new additions. This is a defensive
measure against security bugs where an on-stack dynamic allocation
isn't correctly size-checked (e.g. CVE-2021-3527).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Commit: c4cf68198ea6081de64265a1e1c2620576a209a0
https://github.com/qemu/qemu/commit/c4cf68198ea6081de64265a1e1c2620576a209a0
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M net/dump.c
Log Message:
-----------
net/dump: Avoid variable length array
Use a g_autofree heap allocation instead of a variable length
array in dump_receive_iov().
The codebase has very few VLAs, and if we can get rid of them all we
can make the compiler error on new additions. This is a defensive
measure against security bugs where an on-stack dynamic allocation
isn't correctly size-checked (e.g. CVE-2021-3527).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Commit: 6d7a53e9f16d2b18d94f9fce1e4eea34570286ef
https://github.com/qemu/qemu/commit/6d7a53e9f16d2b18d94f9fce1e4eea34570286ef
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M net/tap.c
Log Message:
-----------
net/tap: Avoid variable-length array
Use a heap allocation instead of a variable length array in
tap_receive_iov().
The codebase has very few VLAs, and if we can get rid of them all we
can make the compiler error on new additions. This is a defensive
measure against security bugs where an on-stack dynamic allocation
isn't correctly size-checked (e.g. CVE-2021-3527).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Commit: 0cbc34dc8ea3704175afd4f5415f7a7fc2ae56ca
https://github.com/qemu/qemu/commit/0cbc34dc8ea3704175afd4f5415f7a7fc2ae56ca
Author: Daniel Henrique Barboza <danielhb413@gmail.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Nick Piggin PPC maintainer, other PPC changes
Update all relevant PowerPC entries as follows:
- Nick Piggin is promoted to Maintainer in all qemu-ppc subsystems.
Nick has been a solid contributor for the last couple of years and
has the required knowledge and motivation to drive the boat.
- Greg Kurz is being removed from all qemu-ppc entries. Greg has moved
to other areas of interest and will retire from qemu-ppc. Thanks Mr
Kurz for all the years of service.
- David Gibson was removed as 'Reviewer' from PowerPC TCG CPUs and PPC
KVM CPUs. Change done per his request.
- Daniel Barboza downgraded from 'Maintainer' to 'Reviewer' in sPAPR and
PPC KVM CPUs. It has been a long since I last touched those areas and
it's not justified to be kept as maintainer in them.
- Cedric Le Goater and Daniel Barboza removed as 'Reviewer' in VOF. We
don't have the required knowledge to justify it.
- VOF support downgraded from 'Maintained' to 'Odd Fixes' since it
better reflects the current state of the subsystem.
Acked-by: Cédric Le Goater <clg@kaod.org>
Acked-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Nicholas Piggin <npiggin@gmail.com>
Message-ID: <20230915110507.194762-1-danielhb413@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Commit: 527b23832930bd17338093725cb9b95203b60742
https://github.com/qemu/qemu/commit/527b23832930bd17338093725cb9b95203b60742
Author: Cédric Le Goater <clg@kaod.org>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M hw/intc/pnv_xive.c
Log Message:
-----------
ppc/xive: Fix uint32_t overflow
As reported by Coverity, "idx << xive->pc_shift" is evaluated using
32-bit arithmetic, and then used in a context expecting a "uint64_t".
Add a uint64_t cast.
Fixes: Coverity CID 1519049
Fixes: b68147b7a5bf ("ppc/xive: Add support for the PC MMIOs")
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-ID: <20230914154650.222111-1-clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Commit: 44fa20c92811a9b88b41b4882a7e948c2fe6bd08
https://github.com/qemu/qemu/commit/44fa20c92811a9b88b41b4882a7e948c2fe6bd08
Author: Cédric Le Goater <clg@redhat.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M hw/ppc/meson.build
M hw/ppc/spapr.c
M hw/ppc/spapr_numa.c
M hw/ppc/spapr_pci.c
R hw/ppc/spapr_pci_nvlink2.c
M hw/vfio/pci-quirks.c
M hw/vfio/pci.c
M hw/vfio/pci.h
M hw/vfio/trace-events
M include/hw/pci-host/spapr.h
M include/hw/ppc/spapr.h
Log Message:
-----------
spapr: Remove support for NVIDIA V100 GPU with NVLink2
NVLink2 support was removed from the PPC PowerNV platform and VFIO in
Linux 5.13 with commits :
562d1e207d32 ("powerpc/powernv: remove the nvlink support")
b392a1989170 ("vfio/pci: remove vfio_pci_nvlink2")
This was 2.5 years ago. Do the same in QEMU with a revert of commit
ec132efaa81f ("spapr: Support NVIDIA V100 GPU with NVLink2"). Some
adjustements are required on the NUMA part.
Cc: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Acked-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Message-ID: <20230918091717.149950-1-clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Commit: 3808a058fc05fd81268e39387043a8986e182f43
https://github.com/qemu/qemu/commit/3808a058fc05fd81268e39387043a8986e182f43
Author: Gerd Hoffmann <kraxel@redhat.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M tests/qtest/bios-tables-test-allowed-diff.h
Log Message:
-----------
tests/acpi: allow virt/SSDT.memhp updates
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Commit: c28a2891f34f95a94da9d6ac9f60b1446881ea1a
https://github.com/qemu/qemu/commit/c28a2891f34f95a94da9d6ac9f60b1446881ea1a
Author: Gerd Hoffmann <kraxel@redhat.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M roms/edk2-build.py
Log Message:
-----------
edk2: update build script
Sync with latest version from gitlab.com/kraxel/edk2-build-config
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Commit: b0494f131ed4a34ab688477966b06f92cd441c02
https://github.com/qemu/qemu/commit/b0494f131ed4a34ab688477966b06f92cd441c02
Author: Gerd Hoffmann <kraxel@redhat.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M roms/edk2-build.config
Log Message:
-----------
edk2: update build config
risc-v switched to use split code/vars images like the other archs.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Commit: 3bb5051009a3d740c3978abd5dbafc9f7fff4e45
https://github.com/qemu/qemu/commit/3bb5051009a3d740c3978abd5dbafc9f7fff4e45
Author: Gerd Hoffmann <kraxel@redhat.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M roms/edk2-build.config
Log Message:
-----------
edk2: workaround edk-stable202308 bug
Set PCD to workaround two fixes missing the release.
https://github.com/tianocore/edk2/commit/8b66f9df1bb0fd5ebb743944d41cb33178cf2fdd
https://github.com/tianocore/edk2/commit/020cc9e2e7053bb62247b0babbbe80cb855592e5
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Commit: 241f99399f0f3e262ce8362c423a382ae2a4aa5e
https://github.com/qemu/qemu/commit/241f99399f0f3e262ce8362c423a382ae2a4aa5e
Author: Gerd Hoffmann <kraxel@redhat.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M roms/edk2
Log Message:
-----------
edk2: update submodule to edk2-stable202308
New stable release was tagged in August 2023,
update the edk2 submodule to it.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Commit: 91e0127087257048d2eb98b5b1a5671f53c3a36d
https://github.com/qemu/qemu/commit/91e0127087257048d2eb98b5b1a5671f53c3a36d
Author: Gerd Hoffmann <kraxel@redhat.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M pc-bios/edk2-aarch64-code.fd.bz2
M pc-bios/edk2-arm-code.fd.bz2
M pc-bios/edk2-i386-code.fd.bz2
M pc-bios/edk2-i386-secure-code.fd.bz2
A pc-bios/edk2-riscv-code.fd.bz2
A pc-bios/edk2-riscv-vars.fd.bz2
R pc-bios/edk2-riscv.fd.bz2
M pc-bios/edk2-x86_64-code.fd.bz2
M pc-bios/edk2-x86_64-microvm.fd.bz2
M pc-bios/edk2-x86_64-secure-code.fd.bz2
Log Message:
-----------
edk2: update binaries to edk2-stable202308
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Commit: 5f88dd43d09dbab22141f06fa518014970103801
https://github.com/qemu/qemu/commit/5f88dd43d09dbab22141f06fa518014970103801
Author: Gerd Hoffmann <kraxel@redhat.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M tests/data/acpi/virt/SSDT.memhp
Log Message:
-----------
tests/acpi: update virt/SSDT.memhp
The edk2 update caused an address change:
DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x00000001)
{
Scope (\_SB)
{
Device (NVDR)
{
Name (_HID, "ACPI0012" /* NVDIMM Root Device */) // _HID:
Hardware ID
[ ... ]
}
}
- Name (MEMA, 0x43D10000)
+ Name (MEMA, 0x43C90000)
}
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Commit: 0ec0767e59261b7a1f59e904020cf52b45380e54
https://github.com/qemu/qemu/commit/0ec0767e59261b7a1f59e904020cf52b45380e54
Author: Gerd Hoffmann <kraxel@redhat.com>
Date: 2023-09-18 (Mon, 18 Sep 2023)
Changed paths:
M tests/qtest/bios-tables-test-allowed-diff.h
Log Message:
-----------
tests/acpi: disallow virt/SSDT.memhp updates
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Commit: 3a1258399bdf4d4412cbfde36d0d94965eec87b6
https://github.com/qemu/qemu/commit/3a1258399bdf4d4412cbfde36d0d94965eec87b6
Author: David Hildenbrand <david@redhat.com>
Date: 2023-09-19 (Tue, 19 Sep 2023)
Changed paths:
M hw/acpi/nvdimm.c
M hw/mem/nvdimm.c
M hw/ppc/spapr_nvdimm.c
M include/hw/mem/nvdimm.h
Log Message:
-----------
nvdimm: Reject writing label data to ROM instead of crashing QEMU
Currently, when using a true R/O NVDIMM (ROM memory backend) with a label
area, the VM can easily crash QEMU by trying to write to the label area,
because the ROM memory is mmap'ed without PROT_WRITE.
[root@vm-0 ~]# ndctl disable-region region0
disabled 1 region
[root@vm-0 ~]# ndctl zero-labels nmem0
-> QEMU segfaults
Let's remember whether we have a ROM memory backend and properly
reject the write request:
[root@vm-0 ~]# ndctl disable-region region0
disabled 1 region
[root@vm-0 ~]# ndctl zero-labels nmem0
zeroed 0 nmem
In comparison, on a system with a R/W NVDIMM:
[root@vm-0 ~]# ndctl disable-region region0
disabled 1 region
[root@vm-0 ~]# ndctl zero-labels nmem0
zeroed 1 nmem
For ACPI, just return "unsupported", like if no label exists. For spapr,
return "H_P2", similar to when no label area exists.
Could we rely on the "unarmed" property? Maybe, but it looks cleaner to
only disallow what certainly cannot work.
After all "unarmed=on" primarily means: cannot accept persistent writes. In
theory, there might be setups where devices with "unarmed=on" set could
be used to host non-persistent data (temporary files, system RAM, ...); for
example, in Linux, admins can overwrite the "readonly" setting and still
write to the device -- which will work as long as we're not using ROM.
Allowing writing label data in such configurations can make sense.
Message-ID: <20230906120503.359863-2-david@redhat.com>
Fixes: dbd730e85987 ("nvdimm: check -object memory-backend-file, readonly=on
option")
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Commit: 5c52a219bbd38724650e27e14741190d3004e26b
https://github.com/qemu/qemu/commit/5c52a219bbd38724650e27e14741190d3004e26b
Author: David Hildenbrand <david@redhat.com>
Date: 2023-09-19 (Tue, 19 Sep 2023)
Changed paths:
M backends/hostmem-file.c
M include/exec/memory.h
M include/exec/ram_addr.h
M softmmu/memory.c
M softmmu/physmem.c
Log Message:
-----------
softmmu/physmem: Distinguish between file access mode and mmap protection
There is a difference between how we open a file and how we mmap it,
and we want to support writable private mappings of readonly files. Let's
define RAM_READONLY and RAM_READONLY_FD flags, to replace the single
"readonly" parameter for file-related functions.
In memory_region_init_ram_from_fd() and memory_region_init_ram_from_file(),
initialize mr->readonly based on the new RAM_READONLY flag.
While at it, add some RAM_* flags we missed to add to the list of accepted
flags in the documentation of some functions.
No change in functionality intended. We'll make use of both flags next
and start setting them independently for memory-backend-file.
Message-ID: <20230906120503.359863-3-david@redhat.com>
Acked-by: Peter Xu <peterx@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Commit: e92666b0ba4cbaa71a5dd98c31414926a9915487
https://github.com/qemu/qemu/commit/e92666b0ba4cbaa71a5dd98c31414926a9915487
Author: David Hildenbrand <david@redhat.com>
Date: 2023-09-19 (Tue, 19 Sep 2023)
Changed paths:
M backends/hostmem-file.c
M qapi/qom.json
M qemu-options.hx
Log Message:
-----------
backends/hostmem-file: Add "rom" property to support VM templating with R/O
files
For now, "share=off,readonly=on" would always result in us opening the
file R/O and mmap'ing the opened file MAP_PRIVATE R/O -- effectively
turning it into ROM.
Especially for VM templating, "share=off" is a common use case. However,
that use case is impossible with files that lack write permissions,
because "share=off,readonly=on" will not give us writable RAM.
The sole user of ROM via memory-backend-file are R/O NVDIMMs, but as we
have users (Kata Containers) that rely on the existing behavior --
malicious VMs should not be able to consume COW memory for R/O NVDIMMs --
we cannot change the semantics of "share=off,readonly=on"
So let's add a new "rom" property with on/off/auto values. "auto" is
the default and what most people will use: for historical reasons, to not
change the old semantics, it defaults to the value of the "readonly"
property.
For VM templating, one can now use:
-object memory-backend-file,share=off,readonly=on,rom=off,...
But we'll disallow:
-object memory-backend-file,share=on,readonly=on,rom=off,...
because we would otherwise get an error when trying to mmap the R/O file
shared and writable. An explicit error message is cleaner.
We will also disallow for now:
-object memory-backend-file,share=off,readonly=off,rom=on,...
-object memory-backend-file,share=on,readonly=off,rom=on,...
It's not harmful, but also not really required for now.
Alternatives that were abandoned:
* Make "unarmed=on" for the NVDIMM set the memory region container
readonly. We would still see a change of ROM->RAM and possibly run
into memslot limits with vhost-user. Further, there might be use cases
for "unarmed=on" that should still allow writing to that memory
(temporary files, system RAM, ...).
* Add a new "readonly=on/off/auto" parameter for NVDIMMs. Similar issues
as with "unarmed=on".
* Make "readonly" consume "on/off/file" instead of being a 'bool' type.
This would slightly changes the behavior of the "readonly" parameter:
values like true/false (as accepted by a 'bool'type) would no longer be
accepted.
Message-ID: <20230906120503.359863-4-david@redhat.com>
Acked-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Commit: 9e6b9f379130c77a08c8ea67a09fc90cb30f8d09
https://github.com/qemu/qemu/commit/9e6b9f379130c77a08c8ea67a09fc90cb30f8d09
Author: David Hildenbrand <david@redhat.com>
Date: 2023-09-19 (Tue, 19 Sep 2023)
Changed paths:
M softmmu/physmem.c
Log Message:
-----------
softmmu/physmem: Remap with proper protection in qemu_ram_remap()
Let's remap with the proper protection that we can derive from
RAM_READONLY.
Message-ID: <20230906120503.359863-5-david@redhat.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
Commit: b2cccb52bd9bef2948a150d204b20119b6c3ad58
https://github.com/qemu/qemu/commit/b2cccb52bd9bef2948a150d204b20119b6c3ad58
Author: David Hildenbrand <david@redhat.com>
Date: 2023-09-19 (Tue, 19 Sep 2023)
Changed paths:
M softmmu/physmem.c
Log Message:
-----------
softmmu/physmem: Bail out early in ram_block_discard_range() with readonly
files
fallocate() will fail, let's print a nicer error message.
Message-ID: <20230906120503.359863-6-david@redhat.com>
Suggested-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Commit: 4d6b23f7e2b7a34a6ab3b7c40693d8b1a0dee0b5
https://github.com/qemu/qemu/commit/4d6b23f7e2b7a34a6ab3b7c40693d8b1a0dee0b5
Author: David Hildenbrand <david@redhat.com>
Date: 2023-09-19 (Tue, 19 Sep 2023)
Changed paths:
M softmmu/physmem.c
Log Message:
-----------
softmmu/physmem: Fail creation of new files in file_ram_open() with
readonly=true
Currently, if a file does not exist yet, file_ram_open() will create new
empty file and open it writable. However, it even does that when
readonly=true was specified.
Specifying O_RDONLY instead to create a new readonly file would
theoretically work, however, ftruncate() will refuse to resize the new
empty file and we'll get a warning:
ftruncate: Invalid argument
And later eventually more problems when actually mmap'ing that file and
accessing it.
If someone intends to let QEMU open+mmap a file read-only, better
create+resize+fill that file ahead of time outside of QEMU context.
We'll now fail with:
./qemu-system-x86_64 \
-object memory-backend-file,id=ram0,mem-path=tmp,readonly=true,size=1g
qemu-system-x86_64: can't open backing store tmp for guest RAM: No such file or
directory
All use cases of readonly files (R/O NVDIMMs, VM templating) work on
existing files, so silently creating new files might just hide user
errors when accidentally specifying a non-existent file.
Note that the only memory-backend-file will end up calling
memory_region_init_ram_from_file() -> qemu_ram_alloc_from_file() ->
file_ram_open().
Move error reporting to the single caller.
Message-ID: <20230906120503.359863-7-david@redhat.com>
Acked-by: Peter Xu <peterx@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Commit: ca01f1b89b0884e39a58d8bc1d3fbd7ca91272a1
https://github.com/qemu/qemu/commit/ca01f1b89b0884e39a58d8bc1d3fbd7ca91272a1
Author: David Hildenbrand <david@redhat.com>
Date: 2023-09-19 (Tue, 19 Sep 2023)
Changed paths:
M softmmu/physmem.c
Log Message:
-----------
softmmu/physmem: Never return directories from file_ram_open()
open() does not fail on directories when opening them readonly (O_RDONLY).
Currently, we succeed opening such directories and fail later during
mmap(), resulting in a misleading error message.
$ ./qemu-system-x86_64 \
-object memory-backend-file,id=ram0,mem-path=tmp,readonly=true,size=1g
qemu-system-x86_64: unable to map backing store for guest RAM: No such device
To identify directories and handle them accordingly in file_ram_open()
also when readonly=true was specified, detect if we just opened a directory
using fstat() instead. Then, fail file_ram_open() right away, similarly
to how we now fail if the file does not exist and we want to open the
file readonly.
With this change, we get a nicer error message:
qemu-system-x86_64: can't open backing store tmp for guest RAM: Is a directory
Note that the only memory-backend-file will end up calling
memory_region_init_ram_from_file() -> qemu_ram_alloc_from_file() ->
file_ram_open().
Message-ID: <20230906120503.359863-8-david@redhat.com>
Reported-by: Thiner Logoer <logoerthiner1@163.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Tested-by: Mario Casquero <mcasquer@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Commit: 9e6180d22c482e09e9fac97cf45a09b58109287e
https://github.com/qemu/qemu/commit/9e6180d22c482e09e9fac97cf45a09b58109287e
Author: David Hildenbrand <david@redhat.com>
Date: 2023-09-19 (Tue, 19 Sep 2023)
Changed paths:
M docs/devel/multi-process.rst
Log Message:
-----------
docs: Don't mention "-mem-path" in multi-process.rst
"-mem-path" corresponds to "memory-backend-file,share=off" and,
therefore, creates a private COW mapping of the file. For multi-proces
QEMU, we need proper shared file-backed memory.
Let's make that clearer.
Message-ID: <20230906120503.359863-9-david@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Commit: 9cd9313fc3cb94243512bf36d0d67d4dbd60d6f1
https://github.com/qemu/qemu/commit/9cd9313fc3cb94243512bf36d0d67d4dbd60d6f1
Author: David Hildenbrand <david@redhat.com>
Date: 2023-09-19 (Tue, 19 Sep 2023)
Changed paths:
M MAINTAINERS
M docs/system/index.rst
A docs/system/vm-templating.rst
Log Message:
-----------
docs: Start documenting VM templating
Let's add some details about VM templating, focusing on the VM memory
configuration only.
There is much more to VM templating (VM state? block devices?), but I leave
that as future work.
Message-ID: <20230906120503.359863-10-david@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
Commit: 6da4b1c25d89cc8e8d1be40b96602d08a3e88e0c
https://github.com/qemu/qemu/commit/6da4b1c25d89cc8e8d1be40b96602d08a3e88e0c
Author: David Hildenbrand <david@redhat.com>
Date: 2023-09-19 (Tue, 19 Sep 2023)
Changed paths:
M softmmu/physmem.c
Log Message:
-----------
softmmu/physmem: Hint that "readonly=on,rom=off" exists when opening file R/W
for private mapping fails
It's easy to miss that memory-backend-file with "share=off" (default)
will always try opening the file R/W as default, and fail if we don't
have write permissions to the file.
In that case, the user has to explicit specify "readonly=on,rom=off" to
get usable RAM, for example, for VM templating.
Let's hint that '-object memory-backend-file,readonly=on,rom=off,...'
exists to consume R/O files in a private mapping to create writable RAM,
but only if we have permissions to open the file read-only.
Message-ID: <20230906120503.359863-11-david@redhat.com>
Suggested-by: ThinerLogoer <logoerthiner1@163.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Commit: 41ddcd2308f76cc95459c2961f4a50b66a70d3c4
https://github.com/qemu/qemu/commit/41ddcd2308f76cc95459c2961f4a50b66a70d3c4
Author: David Hildenbrand <david@redhat.com>
Date: 2023-09-19 (Tue, 19 Sep 2023)
Changed paths:
M hw/core/machine.c
Log Message:
-----------
machine: Improve error message when using default RAM backend id
For migration purposes, users might want to reuse the default RAM
backend id, but specify a different memory backend.
For example, to reuse "pc.ram" on q35, one has to set
-machine q35,memory-backend=pc.ram
Only then, can a memory backend with the id "pc.ram" be created
manually.
Let's improve the error message by improving the hint. Use
error_append_hint() -- which in turn requires ERRP_GUARD().
Message-ID: <20230906120503.359863-12-david@redhat.com>
Suggested-by: ThinerLogoer <logoerthiner1@163.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Mario Casquero <mcasquer@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Commit: 544cff46c018036cd66e98ffb224dd9f098065c8
https://github.com/qemu/qemu/commit/544cff46c018036cd66e98ffb224dd9f098065c8
Author: hongmianquan <hongmianquan@bytedance.com>
Date: 2023-09-19 (Tue, 19 Sep 2023)
Changed paths:
M include/exec/memory.h
M softmmu/memory.c
Log Message:
-----------
memory: avoid updating ioeventfds for some address_space
When updating ioeventfds, we need to iterate all address spaces,
but some address spaces do not register eventfd_add|del call when
memory_listener_register() and they do nothing when updating ioeventfds.
So we can skip these AS in address_space_update_ioeventfds().
The overhead of memory_region_transaction_commit() can be significantly
reduced. For example, a VM with 8 vhost net devices and each one has
64 vectors, can reduce the time spent on memory_region_transaction_commit by
20%.
Message-ID: <20230830032906.12488-1-hongmianquan@bytedance.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: hongmianquan <hongmianquan@bytedance.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Commit: ea907a1d8be2bb7cdd1c64855bc531e62772b5da
https://github.com/qemu/qemu/commit/ea907a1d8be2bb7cdd1c64855bc531e62772b5da
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-09-19 (Tue, 19 Sep 2023)
Changed paths:
M accel/tcg/cputlb.c
M accel/tcg/tcg-accel-ops-mttcg.c
M accel/tcg/tcg-runtime-gvec.c
M accel/tcg/tcg-runtime.h
M fpu/softfloat-parts.c.inc
M fpu/softfloat.c
M host/include/aarch64/host/cpuinfo.h
M include/exec/cpu-defs.h
M include/exec/user/thunk.h
M include/fpu/softfloat.h
M include/hw/core/cpu.h
M include/qemu/plugin-memory.h
M include/qemu/typedefs.h
M include/tcg/tcg-op-gvec-common.h
M plugins/api.c
M softmmu/async-teardown.c
M target/arm/tcg/translate.c
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
M tcg/i386/tcg-target.c.inc
M tcg/loongarch64/tcg-insn-defs.c.inc
M tcg/loongarch64/tcg-target-con-set.h
M tcg/loongarch64/tcg-target-con-str.h
M tcg/loongarch64/tcg-target.c.inc
M tcg/loongarch64/tcg-target.h
A tcg/loongarch64/tcg-target.opc.h
M tcg/mips/tcg-target.c.inc
M tcg/ppc/tcg-target.c.inc
M tcg/region.c
M tcg/riscv/tcg-target.c.inc
M tcg/s390x/tcg-target.c.inc
M tcg/sparc64/tcg-target.c.inc
M tcg/tcg-op-gvec.c
M tcg/tcg.c
M tcg/tci/tcg-target.c.inc
M tests/tcg/m68k/Makefile.target
A tests/tcg/m68k/denormal.c
M util/cpuinfo-aarch64.c
M util/oslib-posix.c
Log Message:
-----------
Merge tag 'pull-tcg-20230915-2' of https://gitlab.com/rth7680/qemu into
staging
*: Delete checks for old host definitions
tcg/loongarch64: Generate LSX instructions
fpu: Add conversions between bfloat16 and [u]int8
fpu: Handle m68k extended precision denormals properly
accel/tcg: Improve cputlb i/o organization
accel/tcg: Simplify tlb_plugin_lookup
accel/tcg: Remove false-negative halted assertion
tcg: Add gvec compare with immediate and scalar operand
tcg/aarch64: Emit BTI insns at jump landing pads
[Resolved CPUINFO_BTI merge conflict with CPUINFO_PMULL.
--Stefan]
* tag 'pull-tcg-20230915-2' of https://gitlab.com/rth7680/qemu: (39 commits)
tcg: Map code_gen_buffer with PROT_BTI
tcg/aarch64: Emit BTI insns at jump landing pads
util/cpuinfo-aarch64: Add CPUINFO_BTI
tcg: Add tcg_out_tb_start backend hook
fpu: Handle m68k extended precision denormals properly
fpu: Add conversions between bfloat16 and [u]int8
accel/tcg: Introduce do_st16_mmio_leN
accel/tcg: Introduce do_ld16_mmio_beN
accel/tcg: Merge io_writex into do_st_mmio_leN
accel/tcg: Merge io_readx into do_ld_mmio_beN
accel/tcg: Replace direct use of io_readx/io_writex in do_{ld,st}_1
accel/tcg: Merge cpu_transaction_failed into io_failed
plugin: Simplify struct qemu_plugin_hwaddr
accel/tcg: Use CPUTLBEntryFull.phys_addr in io_failed
accel/tcg: Split out io_prepare and io_failed
accel/tcg: Simplify tlb_plugin_lookup
target/arm: Use tcg_gen_gvec_cmpi for compare vs 0
tcg: Add gvec compare with immediate and scalar operand
tcg/loongarch64: Implement 128-bit load & store
tcg/loongarch64: Lower rotli_vec to vrotri
...
Commit: 72c315c64597f0c7c52818a73184efc3fbee13c2
https://github.com/qemu/qemu/commit/72c315c64597f0c7c52818a73184efc3fbee13c2
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-09-19 (Tue, 19 Sep 2023)
Changed paths:
M hw/hppa/machine.c
M linux-user/hppa/signal.c
M pc-bios/hppa-firmware.img
M roms/seabios-hppa
M target/hppa/cpu.h
M target/hppa/helper.h
M target/hppa/insns.decode
M target/hppa/int_helper.c
M target/hppa/mem_helper.c
M target/hppa/op_helper.c
M target/hppa/translate.c
Log Message:
-----------
Merge tag 'hppa-btlb-pull-request' of https://github.com/hdeller/qemu-hppa
into staging
Block-TLB support and linux-user fixes for hppa target
All 32-bit hppa CPUs allow a fixed number of TLB entries to have a
different page size than the default 4k.
Those are called "Block-TLBs" and are created at startup by the
operating system and managed by the firmware of hppa machines
through the firmware PDC_BLOCK_TLB call.
This patchset adds the necessary glue to SeaBIOS-hppa and
qemu to allow up to 16 BTLB entries in the emulation.
Two patches from Mikulas Patocka fix signal delivery issues
in linux-user on hppa.
# -----BEGIN PGP SIGNATURE-----
#
# iHUEABYKAB0WIQS86RI+GtKfB8BJu973ErUQojoPXwUCZQYCswAKCRD3ErUQojoP
# X2UBAQDD74iCcnezhaQjU5qC2t1MywcFo4IxHlMRiq++bVsxHAD+PP9WgH9acJIf
# bbuQB7IVZ90tJjNEkUaspJMNTib8lAc=
# =X2NQ
# -----END PGP SIGNATURE-----
# gpg: Signature made Sat 16 Sep 2023 15:32:03 EDT
# gpg: using EDDSA key BCE9123E1AD29F07C049BBDEF712B510A23A0F5F
# gpg: Good signature from "Helge Deller <deller@gmx.de>" [unknown]
# gpg: aka "Helge Deller <deller@kernel.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 4544 8228 2CD9 10DB EF3D 25F8 3E5F 3D04 A7A2 4603
# Subkey fingerprint: BCE9 123E 1AD2 9F07 C049 BBDE F712 B510 A23A 0F5F
* tag 'hppa-btlb-pull-request' of https://github.com/hdeller/qemu-hppa:
linux-user/hppa: lock both words of function descriptor
linux-user/hppa: clear the PSW 'N' bit when delivering signals
target/hppa: Wire up diag instruction to support BTLB
target/hppa: Extract diagnose immediate value
target/hppa: Add BTLB support to hppa TLB functions
target/hppa: Report and clear BTLBs via fw_cfg at startup
target/hppa: Allow up to 16 BTLB entries
target/hppa: Update to SeaBIOS-hppa version 9
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Commit: 74fc2cbae27bd429ca33d59fda2ee139fba881da
https://github.com/qemu/qemu/commit/74fc2cbae27bd429ca33d59fda2ee139fba881da
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-09-19 (Tue, 19 Sep 2023)
Changed paths:
M MAINTAINERS
M hmp-commands.hx
M hw/core/machine.c
M hw/net/e1000e_core.c
M hw/net/fsl_etsec/rings.c
M hw/net/igb_core.c
M hw/net/igb_regs.h
M hw/net/rocker/rocker_of_dpa.c
M hw/net/trace-events
M hw/net/vhost_net.c
M hw/net/virtio-net.c
M hw/net/vmxnet3.c
M include/net/net.h
M meson.build
M meson_options.txt
A net/af-xdp.c
M net/clients.h
M net/dump.c
M net/meson.build
M net/net.c
M net/netmap.c
M net/tap-bsd.c
M net/tap-linux.c
M net/tap-linux.h
M net/tap-solaris.c
M net/tap-stub.c
M net/tap-win32.c
M net/tap.c
M net/tap_int.h
M net/vhost-vdpa.c
M qapi/net.json
M qemu-options.hx
M scripts/ci/org.centos/stream/8/x86_64/configure
M scripts/meson-buildoptions.sh
M tests/docker/dockerfiles/alpine.docker
M tests/docker/dockerfiles/centos8.docker
M tests/docker/dockerfiles/debian-amd64-cross.docker
M tests/docker/dockerfiles/debian-amd64.docker
M tests/docker/dockerfiles/debian-arm64-cross.docker
M tests/docker/dockerfiles/debian-armel-cross.docker
M tests/docker/dockerfiles/debian-armhf-cross.docker
M tests/docker/dockerfiles/debian-ppc64el-cross.docker
M tests/docker/dockerfiles/debian-s390x-cross.docker
M tests/docker/dockerfiles/fedora.docker
M tests/docker/dockerfiles/opensuse-leap.docker
M tests/docker/dockerfiles/ubuntu2004.docker
M tests/docker/dockerfiles/ubuntu2204.docker
M tests/lcitool/libvirt-ci
M tests/lcitool/projects/qemu.yml
M tests/qtest/libqos/igb.c
Log Message:
-----------
Merge tag 'net-pull-request' of https://github.com/jasowang/qemu into staging
# -----BEGIN PGP SIGNATURE-----
# Version: GnuPG v1
#
# iQEcBAABAgAGBQJlB/SLAAoJEO8Ells5jWIR7EQH/1kAbxHcSGJXDOgQAXJ/rOZi
# UKn3ugJzD0Hxd4Xz8cvdVLM+9/JoEEOK1uB+NIG7Ask/gA5D7eUYzaLtp1OJ8VNO
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# w9ItJi8k+19mVH6RgQwciqRvTbVMdzkOxqvU//LY0TxnjsHfbyHr+KlNAa2WTY2N
# QgpAlMZhHqUG6/XXAs0o2VEtA66zmw932Xfy/CZUEcdGWfkG/9CEVfbuT4CKGY4=
# =tF7K
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 18 Sep 2023 02:56:11 EDT
# gpg: using RSA key EF04965B398D6211
# gpg: Good signature from "Jason Wang (Jason Wang on RedHat)
<jasowang@redhat.com>" [full]
# Primary key fingerprint: 215D 46F4 8246 689E C77F 3562 EF04 965B 398D 6211
* tag 'net-pull-request' of https://github.com/jasowang/qemu:
net/tap: Avoid variable-length array
net/dump: Avoid variable length array
hw/net/rocker: Avoid variable length array
hw/net/fsl_etsec/rings.c: Avoid variable length array
net: add initial support for AF_XDP network backend
tests: bump libvirt-ci for libasan and libxdp
e1000e: rename e1000e_ba_state and e1000e_write_hdr_to_rx_buffers
igb: packet-split descriptors support
igb: add IPv6 extended headers traffic detection
igb: RX payload guest writting refactoring
igb: RX descriptors guest writting refactoring
igb: rename E1000E_RingInfo_st
igb: remove TCP ACK detection
virtio-net: Add support for USO features
virtio-net: Add USO flags to vhost support.
tap: Add check for USO features
tap: Add USO support to tap device.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Commit: fa5eb884ceb7161b1681ee238be19689538bfd77
https://github.com/qemu/qemu/commit/fa5eb884ceb7161b1681ee238be19689538bfd77
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-09-19 (Tue, 19 Sep 2023)
Changed paths:
M MAINTAINERS
M hw/intc/pnv_xive.c
M hw/ppc/meson.build
M hw/ppc/spapr.c
M hw/ppc/spapr_numa.c
M hw/ppc/spapr_pci.c
R hw/ppc/spapr_pci_nvlink2.c
M hw/vfio/pci-quirks.c
M hw/vfio/pci.c
M hw/vfio/pci.h
M hw/vfio/trace-events
M include/hw/pci-host/spapr.h
M include/hw/ppc/spapr.h
Log Message:
-----------
Merge tag 'pull-ppc-20230918' of https://gitlab.com/danielhb/qemu into staging
ppc patch queue for 2023-09-18:
In this short queue we're making two important changes:
- Nicholas Piggin is now the qemu-ppc maintainer. Cédric Le Goater and
Daniel Barboza will act as backup during Nick's transition to this new
role.
- Support for NVIDIA V100 GPU with NVLink2 is dropped from qemu-ppc.
Linux removed the same support back in 5.13, we're following suit now.
A xive Coverity fix is also included.
# -----BEGIN PGP SIGNATURE-----
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# =y3nh
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 18 Sep 2023 09:24:44 EDT
# gpg: using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164
# gpg: issuer "danielhb413@gmail.com"
# gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>"
[unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 17EB FF99 23D0 1800 AF28 3819 3CD9 CA96 DE03 3164
* tag 'pull-ppc-20230918' of https://gitlab.com/danielhb/qemu:
spapr: Remove support for NVIDIA V100 GPU with NVLink2
ppc/xive: Fix uint32_t overflow
MAINTAINERS: Nick Piggin PPC maintainer, other PPC changes
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Commit: 526940f3dc7c5ae45f054f3e4108685e7303cfe3
https://github.com/qemu/qemu/commit/526940f3dc7c5ae45f054f3e4108685e7303cfe3
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-09-19 (Tue, 19 Sep 2023)
Changed paths:
M pc-bios/edk2-aarch64-code.fd.bz2
M pc-bios/edk2-arm-code.fd.bz2
M pc-bios/edk2-i386-code.fd.bz2
M pc-bios/edk2-i386-secure-code.fd.bz2
A pc-bios/edk2-riscv-code.fd.bz2
A pc-bios/edk2-riscv-vars.fd.bz2
R pc-bios/edk2-riscv.fd.bz2
M pc-bios/edk2-x86_64-code.fd.bz2
M pc-bios/edk2-x86_64-microvm.fd.bz2
M pc-bios/edk2-x86_64-secure-code.fd.bz2
M roms/edk2
M roms/edk2-build.config
M roms/edk2-build.py
M tests/data/acpi/virt/SSDT.memhp
Log Message:
-----------
Merge tag 'firmware/edk2-20230918-pull-request' of
https://gitlab.com/kraxel/qemu into staging
edk2: update to edk2-stable202308
v2: include acpi test data updates
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# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 18 Sep 2023 09:32:53 EDT
# gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* tag 'firmware/edk2-20230918-pull-request' of https://gitlab.com/kraxel/qemu:
tests/acpi: disallow virt/SSDT.memhp updates
tests/acpi: update virt/SSDT.memhp
edk2: update binaries to edk2-stable202308
edk2: update submodule to edk2-stable202308
edk2: workaround edk-stable202308 bug
edk2: update build config
edk2: update build script
tests/acpi: allow virt/SSDT.memhp updates
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Commit: 25ab9a9e2715732487c41f04990e386be350e972
https://github.com/qemu/qemu/commit/25ab9a9e2715732487c41f04990e386be350e972
Author: Stefan Hajnoczi <stefanha@redhat.com>
Date: 2023-09-19 (Tue, 19 Sep 2023)
Changed paths:
M MAINTAINERS
M backends/hostmem-file.c
M docs/devel/multi-process.rst
M docs/system/index.rst
A docs/system/vm-templating.rst
M hw/acpi/nvdimm.c
M hw/core/machine.c
M hw/mem/nvdimm.c
M hw/ppc/spapr_nvdimm.c
M include/exec/memory.h
M include/exec/ram_addr.h
M include/hw/mem/nvdimm.h
M qapi/qom.json
M qemu-options.hx
M softmmu/memory.c
M softmmu/physmem.c
Log Message:
-----------
Merge tag 'mem-2023-09-19' of https://github.com/davidhildenbrand/qemu into
staging
Hi,
"Host Memory Backends" and "Memory devices" queue ("mem"):
- Support and document VM templating with R/O files using a new "rom"
parameter for memory-backend-file
- Some cleanups and fixes around NVDIMMs and R/O file handling for guest
RAM
- Optimize ioeventfd updates by skipping address spaces that are not
applicable
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# N2VpsxAJ7H/LLSFeZoCRESo4azrH6U4n7S/eS1tkCniFqibfe2yIQCDoJVfb42ec
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# =iraT
# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 19 Sep 2023 06:25:45 EDT
# gpg: using RSA key 1BD9CAAD735C4C3A460DFCCA4DDE10F700FF835A
# gpg: issuer "david@redhat.com"
# gpg: Good signature from "David Hildenbrand <david@redhat.com>" [unknown]
# gpg: aka "David Hildenbrand <davidhildenbrand@gmail.com>"
[full]
# gpg: aka "David Hildenbrand <hildenbr@in.tum.de>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 1BD9 CAAD 735C 4C3A 460D FCCA 4DDE 10F7 00FF 835A
* tag 'mem-2023-09-19' of https://github.com/davidhildenbrand/qemu:
memory: avoid updating ioeventfds for some address_space
machine: Improve error message when using default RAM backend id
softmmu/physmem: Hint that "readonly=on,rom=off" exists when opening file R/W
for private mapping fails
docs: Start documenting VM templating
docs: Don't mention "-mem-path" in multi-process.rst
softmmu/physmem: Never return directories from file_ram_open()
softmmu/physmem: Fail creation of new files in file_ram_open() with
readonly=true
softmmu/physmem: Bail out early in ram_block_discard_range() with readonly
files
softmmu/physmem: Remap with proper protection in qemu_ram_remap()
backends/hostmem-file: Add "rom" property to support VM templating with R/O
files
softmmu/physmem: Distinguish between file access mode and mmap protection
nvdimm: Reject writing label data to ROM instead of crashing QEMU
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Compare: https://github.com/qemu/qemu/compare/13d6b1608160...25ab9a9e2715
- [Qemu-commits] [qemu/qemu] 5e6f3d: target/hppa: Update to SeaBIOS-hppa version 9,
Alex Bennée <=