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[Qemu-commits] [qemu/qemu] 3b8307: hw/sd/sdhci: Do not force sdhci_mmio_
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From: |
Peter Maydell |
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Subject: |
[Qemu-commits] [qemu/qemu] 3b8307: hw/sd/sdhci: Do not force sdhci_mmio_*_ops onto al... |
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Date: |
Tue, 25 Jul 2023 12:08:19 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 3b830790151ff231531ef2595793e387dd154efb
https://github.com/qemu/qemu/commit/3b830790151ff231531ef2595793e387dd154efb
Author: Bernhard Beschow <shentey@gmail.com>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M hw/sd/sdhci.c
Log Message:
-----------
hw/sd/sdhci: Do not force sdhci_mmio_*_ops onto all SD controllers
Since commit c0a55a0c9da2 "hw/sd/sdhci: Support big endian SD host controller
interfaces" sdhci_common_realize() forces all SD card controllers to use either
sdhci_mmio_le_ops or sdhci_mmio_be_ops, depending on the "endianness" property.
However, there are device models which use different MMIO ops: TYPE_IMX_USDHC
uses usdhc_mmio_ops and TYPE_S3C_SDHCI uses sdhci_s3c_mmio_ops.
Forcing sdhci_mmio_le_ops breaks SD card handling on the "sabrelite" board, for
example. Fix this by defaulting the io_ops to little endian and switch to big
endian in sdhci_common_realize() only if there is a matchig big endian variant
available.
Fixes: c0a55a0c9da2 ("hw/sd/sdhci: Support big endian SD host controller
interfaces")
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Message-Id: <20230709080950.92489-1-shentey@gmail.com>
Commit: 5fc1a686607a40cbf0aa0b861dd8e9a642813a83
https://github.com/qemu/qemu/commit/5fc1a686607a40cbf0aa0b861dd8e9a642813a83
Author: Thomas Huth <thuth@redhat.com>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M hw/mips/loongson3_virt.c
Log Message:
-----------
hw/mips: Improve the default USB settings in the loongson3-virt machine
It's possible to compile QEMU without the USB devices (e.g. when using
"--without-default-devices" as option for the "configure" script).
To be still able to run the loongson3-virt machine in default mode with
such a QEMU binary, we have to check here for the availability of the
OHCI controller first before instantiating the USB devices.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230714104903.284845-1-thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 02388b5925ff2411853bb69e449f1e5da76e12d4
https://github.com/qemu/qemu/commit/02388b5925ff2411853bb69e449f1e5da76e12d4
Author: Thomas Huth <huth@tuxfamily.org>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M hw/char/escc.c
Log Message:
-----------
hw/char/escc: Implement loopback mode
The firmware of the m68k next-cube machine uses the loopback mode
for self-testing the hardware and currently fails during this step.
By implementing the loopback mode, we can make the firmware pass
to the next step.
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230716153519.31722-1-huth@tuxfamily.org>
Commit: d4eda549d27b6d0abdaa55a76dd2d0eff7d65bf0
https://github.com/qemu/qemu/commit/d4eda549d27b6d0abdaa55a76dd2d0eff7d65bf0
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M target/mips/tcg/mxu_translate.c
Log Message:
-----------
target/mips/mxu: Replace magic array size by its definition
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230712060806.82323-2-philmd@linaro.org>
Commit: e37fdc73811dd40ccf1409e1edb9f7403283dd87
https://github.com/qemu/qemu/commit/e37fdc73811dd40ccf1409e1edb9f7403283dd87
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M target/mips/tcg/mxu_translate.c
Log Message:
-----------
target/mips/mxu: Avoid overrun in gen_mxu_S32SLT()
Coverity reports a potential overrun (CID 1517769):
Overrunning array "mxu_gpr" of 15 8-byte elements at
element index 4294967295 (byte offset 34359738367)
using index "XRb - 1U" (which evaluates to 4294967295).
Use gen_load_mxu_gpr() to safely load MXU registers.
Fixes: ff7936f009 ("target/mips/mxu: Add S32SLT ... insns")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230712060806.82323-3-philmd@linaro.org>
Commit: fb51df0c8ea4afe17ec9af98d10650a05b36113e
https://github.com/qemu/qemu/commit/fb51df0c8ea4afe17ec9af98d10650a05b36113e
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M target/mips/tcg/mxu_translate.c
Log Message:
-----------
target/mips/mxu: Avoid overrun in gen_mxu_q8adde()
Coverity reports a potential overruns (CID 1517770):
Overrunning array "mxu_gpr" of 15 8-byte elements at
element index 4294967295 (byte offset 34359738367)
using index "XRb - 1U" (which evaluates to 4294967295).
Add a gen_extract_mxu_gpr() helper similar to
gen_load_mxu_gpr() to safely extract MXU registers.
Fixes: eb79951ab6 ("target/mips/mxu: Add Q8ADDE ... insns")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230712060806.82323-4-philmd@linaro.org>
Commit: 60a38a3a57befec24a768cbda811d224f1ab89dd
https://github.com/qemu/qemu/commit/60a38a3a57befec24a768cbda811d224f1ab89dd
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M target/mips/tcg/sysemu/tlb_helper.c
Log Message:
-----------
target/mips: Pass directory/leaf shift values to walk_directory()
We already evaluated directory_shift and leaf_shift in
page_table_walk_refill(), no need to do that again: pass
as argument.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20230717213504.24777-2-philmd@linaro.org>
Commit: 0fe4cac5dda1028c22ec3a6997e1b9155a768004
https://github.com/qemu/qemu/commit/0fe4cac5dda1028c22ec3a6997e1b9155a768004
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M target/mips/tcg/sysemu/tlb_helper.c
Log Message:
-----------
target/mips: Avoid shift by negative number in page_table_walk_refill()
Coverity points out that in page_table_walk_refill() we can
shift by a negative number, which is undefined behaviour
(CID 1452918, 1452920, 1452922). We already catch the
negative directory_shift and leaf_shift as being a "bail
out early" case, but not until we've already used them to
calculated some offset values.
The shifts can be negative only if ptew > 1, so make the
bail-out-early check look directly at that, and only
calculate the shift amounts and the offsets based on them
after we have done that check. This allows
us to simplify the expressions used to calculate the
shift amounts, use an unsigned type, and avoids the
undefined behaviour.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
[PMD: Check for ptew > 1, use unsigned type]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20230717213504.24777-3-philmd@linaro.org>
Commit: ca4d5d862df43630381647552725eaf1099033b8
https://github.com/qemu/qemu/commit/ca4d5d862df43630381647552725eaf1099033b8
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M target/sparc/cpu.c
M target/sparc/cpu.h
M target/sparc/machine.c
M target/sparc/monitor.c
Log Message:
-----------
target/sparc: Handle FPRS correctly on big-endian hosts
In CPUSparcState we define the fprs field as uint64_t. However we
then refer to it in translate.c via a TCGv_i32 which we set up with
tcg_global_mem_new_ptr(). This means that on a big-endian host when
the guest does something to writo te the FPRS register this value
ends up in the wrong half of the uint64_t, and the QEMU C code that
refers to env->fprs sees the wrong value. The effect of this is that
guest code that enables the FPU crashes with spurious FPU Disabled
exceptions. In particular, this is why
tests/avocado/machine_sparc64_sun4u.py:Sun4uMachine.test_sparc64_sun4u
times out on an s390 host.
There are multiple ways we could fix this; since there are actually
only three bits in the FPRS register and the code in translate.c
would be a bit painful to convert to dealing with a TCGv_i64, change
the type of the CPU state struct field to match what translate.c is
expecting.
(None of the other fields referenced by the r32[] array in
sparc_tcg_init() have the wrong type.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20230717103544.637453-1-peter.maydell@linaro.org>
Commit: f8cfdd2038c1823301e6df753242e465b1dc8539
https://github.com/qemu/qemu/commit/f8cfdd2038c1823301e6df753242e465b1dc8539
Author: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M target/tricore/cpu.c
M target/tricore/cpu.h
M target/tricore/helper.c
M target/tricore/op_helper.c
Log Message:
-----------
target/tricore: Rename tricore_feature
this name is used by capstone and will lead to a build failure of QEMU,
when capstone is enabled. So we rename it to tricore_has_feature(), to
match has_feature() in translate.c.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1774
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20230721060605.76636-1-kbastian@mail.uni-paderborn.de>
Commit: d8b71d96b336054ac3cd0c9351b0cb75c47281ad
https://github.com/qemu/qemu/commit/d8b71d96b336054ac3cd0c9351b0cb75c47281ad
Author: Michael Tokarev <mjt@tls.msk.ru>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M migration/migration-stats.c
M migration/migration.h
M migration/multifd-zlib.c
M migration/multifd-zstd.c
M migration/multifd.c
M migration/savevm.c
M migration/trace-events
Log Message:
-----------
migration: spelling fixes
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Commit: cced0d653973f6ad0d9e8bdbd365e12d0f2316f9
https://github.com/qemu/qemu/commit/cced0d653973f6ad0d9e8bdbd365e12d0f2316f9
Author: Michael Tokarev <mjt@tls.msk.ru>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M hw/intc/s390_flic_kvm.c
M include/hw/s390x/s390-pci-bus.h
M include/hw/s390x/sclp.h
M target/s390x/cpu_features.c
M target/s390x/cpu_models.c
M target/s390x/tcg/fpu_helper.c
M target/s390x/tcg/insn-data.h.inc
M target/s390x/tcg/translate.c
M tests/tcg/s390x/mvc.c
Log Message:
-----------
s390x: spelling fixes
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Commit: 673d8215415dc0c13e96b8d757102d942916d1b2
https://github.com/qemu/qemu/commit/673d8215415dc0c13e96b8d757102d942916d1b2
Author: Michael Tokarev <mjt@tls.msk.ru>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M host/include/aarch64/host/cpuinfo.h
M hw/arm/aspeed.c
M hw/arm/mps2-tz.c
M hw/intc/arm_gic.c
M hw/intc/arm_gicv3_redist.c
M hw/intc/armv7m_nvic.c
M hw/misc/allwinner-r40-dramc.c
M hw/misc/exynos4210_rng.c
M include/hw/arm/fsl-imx7.h
M include/hw/intc/armv7m_nvic.h
M target/arm/cpu.c
M target/arm/cpu.h
M target/arm/cpu64.c
M target/arm/helper.c
M target/arm/tcg/m_helper.c
M target/arm/tcg/translate-a64.c
M target/arm/tcg/translate-mve.c
M target/arm/tcg/translate-sve.c
M target/arm/tcg/translate-vfp.c
M target/arm/tcg/vec_helper.c
M tests/tcg/aarch64/gdbstub/test-sve.py
M tests/tcg/aarch64/sme-outprod1.c
M tests/tcg/aarch64/system/boot.S
M tests/tcg/aarch64/system/semiheap.c
Log Message:
-----------
arm: spelling fixes
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 8b81968c1cf351430dad66a1b36420f431243842
https://github.com/qemu/qemu/commit/8b81968c1cf351430dad66a1b36420f431243842
Author: Michael Tokarev <mjt@tls.msk.ru>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M host/include/generic/host/cpuinfo.h
M hw/m68k/next-cube.c
M hw/m68k/next-kbd.c
M hw/m68k/virt.c
M hw/microblaze/petalogix_ml605_mmu.c
M hw/sparc/sun4m_iommu.c
M target/alpha/cpu.h
M target/alpha/translate.c
M target/cris/helper.c
M target/cris/op_helper.c
M target/cris/translate.c
M target/hppa/cpu.h
M target/hppa/int_helper.c
M target/hppa/translate.c
M target/loongarch/cpu-csr.h
M target/m68k/helper.c
M target/microblaze/cpu.h
M target/openrisc/cpu.h
M target/openrisc/translate.c
M target/rx/translate.c
M target/sparc/asi.h
M target/tricore/csfr.h.inc
M target/tricore/helper.c
M target/tricore/translate.c
M tests/tcg/Makefile.target
M tests/tcg/multiarch/sha512.c
M tests/tcg/multiarch/system/Makefile.softmmu-target
M tests/tcg/tricore/c/crt0-tc2x.S
M tests/tcg/x86_64/system/boot.S
Log Message:
-----------
other architectures: spelling fixes
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 28cbbdd28e2979dbf9768a70754550b8e377fcc4
https://github.com/qemu/qemu/commit/28cbbdd28e2979dbf9768a70754550b8e377fcc4
Author: Michael Tokarev <mjt@tls.msk.ru>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M hw/9pfs/9p-local.c
M hw/9pfs/9p-proxy.c
M hw/9pfs/9p-synth.c
M hw/9pfs/9p-util.h
M hw/9pfs/9p.c
M hw/9pfs/9p.h
Log Message:
-----------
hw/9pfs: spelling fixes
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Commit: 8c0e8ed327c8ff7b48a5f2b7f5295c0541fcdbf4
https://github.com/qemu/qemu/commit/8c0e8ed327c8ff7b48a5f2b7f5295c0541fcdbf4
Author: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M target/tricore/cpu.c
M target/tricore/cpu.h
M target/tricore/helper.c
M target/tricore/op_helper.c
Log Message:
-----------
target/tricore: Rename tricore_feature
this name is used by capstone and will lead to a build failure of QEMU,
when capstone is enabled. So we rename it to tricore_has_feature(), to
match has_feature() in translate.c.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1774
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: 67d045a0ef5b9c5f871c3a1d87325a8a42d2b9d5
https://github.com/qemu/qemu/commit/67d045a0ef5b9c5f871c3a1d87325a8a42d2b9d5
Author: Ani Sinha <anisinha@redhat.com>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M hw/pci/pci.c
Log Message:
-----------
hw/pci: add comment to explain checking for available function 0 in pci
hotplug
This change is cosmetic. A comment is added explaining why we need to check for
the availability of function 0 when we hotplug a device.
CC: mst@redhat.com
CC: mjt@tls.msk.ru
Signed-off-by: Ani Sinha <anisinha@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: ff62c210165cf61b15f18c8a9835a5a5ce6c5a53
https://github.com/qemu/qemu/commit/ff62c210165cf61b15f18c8a9835a5a5ce6c5a53
Author: Markus Armbruster <armbru@redhat.com>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M qapi/char.json
M qapi/misc.json
Log Message:
-----------
qapi: Correct "eg." to "e.g." in documentation
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: d59f0c92141842bab95f26d6a7847b2523a604d4
https://github.com/qemu/qemu/commit/d59f0c92141842bab95f26d6a7847b2523a604d4
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M hw/char/escc.c
M hw/mips/loongson3_virt.c
M hw/sd/sdhci.c
M target/mips/tcg/mxu_translate.c
M target/mips/tcg/sysemu/tlb_helper.c
M target/sparc/cpu.c
M target/sparc/cpu.h
M target/sparc/machine.c
M target/sparc/monitor.c
M target/tricore/cpu.c
M target/tricore/cpu.h
M target/tricore/helper.c
M target/tricore/op_helper.c
Log Message:
-----------
Merge tag 'misc-fixes-20230725' of https://github.com/philmd/qemu into staging
Misc patches queue
hw/sd/sdhci: Default I/O ops to little endian
hw/mips/loongson3-virt: Only use default USB if available
hw/char/escc: Implement loopback mode to allow self-testing
target/mips: Avoid overruns and shifts by negative number
target/sparc: Handle FPRS correctly on big-endian hosts
target/tricore: Rename tricore_feature to avoid clash with libcapstone
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* tag 'misc-fixes-20230725' of https://github.com/philmd/qemu:
target/tricore: Rename tricore_feature
target/sparc: Handle FPRS correctly on big-endian hosts
target/mips: Avoid shift by negative number in page_table_walk_refill()
target/mips: Pass directory/leaf shift values to walk_directory()
target/mips/mxu: Avoid overrun in gen_mxu_q8adde()
target/mips/mxu: Avoid overrun in gen_mxu_S32SLT()
target/mips/mxu: Replace magic array size by its definition
hw/char/escc: Implement loopback mode
hw/mips: Improve the default USB settings in the loongson3-virt machine
hw/sd/sdhci: Do not force sdhci_mmio_*_ops onto all SD controllers
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 0b58dc456191042dc3b84aa2b80619b71f8b1e3d
https://github.com/qemu/qemu/commit/0b58dc456191042dc3b84aa2b80619b71f8b1e3d
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M host/include/aarch64/host/cpuinfo.h
M host/include/generic/host/cpuinfo.h
M hw/9pfs/9p-local.c
M hw/9pfs/9p-proxy.c
M hw/9pfs/9p-synth.c
M hw/9pfs/9p-util.h
M hw/9pfs/9p.c
M hw/9pfs/9p.h
M hw/arm/aspeed.c
M hw/arm/mps2-tz.c
M hw/intc/arm_gic.c
M hw/intc/arm_gicv3_redist.c
M hw/intc/armv7m_nvic.c
M hw/intc/s390_flic_kvm.c
M hw/m68k/next-cube.c
M hw/m68k/next-kbd.c
M hw/m68k/virt.c
M hw/microblaze/petalogix_ml605_mmu.c
M hw/misc/allwinner-r40-dramc.c
M hw/misc/exynos4210_rng.c
M hw/pci/pci.c
M hw/sparc/sun4m_iommu.c
M include/hw/arm/fsl-imx7.h
M include/hw/intc/armv7m_nvic.h
M include/hw/s390x/s390-pci-bus.h
M include/hw/s390x/sclp.h
M migration/migration-stats.c
M migration/migration.h
M migration/multifd-zlib.c
M migration/multifd-zstd.c
M migration/multifd.c
M migration/savevm.c
M migration/trace-events
M qapi/char.json
M qapi/misc.json
M target/alpha/cpu.h
M target/alpha/translate.c
M target/arm/cpu.c
M target/arm/cpu.h
M target/arm/cpu64.c
M target/arm/helper.c
M target/arm/tcg/m_helper.c
M target/arm/tcg/translate-a64.c
M target/arm/tcg/translate-mve.c
M target/arm/tcg/translate-sve.c
M target/arm/tcg/translate-vfp.c
M target/arm/tcg/vec_helper.c
M target/cris/helper.c
M target/cris/op_helper.c
M target/cris/translate.c
M target/hppa/cpu.h
M target/hppa/int_helper.c
M target/hppa/translate.c
M target/loongarch/cpu-csr.h
M target/m68k/helper.c
M target/microblaze/cpu.h
M target/openrisc/cpu.h
M target/openrisc/translate.c
M target/rx/translate.c
M target/s390x/cpu_features.c
M target/s390x/cpu_models.c
M target/s390x/tcg/fpu_helper.c
M target/s390x/tcg/insn-data.h.inc
M target/s390x/tcg/translate.c
M target/sparc/asi.h
M target/tricore/csfr.h.inc
M target/tricore/helper.c
M target/tricore/translate.c
M tests/tcg/Makefile.target
M tests/tcg/aarch64/gdbstub/test-sve.py
M tests/tcg/aarch64/sme-outprod1.c
M tests/tcg/aarch64/system/boot.S
M tests/tcg/aarch64/system/semiheap.c
M tests/tcg/multiarch/sha512.c
M tests/tcg/multiarch/system/Makefile.softmmu-target
M tests/tcg/s390x/mvc.c
M tests/tcg/tricore/c/crt0-tc2x.S
M tests/tcg/x86_64/system/boot.S
Log Message:
-----------
Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging
trivial-patches 25-07-2023
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# =wCoQ
# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 25 Jul 2023 15:23:52 BST
# gpg: using RSA key 7B73BAD68BE7A2C289314B22701B4F6B1A693E59
# gpg: issuer "mjt@tls.msk.ru"
# gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" [full]
# gpg: aka "Michael Tokarev <mjt@corpit.ru>" [full]
# gpg: aka "Michael Tokarev <mjt@debian.org>" [full]
# Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D 4324 457C E0A0 8044 65C5
# Subkey fingerprint: 7B73 BAD6 8BE7 A2C2 8931 4B22 701B 4F6B 1A69 3E59
* tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu:
qapi: Correct "eg." to "e.g." in documentation
hw/pci: add comment to explain checking for available function 0 in pci
hotplug
target/tricore: Rename tricore_feature
hw/9pfs: spelling fixes
other architectures: spelling fixes
arm: spelling fixes
s390x: spelling fixes
migration: spelling fixes
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/a279ca4ea073...0b58dc456191