[Qemu-commits] [qemu/qemu] 7319d8: tcg: Combine dh_is_64bit and dh_is

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[Qemu-commits] [qemu/qemu] 7319d8: tcg: Combine dh_is_64bit and dh_is_si

From:	Peter Maydell
Subject:	[Qemu-commits] [qemu/qemu] 7319d8: tcg: Combine dh_is_64bit and dh_is_signed to dh_ty...
Date:	Tue, 22 Jun 2021 01:12:57 -0700
  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 7319d83a735004ba24b439491a9d7727dac2ddbe
      
https://github.com/qemu/qemu/commit/7319d83a735004ba24b439491a9d7727dac2ddbe
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M include/exec/helper-head.h
    M include/exec/helper-tcg.h
    M target/hppa/helper.h
    M target/i386/ops_sse_header.h
    M target/m68k/helper.h
    M target/ppc/helper.h
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode

We will shortly be interested in distinguishing pointers
from integers in the helper's declaration, as well as a
true void return.  We currently have two parallel 1 bit
fields; merge them and expand to a 3 bit field.

Our current maximum is 7 helper arguments, plus the return
makes 8 * 3 = 24 bits used within the uint32_t typemask.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 90163900e3c71ed2743cafd27542d941c4e25991
      
https://github.com/qemu/qemu/commit/90163900e3c71ed2743cafd27542d941c4e25991
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/optimize.c
    M tcg/tcg-internal.h
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Add tcg_call_flags

We're going to change how to look up the call flags from a TCGop,
so extract it as a helper.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 9a3ee36609da355a5a9c86512e5003ce6a9a2239
      
https://github.com/qemu/qemu/commit/9a3ee36609da355a5a9c86512e5003ce6a9a2239
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M accel/tcg/plugin-gen.c

  Log Message:
  -----------
  accel/tcg/plugin-gen: Drop inline markers

Let the compiler decide on inlining.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: c7bb41b44ad63515adccffa8a6486da46b0c2e26
      
https://github.com/qemu/qemu/commit/c7bb41b44ad63515adccffa8a6486da46b0c2e26
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M accel/tcg/plugin-gen.c
    M accel/tcg/plugin-helpers.h
    M include/qemu/plugin.h
    M plugins/core.c

  Log Message:
  -----------
  plugins: Drop tcg_flags from struct qemu_plugin_dyn_cb

As noted by qemu-plugins.h, enum qemu_plugin_cb_flags is
currently unused -- plugins can neither read nor write
guest registers.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 9d87e59585784cbc6a3307a00d1493268e0daead
      
https://github.com/qemu/qemu/commit/9d87e59585784cbc6a3307a00d1493268e0daead
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M accel/tcg/plugin-helpers.h

  Log Message:
  -----------
  accel/tcg: Add tcg call flags to plugins helpers

As noted by qemu-plugins.h, plugins can neither read nor write
guest registers.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 3e92aa34434bbcf88e5cc0a8334946216dcaf233
      
https://github.com/qemu/qemu/commit/3e92aa34434bbcf88e5cc0a8334946216dcaf233
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/tcg-internal.h
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Store the TCGHelperInfo in the TCGOp for call

This will give us both flags and typemask for use later.

We also fix a dumping bug, wherein calls generated for plugins
fail tcg_find_helper and print (null) instead of either a name
or the raw function pointer.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: fa52e660620fbb2418868e337aee06427ceafdbb
      
https://github.com/qemu/qemu/commit/fa52e660620fbb2418868e337aee06427ceafdbb
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/tcg-internal.h
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Add tcg_call_func

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 22f15579fa1ca654d331cac8e68a4e70981a8801
      
https://github.com/qemu/qemu/commit/22f15579fa1ca654d331cac8e68a4e70981a8801
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/meson.build
    M tcg/tcg.c
    M tests/docker/dockerfiles/alpine.docker
    M tests/docker/dockerfiles/centos8.docker
    M tests/docker/dockerfiles/debian10.docker
    M tests/docker/dockerfiles/fedora-i386-cross.docker
    M tests/docker/dockerfiles/fedora-win32-cross.docker
    M tests/docker/dockerfiles/fedora-win64-cross.docker
    M tests/docker/dockerfiles/fedora.docker
    M tests/docker/dockerfiles/ubuntu.docker
    M tests/docker/dockerfiles/ubuntu1804.docker
    M tests/docker/dockerfiles/ubuntu2004.docker

  Log Message:
  -----------
  tcg: Build ffi data structures for helpers

Add libffi as a build requirement for TCI.
Add libffi to the dockerfiles to satisfy that requirement.

Construct an ffi_cif structure for each unique typemask.
Record the result in a separate hash table for later lookup;
this allows helper_table to stay const.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: b6139eb0578fc422cfee77fccbd11152e73af1df
      
https://github.com/qemu/qemu/commit/b6139eb0578fc422cfee77fccbd11152e73af1df
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/tci/tcg-target.c.inc

  Log Message:
  -----------
  tcg/tci: Improve tcg_target_call_clobber_regs

The current setting is much too pessimistic.  Indicating only
the one or two registers that are actually assigned after a
call should avoid unnecessary movement between the register
array and the stack array.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: bcb81061dc8173076d9669f969d132b998cd2af9
      
https://github.com/qemu/qemu/commit/bcb81061dc8173076d9669f969d132b998cd2af9
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/tci/tcg-target.c.inc

  Log Message:
  -----------
  tcg/tci: Move call-return regs to end of tcg_target_reg_alloc_order

As the only call-clobbered regs for TCI, these should
receive the least priority.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 7b7d8b2d9a7fd68de821f96267e224c1a6256af1
      
https://github.com/qemu/qemu/commit/7b7d8b2d9a7fd68de821f96267e224c1a6256af1
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M include/tcg/tcg.h
    M tcg/tcg.c
    M tcg/tci.c
    M tcg/tci/tcg-target.c.inc
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg/tci: Use ffi for calls

This requires adjusting where arguments are stored.
Place them on the stack at left-aligned positions.
Adjust the stack frame to be at entirely positive offsets.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: baa94c0d333b5eccd68450625e0c3960e85d1913
      
https://github.com/qemu/qemu/commit/baa94c0d333b5eccd68450625e0c3960e85d1913
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/tci/tcg-target.c.inc
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg/tci: Reserve r13 for a temporary

We're about to adjust the offset range on host memory ops,
and the format of branches.  Both will require a temporary.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: fc8ec9e12529eceac4eef483cdde52c14f3ca937
      
https://github.com/qemu/qemu/commit/fc8ec9e12529eceac4eef483cdde52c14f3ca937
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/tci.c
    M tcg/tci/tcg-target.c.inc

  Log Message:
  -----------
  tcg/tci: Emit setcond before brcond

The encoding planned for tci does not have enough room for
brcond2, with 4 registers and a condition as input as well
as the label.  Resolve the condition into TCG_REG_TMP, and
relax brcond to one register plus a label, considering the
condition to always be reg != 0.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 7e00a0800051655e6fdd85ad5dd6fcadafc2dc47
      
https://github.com/qemu/qemu/commit/7e00a0800051655e6fdd85ad5dd6fcadafc2dc47
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/tci.c

  Log Message:
  -----------
  tcg/tci: Remove tci_write_reg

Inline it into its one caller, tci_write_reg64.
Drop the asserts that are redundant with tcg_read_r.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 650898891837a9772a5410e73c637a55d99e1e50
      
https://github.com/qemu/qemu/commit/650898891837a9772a5410e73c637a55d99e1e50
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M include/tcg/tcg-opc.h
    M tcg/tci.c
    M tcg/tci/README
    M tcg/tci/tcg-target.c.inc
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg/tci: Change encoding to uint32_t units

This removes all of the problems with unaligned accesses
to the bytecode stream.

With an 8-bit opcode at the bottom, we have 24 bits remaining,
which are generally split into 6 4-bit slots.  This fits well
with the maximum length opcodes, e.g. INDEX_op_add2_i32, which
have 6 register operands.

We have, in previous patches, rearranged things such that there
are no operations with a label which have more than one other
operand.  Which leaves us with a 20-bit field in which to encode
a label, giving us a maximum TB size of 512k -- easily large.

Change the INDEX_op_tci_movi_{i32,i64} opcodes to tci_mov[il].
The former puts the immediate in the upper 20 bits of the insn,
like we do for the label displacement.  The later uses a label
to reference an entry in the constant pool.  Thus, in the worst
case we still have a single memory reference for any constant,
but now the constants are out-of-line of the bytecode and can
be shared between different moves saving space.

Change INDEX_op_call to use a label to reference a pair of
pointers in the constant pool.  This removes the only slightly
dodgy link with the layout of struct TCGHelperInfo.

The re-encode cannot be done in pieces.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 6eea04347eb667f1326cb9b68c5b8f3d737f565d
      
https://github.com/qemu/qemu/commit/6eea04347eb667f1326cb9b68c5b8f3d737f565d
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/tcg.c
    M tcg/tci.c
    M tcg/tci/tcg-target-con-set.h
    M tcg/tci/tcg-target.c.inc
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg/tci: Implement goto_ptr

This operation is critical to staying within the interpretation
loop longer, which avoids the overhead of setup and teardown for
many TBs.

The check in tcg_prologue_init is disabled because TCI does
want to use NULL to indicate exit, as opposed to branching to
a real epilogue.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: df093c19efe7a6a9b2ed43b0b6a7fa5d1e16cfcd
      
https://github.com/qemu/qemu/commit/df093c19efe7a6a9b2ed43b0b6a7fa5d1e16cfcd
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/tci.c
    M tcg/tci/tcg-target.c.inc
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg/tci: Implement movcond

When this opcode is not available in the backend, tcg middle-end
will expand this as a series of 5 opcodes.  So implementing this
saves bytecode space.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: a81520b92d8a702be110052d253a1f034cf46d8f
      
https://github.com/qemu/qemu/commit/a81520b92d8a702be110052d253a1f034cf46d8f
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/tci.c
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg/tci: Implement andc, orc, eqv, nand, nor

These were already present in tcg-target.c.inc,
but not in the interpreter.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 0f10d7c5b0f16b73b47165196a0b366e011c94be
      
https://github.com/qemu/qemu/commit/0f10d7c5b0f16b73b47165196a0b366e011c94be
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/tci.c
    M tcg/tci/tcg-target.c.inc
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg/tci: Implement extract, sextract

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 5255f48c1c8c39be8ad95ef7ec0da0557924c806
      
https://github.com/qemu/qemu/commit/5255f48c1c8c39be8ad95ef7ec0da0557924c806
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/tci.c
    M tcg/tci/tcg-target.c.inc
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg/tci: Implement clz, ctz, ctpop

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: f6db0d8dc63e0ae3668646653ffa1c5be16fbe5e
      
https://github.com/qemu/qemu/commit/f6db0d8dc63e0ae3668646653ffa1c5be16fbe5e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/tci.c
    M tcg/tci/tcg-target.c.inc
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg/tci: Implement mulu2, muls2

We already had mulu2_i32 for a 32-bit host; expand this to 64-bit
hosts as well.  The muls2_i32 and the 64-bit opcodes are new.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 08096b1a644aebac7a1e52fe377c59a3f90ed43d
      
https://github.com/qemu/qemu/commit/08096b1a644aebac7a1e52fe377c59a3f90ed43d
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/tci.c
    M tcg/tci/tcg-target.c.inc
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg/tci: Implement add2, sub2

We already had the 32-bit versions for a 32-bit host; expand this
to 64-bit hosts as well.  The 64-bit opcodes are new.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 69acc02a8b341847e38e976ea473d66943d81717
      
https://github.com/qemu/qemu/commit/69acc02a8b341847e38e976ea473d66943d81717
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/tci.c

  Log Message:
  -----------
  tcg/tci: Split out tci_qemu_ld, tci_qemu_st

We can share this code between 32-bit and 64-bit loads and stores.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 5183f209eb3730a61adaf5ccfa1a30c807891971
      
https://github.com/qemu/qemu/commit/5183f209eb3730a61adaf5ccfa1a30c807891971
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/tci.c

  Log Message:
  -----------
  Revert "tcg/tci: Use exec/cpu_ldst.h interfaces"

This reverts commit dc09f047eddec8f4a1991c4f5f4a428d7aa3f2c0.

For tcg, tracepoints are expanded inline in tcg opcodes.
Using a helper which generates a second tracepoint is incorrect.

For system mode, the extraction and re-packing of MemOp and mmu_idx
lost the alignment information from MemOp.  So we were no longer
raising alignment exceptions for !TARGET_ALIGNED_ONLY guests.
This can be seen in tests/tcg/xtensa/test_load_store.S.

For user mode, we must update to the new signature of g2h() so that
the revert compiles.  We can leave set_helper_retaddr for later.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: d1b1348cc33e5de3449f47d757141d7771b10e9e
      
https://github.com/qemu/qemu/commit/d1b1348cc33e5de3449f47d757141d7771b10e9e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/tci.c

  Log Message:
  -----------
  tcg/tci: Remove the qemu_ld/st_type macros

These macros are only used in one place.  By expanding,
we get to apply some common-subexpression elimination
and create some local variables.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 2fc6f16ca5eedc7881df7f0a1fcfcf8cb52731ac
      
https://github.com/qemu/qemu/commit/2fc6f16ca5eedc7881df7f0a1fcfcf8cb52731ac
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/tci.c

  Log Message:
  -----------
  tcg/tci: Use {set,clear}_helper_retaddr

Wrap guest memory operations for tci like we do for cpu_ld*_data.

We cannot actually use the cpu_ldst.h interface without duplicating
the memory trace operations performed within, which will already
have been expanded into the tcg opcode stream.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: e5b4654907e9d96e1b215fa943e2f62e61676ed6
      
https://github.com/qemu/qemu/commit/e5b4654907e9d96e1b215fa943e2f62e61676ed6
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M configure
    M tests/tcg/Makefile.target

  Log Message:
  -----------
  tests/tcg: Increase timeout for TCI

The longest test at the moment seems to be a (slower)
aarch64 host, for which test-mmap takes 64 seconds.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 08dff435e27dc2bc3582e3f25e7cf01956dddafc
      
https://github.com/qemu/qemu/commit/08dff435e27dc2bc3582e3f25e7cf01956dddafc
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M accel/tcg/atomic_template.h
    M accel/tcg/cputlb.c
    M accel/tcg/user-exec.c

  Log Message:
  -----------
  accel/tcg: Probe the proper permissions for atomic ops

We had a single ATOMIC_MMU_LOOKUP macro that probed for
read+write on all atomic ops.  This is incorrect for
plain atomic load and atomic store.

For user-only, we rely on the host page permissions.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/390
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 9defd1bdfb0f2ddb3ca9863e39577f3a9929d58c
      
https://github.com/qemu/qemu/commit/9defd1bdfb0f2ddb3ca9863e39577f3a9929d58c
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/sparc/tcg-target.c.inc
    M tcg/tcg.c

  Log Message:
  -----------
  tcg/sparc: Fix temp_allocate_frame vs sparc stack bias

We should not be aligning the offset in temp_allocate_frame,
because the odd offset produces an aligned address in the end.
Instead, pass the logical offset into tcg_set_frame and add
the stack bias last.

Cc: qemu-stable@nongnu.org
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: c1c091948ae4a73c1a80b5005f6204d0e665ce52
      
https://github.com/qemu/qemu/commit/c1c091948ae4a73c1a80b5005f6204d0e665ce52
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Allocate sufficient storage in temp_allocate_frame

This function should have been updated for vector types
when they were introduced.

Fixes: d2fd745fe8b
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/367
Cc: qemu-stable@nongnu.org
Tested-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 732d58979c9d6ab1b955b65264a15d0696ea477e
      
https://github.com/qemu/qemu/commit/732d58979c9d6ab1b955b65264a15d0696ea477e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Restart when exhausting the stack frame

Assume that we'll have fewer temps allocated after
restarting with a fewer number of instructions.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 9ca0362298d5093352095838fee8ddee83c90bd5
      
https://github.com/qemu/qemu/commit/9ca0362298d5093352095838fee8ddee83c90bd5
  Author: Alessandro Di Federico <ale@rev.ng>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    A include/tcg/tcg-cond.h
    M include/tcg/tcg.h

  Log Message:
  -----------
  tcg: expose TCGCond manipulation routines

This commit moves into a separate file routines used to manipulate
TCGCond. These will be employed by the idef-parser.

Signed-off-by: Alessandro Di Federico <ale@rev.ng>
Signed-off-by: Paolo Montesel <babush@rev.ng>
Message-Id: <20210619093713.1845446-2-ale.qemu@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 1c9638667b7068539dc5783c9428d588b14162ea
      
https://github.com/qemu/qemu/commit/1c9638667b7068539dc5783c9428d588b14162ea
  Author: Stefan Weil <sw@weilnetz.de>
  Date:   2021-06-19 (Sat, 19 Jun 2021)

  Changed paths:
    M util/oslib-win32.c

  Log Message:
  -----------
  util/oslib-win32: Fix fatal assertion in qemu_try_memalign

The function is called with alignment == 0 which caused an assertion.
Use the code from oslib-posix.c to fix that regression.

Fixes: ed6f53f9ca9
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20210611105846.347954-1-sw@weilnetz.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: ee927ebf3c1b1ca02ccc35832da9f30b29b3f712
      
https://github.com/qemu/qemu/commit/ee927ebf3c1b1ca02ccc35832da9f30b29b3f712
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2021-06-22 (Tue, 22 Jun 2021)

  Changed paths:
    M accel/tcg/atomic_template.h
    M accel/tcg/cputlb.c
    M accel/tcg/plugin-gen.c
    M accel/tcg/plugin-helpers.h
    M accel/tcg/user-exec.c
    M configure
    M include/exec/helper-head.h
    M include/exec/helper-tcg.h
    M include/qemu/plugin.h
    A include/tcg/tcg-cond.h
    M include/tcg/tcg-opc.h
    M include/tcg/tcg.h
    M plugins/core.c
    M target/hppa/helper.h
    M target/i386/ops_sse_header.h
    M target/m68k/helper.h
    M target/ppc/helper.h
    M tcg/meson.build
    M tcg/optimize.c
    M tcg/sparc/tcg-target.c.inc
    M tcg/tcg-internal.h
    M tcg/tcg.c
    M tcg/tci.c
    M tcg/tci/README
    M tcg/tci/tcg-target-con-set.h
    M tcg/tci/tcg-target.c.inc
    M tcg/tci/tcg-target.h
    M tests/docker/dockerfiles/alpine.docker
    M tests/docker/dockerfiles/centos8.docker
    M tests/docker/dockerfiles/debian10.docker
    M tests/docker/dockerfiles/fedora-i386-cross.docker
    M tests/docker/dockerfiles/fedora-win32-cross.docker
    M tests/docker/dockerfiles/fedora-win64-cross.docker
    M tests/docker/dockerfiles/fedora.docker
    M tests/docker/dockerfiles/ubuntu.docker
    M tests/docker/dockerfiles/ubuntu1804.docker
    M tests/docker/dockerfiles/ubuntu2004.docker
    M tests/tcg/Makefile.target
    M util/oslib-win32.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210619-2' 
into staging

TCI cleanup and re-encoding
Fixes for #367 and #390.
Move TCGCond to tcg/tcg-cond.h.
Fix for win32 qemu_try_memalign.

# gpg: Signature made Sun 20 Jun 2021 05:23:53 BST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" 
[full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth-gitlab/tags/pull-tcg-20210619-2: (33 commits)
  util/oslib-win32: Fix fatal assertion in qemu_try_memalign
  tcg: expose TCGCond manipulation routines
  tcg: Restart when exhausting the stack frame
  tcg: Allocate sufficient storage in temp_allocate_frame
  tcg/sparc: Fix temp_allocate_frame vs sparc stack bias
  accel/tcg: Probe the proper permissions for atomic ops
  tests/tcg: Increase timeout for TCI
  tcg/tci: Use {set,clear}_helper_retaddr
  tcg/tci: Remove the qemu_ld/st_type macros
  Revert "tcg/tci: Use exec/cpu_ldst.h interfaces"
  tcg/tci: Split out tci_qemu_ld, tci_qemu_st
  tcg/tci: Implement add2, sub2
  tcg/tci: Implement mulu2, muls2
  tcg/tci: Implement clz, ctz, ctpop
  tcg/tci: Implement extract, sextract
  tcg/tci: Implement andc, orc, eqv, nand, nor
  tcg/tci: Implement movcond
  tcg/tci: Implement goto_ptr
  tcg/tci: Change encoding to uint32_t units
  tcg/tci: Remove tci_write_reg
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Compare: https://github.com/qemu/qemu/compare/0add99ea3ea9...ee927ebf3c1b
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