Mips delay slot optimization

[Paulo César Pereira de Andrade]

 Hi Paul,

  I wrote a new logic to optimize delay slot usage for the mips port.

 It was broken for mips6_p() anyway, so now there is  basically a
full decoder to check if an instruction can be added to the delay slot,
and a few new helpers to it.

  A basic documentation of how it works is in the commit changelog.

  I want to believe it is far more complete than your previous set of
patches, and it also forces adding extra logic to the decoder if
implementing new lightning functionality.

  To disable it in a hacky mode, just change instr() to never keep
a pending() instruction.

  Please let me know if you see any regressions, or if somehow it
is missing some delay slot usage optimization that was done in
your patches.

Thanks!
Paulo