Re: geda/lepton schematics

[karl]

Felix:
> On Sat, Mar 26, 2022 at 10:47:31AM +0100, karl@aspodata.se wrote:
> > You wrote earlier that:
> > > Connections in gEDA schematics are implicit, and port positions are
> > > needed to infer them. For this, the symbol database is required. The gEDA
> > > library has been used to look up the symbols.
> > 
> > By running the lepton/geda netlister you get the connections.
> > You don't need to have your own code for it.
> 
> Gnucap is not a netlister. The "code" is just a parser, and the
> intention is not to flatten the netlist, but to read in the schematic as
> a whole. This is not only required for lepton/geda, but wherever
> circuits are represented as a schematic.

I'm not sure libgeda is complete for that purpose. At the time when I
was involved in libgeda, the intentions of the then devs was to replace
it with guile code.
 Maybe it is sufficient to parse the .sch files, but does it also
hanlde reading the config files that tells where the symbols are ?
 I have lines like
(component-library-search "/Net/cvs/cvs.gedasymbols.org/www/user" "cvs/")
(define home (getenv "HOME"))
(source-library-search (build-path home "git/openhw/share/gschem"))
in gafrc, does your code catch that also ?

Feel free to ask for specific help with this.

> > lepton/geda has some code to produce verilog.
> > If verilog is the if. you want, why spend time on the geda plugin when
> > it might be more fruitful to get help from e.g. the lepton people to
> > shape up their verilog handling ?
> 
> Al has proposed a data interchange system quite some time ago [1].
> Nobody has done this, nor did the lepton people.
> [1] https://archive.fosdem.org/2016/schedule/event/eda_data_interchange/

 He talks about verilog-ams, this seems to be its reference:
https://www.accellera.org/images/downloads/standards/v-ams/VAMS-LRM-2-4.pdf

A first step could be if I work with the lepton people to shape up 
their (actually geda) verilog exporter so it emits files that makes
sense.

> Regardless. In order to make sense of the Symbols in Gnucap,
> electrically, we need a library with component models. I have started
> one in gnucap-geda/include/*.v. This is meant to resolve the default
> values for the component text attribute in the gEDA symbol library, by
> section. Such a library will give us something to play and explore,
> until we will be able to do Verilog/AMS.

Yes, I can see that, but I'm not experienced in model design to help
with that for the moment.

> > The drawback with that would be back annotation if I understand you:
> 
> The real problem is data interchange between eda tools, particularly in
> FOSS tools. Netlists, schematics, pcbs, floorplans...

Yes, there is a lot of talk about that, but not much happens.
There are some converters between file formats by people in the geda 
and pcb-rnd communities and part of the problem is that there is more
or less always some data loss.

 Igor2 has done some tries with
http://www.repo.hu/projects/edakrill/
http://repo.hu/projects/tedax/

Regards,
/Karl Hammar