[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Guile-commits] 211/437: Correct the cvt.tst test case on Itanium.
From: |
Andy Wingo |
Subject: |
[Guile-commits] 211/437: Correct the cvt.tst test case on Itanium. |
Date: |
Mon, 2 Jul 2018 05:14:22 -0400 (EDT) |
wingo pushed a commit to branch lightning
in repository guile.
commit 119ea1e97d4f399c850aac3a627db7485384e9c0
Author: pcpa <address@hidden>
Date: Sat Apr 27 17:16:01 2013 -0300
Correct the cvt.tst test case on Itanium.
* lib/jit_ia64-cpu.c: Correct wrong mapping of 2 instructions
in "M-, stop, M-, stop" translation, that was ignoring the
last stop (implemented as a nop I- stop).
* lib/jit_ia64-fpu.c: Properly implement fnorm.s and fnorm.d,
as well as the proper integer to float or double conversion.
---
ChangeLog | 9 +++++++++
lib/jit_ia64-cpu.c | 2 +-
lib/jit_ia64-fpu.c | 23 +++++++++++++++++++----
3 files changed, 29 insertions(+), 5 deletions(-)
diff --git a/ChangeLog b/ChangeLog
index 47ffd90..76debeb 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,14 @@
2013-04-27 Paulo Andrade <address@hidden>
+ * lib/jit_ia64-cpu.c: Correct wrong mapping of 2 instructions
+ in "M-, stop, M-, stop" translation, that was ignoring the
+ last stop (implemented as a nop I- stop).
+
+ * lib/jit_ia64-fpu.c: Properly implement fnorm.s and fnorm.d,
+ as well as the proper integer to float or double conversion.
+
+2013-04-27 Paulo Andrade <address@hidden>
+
* lib/jit_ia64-cpu.c: Correct bogus implementation of ldr_T
for signed integers, that was using ld1.s, ld2.s and ld4.s.
The ".s" stands for speculative load, not sign extend.
diff --git a/lib/jit_ia64-cpu.c b/lib/jit_ia64-cpu.c
index 8ae73f4..b64f861 100644
--- a/lib/jit_ia64-cpu.c
+++ b/lib/jit_ia64-cpu.c
@@ -1937,7 +1937,7 @@ _flush(jit_state_t *_jit)
s0 = ii(0); s1 = ii(1); s2 = nop_i;
break;
case MsMs:
- n = 2; tm = TM_MsM_I_;
+ n = 2; tm = TM_MsM_Is;
s0 = ii(0); s1 = ii(1); s2 = nop_i;
break;
case MsM_I_:
diff --git a/lib/jit_ia64-fpu.c b/lib/jit_ia64-fpu.c
index 0479bf6..ccbf60f 100644
--- a/lib/jit_ia64-fpu.c
+++ b/lib/jit_ia64-fpu.c
@@ -153,7 +153,7 @@ static void F16_(jit_state_t*,jit_word_t,
#define FCVT_FX_TRUNC(f1,f2) F10(0,SF_S0,0x1a,f2,f1)
#define FCVT_FXU_TRUNC(f1,f2) F10(0,SF_S0,0x1b,f2,f1)
/* fcvt.xf */
-#define FCVT_XF(f1,f2) F11(0x1c,f1,f2)
+#define FCVT_XF(f1,f2) F11(0x1c,f2,f1)
/* fcvt.fxuf */
#define FCVT_XUF(f1,f3) FMA(f1,f3,1,0)
/* fma */
@@ -199,6 +199,8 @@ static void F16_(jit_state_t*,jit_word_t,
#define FNMPY(f1,f3,f4) FNMA(f1,f3,f4,0)
/* fnorm */
#define FNORM(f1,f3) FMA(f1,f3,1,0)
+#define FNORM_S(f1,f3) FMA_S(f1,f3,1,0)
+#define FNORM_D(f1,f3) FMA_D(f1,f3,1,0)
/* for */
#define FOR(f1,f2,f3) F9(0,0x2e,f3,f2,f1)
/* fpabs */
@@ -440,9 +442,10 @@ static void _movi_d_w(jit_state_t*,jit_int32_t,jit_word_t);
static void _sqrtr_f(jit_state_t*,jit_int32_t,jit_int32_t);
#define sqrtr_d(r0,r1) _sqrtr_d(_jit,r0,r1)
static void _sqrtr_d(jit_state_t*,jit_int32_t,jit_int32_t);
-#define extr_f_d(r0,r1) /*FNORM(r0,r1)*/
-#define extr_d_f(r0,r1) /*FNORM(r0,r1)*/
-#define extr_f(r0,r1) extr_d(r0,r1)
+#define extr_f_d(r0,r1) FNORM_D(r0,r1)
+#define extr_d_f(r0,r1) FNORM_S(r0,r1)
+#define extr_f(r0,r1) _extr_f(_jit,r0,r1)
+static void _extr_f(jit_state_t*,jit_int32_t,jit_int32_t);
#define extr_d(r0,r1) _extr_d(_jit,r0,r1)
static void _extr_d(jit_state_t*,jit_int32_t,jit_int32_t);
#define truncr_f_i(r0,r1) truncr_d_l(r0,r1)
@@ -1109,12 +1112,24 @@ _divr_d(jit_state_t *_jit, jit_int32_t r0, jit_int32_t
r1, jit_int32_t r2)
}
static void
+_extr_f(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
+{
+ jit_int32_t reg;
+ reg = jit_get_reg(jit_class_fpr);
+ SETF_SIG(rn(reg), r1);
+ FCVT_XF(r0, rn(reg));
+ FNORM_S(r0, r0);
+ jit_unget_reg(reg);
+}
+
+static void
_extr_d(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
{
jit_int32_t reg;
reg = jit_get_reg(jit_class_fpr);
SETF_SIG(rn(reg), r1);
FCVT_XF(r0, rn(reg));
+ FNORM_D(r0, r0);
jit_unget_reg(reg);
}
- [Guile-commits] 198/437: Remove non optional gmp dependency., (continued)
- [Guile-commits] 198/437: Remove non optional gmp dependency., Andy Wingo, 2018/07/02
- [Guile-commits] 202/437: Ensure the end argument of __clear_cache is page aligned., Andy Wingo, 2018/07/02
- [Guile-commits] 197/437: Adapt PowerPC port to work in Darwin 32 bit and Linux 64 bit., Andy Wingo, 2018/07/02
- [Guile-commits] 184/437: Implement the "live" code to explicitly tell a register is live., Andy Wingo, 2018/07/02
- [Guile-commits] 149/437: Make all current test cases pass in Darwin PowerPC., Andy Wingo, 2018/07/02
- [Guile-commits] 113/437: Change JIT_REXTMP, JIT_R, JIT_V to use 64-bit registers, Andy Wingo, 2018/07/02
- [Guile-commits] 173/437: Add filename and line number annotation abstraction., Andy Wingo, 2018/07/02
- [Guile-commits] 201/437: Do not start over jit generation if can safely grow buffer size., Andy Wingo, 2018/07/02
- [Guile-commits] 152/437: Remove most type casts and compile test tool silently with -Wall, Andy Wingo, 2018/07/02
- [Guile-commits] 208/437: Implement fpr register arguments and minor extra fixes., Andy Wingo, 2018/07/02
- [Guile-commits] 211/437: Correct the cvt.tst test case on Itanium.,
Andy Wingo <=
- [Guile-commits] 187/437: Correct regression with float arguments in arm hardp, Andy Wingo, 2018/07/02
- [Guile-commits] 200/437: Add a simple memory management wrapper., Andy Wingo, 2018/07/02
- [Guile-commits] 196/437: Add missing __ppc__ definition., Andy Wingo, 2018/07/02
- [Guile-commits] 159/437: Correct stack.tst test case on ppc. Now all tests pass in all backends., Andy Wingo, 2018/07/02
- [Guile-commits] 172/437: Rework {get, push}arg{, i, r}_{f, d} to a more descriptive name and usage., Andy Wingo, 2018/07/02
- [Guile-commits] 221/437: Correct build and pass all tests on Solaris Sparc., Andy Wingo, 2018/07/02
- [Guile-commits] 228/437: Properly check tests output., Andy Wingo, 2018/07/02
- [Guile-commits] 186/437: Add code to release all memory used by the jit state., Andy Wingo, 2018/07/02
- [Guile-commits] 137/437: Make mips backend compile on a qemu image., Andy Wingo, 2018/07/02
- [Guile-commits] 222/437: Correct build and pass all tests on Solaris x86., Andy Wingo, 2018/07/02