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[Guile-commits] 122/437: Correct ALU add and sub operations with 64 bit
From: |
Andy Wingo |
Subject: |
[Guile-commits] 122/437: Correct ALU add and sub operations with 64 bit immediate operands. |
Date: |
Mon, 2 Jul 2018 05:13:57 -0400 (EDT) |
wingo pushed a commit to branch lightning
in repository guile.
commit 3749bc71d87a3be0b3ca886e2262f57b555086ea
Author: PCPA <address@hidden>
Date: Sun Aug 29 02:18:00 2010 -0300
Correct ALU add and sub operations with 64 bit immediate operands.
The problems would also happen with 32 bit unsigned operands that would
happen to have the topmost bit set, so, now it only uses 32 bit immediates
when bit 31 is not set.
This patch correct all the issues found by the test cases alu_add.tst and
alu_sub.tst in
http://code.google.com/p/exl/source/browse/trunk/check/lightning
---
lightning/i386/core-64.h | 37 +++++++++++++++++++++++++++++--------
1 file changed, 29 insertions(+), 8 deletions(-)
diff --git a/lightning/i386/core-64.h b/lightning/i386/core-64.h
index b0eff4c..af26324 100644
--- a/lightning/i386/core-64.h
+++ b/lightning/i386/core-64.h
@@ -91,7 +91,7 @@ struct jit_local_state {
#define jit_qop_(d, s1, is, op2d, op2i)
\
(_s32P((long)(is)) \
? jit_qop_small ((d), (s1), (op2d)) \
- : (MOVQrr ((is), JIT_REXTMP), jit_qop_small ((d), (s1), (op2i))))
+ : (MOVQir ((is), JIT_REXTMP), jit_qop_small ((d), (s1), (op2i))))
#define jit_bra_qr(s1, s2, op) (CMPQrr(s2, s1), op, _jit.x.pc)
#define _jit_bra_l(rs, is, op) (CMPQir(is, rs), op, _jit.x.pc)
@@ -108,7 +108,22 @@ struct jit_local_state {
(_u8P(is) ? jit_reduce_(op##Bir(is, jit_reg8(rs))) : \
jit_reduce_(op##Qir(is, rs)) )
-#define jit_addi_l(d, rs, is) jit_opi_((d), (rs), ADDQir((is), (d)),
LEAQmr((is), (rs), 0, 0, (d)) )
+#define jit_addi_l(d, rs, is) \
+ /* Value is not zero? */ \
+ ((is) \
+ /* Yes. Value is unsigned and fits in signed 32 bits? */ \
+ ? (_uiP(31, is) \
+ /* Yes. d == rs? */ \
+ ? jit_opi_((d), (rs), \
+ /* Yes. Use add opcode */ \
+ ADDQir((is), (d)), \
+ /* No. Use lea opcode */ \
+ LEAQmr((is), (rs), 0, 0, (d))) \
+ /* No. Need value in a register */ \
+ : (jit_movi_l(JIT_REXTMP, is), \
+ jit_addr_l(d, rs, JIT_REXTMP))) \
+ /* No. Do nothing. */ \
+ : 0)
#define jit_addr_l(d, s1, s2) jit_opo_((d), (s1), (s2), ADDQrr((s2), (d)),
ADDQrr((s1), (d)), LEAQmr(0, (s1), (s2), 1, (d)) )
#define jit_andi_l(d, rs, is) jit_qop_ ((d), (rs), (is), ANDQir((is), (d)),
ANDQrr(JIT_REXTMP, (d)))
#define jit_andr_l(d, s1, s2) jit_qopr_((d), (s1), (s2), ANDQrr((s1), (d)),
ANDQrr((s2), (d)) )
@@ -214,12 +229,18 @@ static int jit_arg_reg_order[] = { _EDI, _ESI, _EDX,
_ECX, _R8D, _R9D };
#define jit_negr_l(d, rs) jit_opi_((d), (rs), NEGQr(d), (XORQrr((d),
(d)), SUBQrr((rs), (d))) )
#define jit_movr_l(d, rs) ((void)((rs) == (d) ? 0 : MOVQrr((rs), (d))))
-#define jit_movi_p(d, is) (MOVQir(((long)(is)), (d)), _jit.x.pc)
-#define jit_movi_l(d, is) ((is) \
- ? (_u32P((long)(is)) \
- ? MOVLir((is), (d)) \
- : MOVQir((is), (d))) \
- : XORQrr ((d), (d)) )
+#define jit_movi_p(d, is) (jit_movi_ul(d, is), _jit.x.pc)
+#define jit_movi_l(d, is) \
+ /* Value is not zero? */ \
+ ((is) \
+ /* Yes. Value is unsigned and fits in signed 32 bits? */ \
+ ? (_uiP(31, is) \
+ /* Yes. Use 32 bits opcode */ \
+ ? MOVLir(is, (d)) \
+ /* No. Use 64 bits opcode */ \
+ : MOVQir(is, (d))) \
+ /* No. Set register to zero. */ \
+ : XORQrr ((d), (d)))
#define jit_bmsr_l(label, s1, s2) (TESTQrr((s1), (s2)), JNZm(label),
_jit.x.pc)
#define jit_bmcr_l(label, s1, s2) (TESTQrr((s1), (s2)), JZm(label),
_jit.x.pc)
- [Guile-commits] 148/437: Add better ppc support code, but still not functional., (continued)
- [Guile-commits] 148/437: Add better ppc support code, but still not functional., Andy Wingo, 2018/07/02
- [Guile-commits] 153/437: Make it clear stdarg like abstraction is not supported., Andy Wingo, 2018/07/02
- [Guile-commits] 76/437: fix several load/store patterns for x86-64., Andy Wingo, 2018/07/02
- [Guile-commits] 81/437: fix stack alignment for Apple 32-bit ABI, Andy Wingo, 2018/07/02
- [Guile-commits] 98/437: always set and replace lightning_frag, Andy Wingo, 2018/07/02
- [Guile-commits] 166/437: Correct extra regressions found by the call.tst test case., Andy Wingo, 2018/07/02
- [Guile-commits] 165/437: Add simple test case to test argument and return values., Andy Wingo, 2018/07/02
- [Guile-commits] 158/437: Add new test case to check stack integrity on complex stack frames., Andy Wingo, 2018/07/02
- [Guile-commits] 150/437: Add jit_ellipis and remove jit_prepare argument., Andy Wingo, 2018/07/02
- [Guile-commits] 108/437: fix x86_64 jit_bner_{f,d}, Andy Wingo, 2018/07/02
- [Guile-commits] 122/437: Correct ALU add and sub operations with 64 bit immediate operands.,
Andy Wingo <=
- [Guile-commits] 119/437: Correct branches and several ALU operations with 64 immediates, Andy Wingo, 2018/07/02
- [Guile-commits] 135/437: Correct implementation problems on ix86., Andy Wingo, 2018/07/02
- [Guile-commits] 169/437: Correct wrong and confusing reverse float comparison logic, Andy Wingo, 2018/07/02
- [Guile-commits] 139/437: Implement sqrt codes in mips., Andy Wingo, 2018/07/02
- [Guile-commits] 134/437: Correct make distcheck., Andy Wingo, 2018/07/02
- [Guile-commits] 156/437: Simplify listing of test cases with alternate jit generation options, Andy Wingo, 2018/07/02
- [Guile-commits] 157/437: Add two extra test cases for float operations., Andy Wingo, 2018/07/02
- [Guile-commits] 161/437: Add new register clobber detection test case., Andy Wingo, 2018/07/02
- [Guile-commits] 164/437: Add new carry test case., Andy Wingo, 2018/07/02
- [Guile-commits] 138/437: Correct mips backend implementation to pass initial tests., Andy Wingo, 2018/07/02