[Viuavm-commits] [SCM] Viua VM branch issue/169/using-multiple-register-sets-in-single-instruction updated. v0.8.4-876-g92f5343

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- Log -----------------------------------------------------------------
commit 92f534395be15850ab5d392fcad7921fb55eafd7
Author: Marek Marecki <address@hidden>
Date:   Sun Jan 29 02:03:52 2017 +0100

    Support explicit register sets for ALU instructions

commit b92cc8aec12c0dcc39feb106f5e84ab8d4a6c05e
Author: Marek Marecki <address@hidden>
Date:   Sun Jan 29 01:58:58 2017 +0100

    Fix correctly deal with references
    
    A bug surfaced when a capture-by-reference was used in conjunction with
    explicit register sets.
    The VM tried to cast reference returned by the register directly into an
    object without first unwrapping the reference.

-----------------------------------------------------------------------

Summary of changes:
 src/bytecode/decoder/operands.cpp    |   5 ++
 src/cg/assembler/static_analysis.cpp |   5 +-
 src/cg/disassembler/disassembler.cpp |   5 ++
 src/cg/lex.cpp                       |  49 +++++++++---
 src/cg/tools.cpp                     |  21 ++++-
 src/front/asm/generate.cpp           | 144 ++++++++++++++++++++++++-----------
 src/process/instr/arithmetic.cpp     |  10 +--
 7 files changed, 175 insertions(+), 64 deletions(-)


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