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RE: [Tinycc-devel] C6x Port

From: Peter \"Firefly\" Lund
Subject: RE: [Tinycc-devel] C6x Port
Date: Tue, 11 Mar 2003 17:44:53 +0100 (MET)

On Tue, 11 Mar 2003, TK wrote:

> BTW I really like the C6711 chip.  If you're not familiar with it:  It
> is relatively cheap (~$20-$30).  Has a theoretical peak of about 1 GFLOP
> (you get maybe 1/10th of this in any real application, but that is true

Hmmm..  Pretty good.  The last microcontroller I played with was the 8051
family (mostly 80535).

> of most processors).  Has 64Kbytes of 256 bits wide 0 wait state
> internal RAM.  It doesn't need a heat sink.  Bolts right up to SDRAM.
> And has a very efficient interrupt system (I've had useful interrupt
> routines that executed in < 50ns!)

/Very/ impressive.

[gotcha #1]

> taken "effect").  In this case the interrupt system is totally disabled
> for the duration of the loop!  The TI compiler allows for you to specify
> the max number of cycles this is allowed to occur.

[gotcha #2]
> 2 cycles later).  That all works fine, EXCEPT if an interrupt occurs
> during the 4 cycle latency!  Then it is as if there was no latency and
> the result is most likely an unexpected result.  The only solution is to
> turn off interrupts, or use more registers.

It seems like a really interesting little beast.  I have a tentative
agreement with people at the local university (which I dropped out of to
work) that I could write some good stuff (algorithms, implementations,
reports, etc) and get study credits for it.  I have a pretty serious plan
to write the best compiler for 8-bit CPUs (mainly Z80 and 8051).
Something like the C67 could probably profit on that work -- but it would
have to be somebody else who did it.  I'm not really personally interested
in that architecture - the IA-32 and x86-64 more than please my need for
bizarre complexity ;)


"Some day American bombs will be smart enough to have
second thoughts about using wars to solve humanity's
problems."  -A. Whitney Brown

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