[Simulavr-devel] [patch #7640] Fixes error in branch instruction trace: bogus target labels

[Sebas Vila-Marta]

Follow-up Comment #3, patch #7640 (project simulavr):

Hi Petr,

I have a modest knowledge of simulavr architecture... so my opinion should be
taken with a grain of salt ;-)

Following your comments I think :

a) AVR architecture has two banks of memory. Let's name them flash and ram.
The minimum addressable unit in ram are bytes. The minimum addressable unit in
flash are words (16b). This is true despite of the instructions like  LPM.
These instructions can be better seen as instructions fetching a word and then
selecting the low or hight byte.

b) According to the last item, it seems natural in simulavr to address ram
using byte-based addresses and flash using word-based addresses. I see no need
to change it. Then I would vote for option (A) of your proposal.

c) (This is a little off-topic) In my opinion it's much more artificial to
consider PC as a byte-based address. PC always holds flash addresses, thus it
should be word-based. Considering PC word-based would make a lot of
expressions like "PC*2" spreaded along the code to rewrite as a simpler "PC".


    _______________________________________________________

Reply to this item at:

  <http://savannah.nongnu.org/patch/?7640>

_______________________________________________
  Message sent via/by Savannah
  http://savannah.nongnu.org/