? atmega16.diff ? core_avr_dump.core ? src/disp-vcd/config_parser.c ? src/disp-vcd/config_parser.h ? src/disp-vcd/config_scanner.c ? test_asm/test_8515/test_blink ? test_asm/test_8515/test_cntr ? test_asm/test_8515/test_eeprom ? test_asm/test_8515/test_port ? test_asm/test_8515/test_stack ? test_asm/test_8515/test_toie0 ? test_asm/test_8515/test_toie0_2 ? test_asm/test_8515/test_wdr ? test_asm/test_8515/test_wdr2 Index: ChangeLog =================================================================== RCS file: /cvsroot/simulavr/simulavr/ChangeLog,v retrieving revision 1.136 diff -u -r1.136 ChangeLog --- ChangeLog 25 Mar 2003 20:09:37 -0000 1.136 +++ ChangeLog 30 Mar 2003 16:39:08 -0000 @@ -1,3 +1,8 @@ +2003-03-29 Hermann Kraus + * src/devsupp.c: + * src/intvects.c: + Added support for the ATMega16 device + 2003-03-25 Theodore A. Roth * regress/regress.py.in: Fix --sim option to take an argument. Index: src/devsupp.c =================================================================== RCS file: /cvsroot/simulavr/simulavr/src/devsupp.c,v retrieving revision 1.8 diff -u -r1.8 devsupp.c --- src/devsupp.c 28 Aug 2002 18:53:40 -0000 1.8 +++ src/devsupp.c 30 Mar 2003 16:39:11 -0000 @@ -71,6 +71,7 @@ VTAB_AT90S1200 = 0, VTAB_AT90S2313, VTAB_AT90S4414, + VTAB_ATMEAG16, VTAB_ATMEGA103, VTAB_ATMEGA128, }; @@ -89,7 +90,7 @@ /* Ports is a string with two characters used to specify each port. The first char is the port id and the second is the width of the - port. For example, the at90s1200 has two ports, 'b' and 'd' which + port. For example, the at90s1200 has two ports, 'b' and 'd' which are 8 and 7 bits wide respectively, would be specified with a string as such: "b8d7". */ char *ports; @@ -222,6 +223,34 @@ }; +/* Added by Hermann Kraus on 2003-03-29 */ +static DevSuppDefn defn_atmega16 = { + /* name */ "atmega16", + /* stack_type */ STACK_MEMORY, + /* sram_base */ SRAM_BASE, + /* irq_vect_idx */ VTAB_ATMEGA16, + + /* ports */ "a8b8c8d8", + + { + /* size.pc */ 2, /* 13 bits */ + /* size.stack */ 0, + /* size.flash */ 16*1024, + /* size.sram */ 1*1024, + /* size.eeprom */ 512 + }, + { + /* mask.eecr */ (mask_EERE | mask_EEWE | mask_EEMWE), + /* mask.mcucr */ (mask_SRE | mask_SRW | mask_SE | mask_SM | + mask_ISC11 | mask_ISC10 | mask_ISC01 | mask_ISC00), + /* mask.acsr */ (mask_ACD | mask_ACO | mask_ACI | mask_ACIE | + mask_ACIC | mask_ACIS1 | mask_ACIS0), + /* mask.wdtcr */ (mask_WDTOE | mask_WDE | mask_WDP2 | mask_WDP1 | mask_WDP0), + /* mask.timsk */ (mask_TOIE1 | mask_OCIE1A | mask_OCIE1B | mask_TICIE1 | mask_TOIE0) + } +}; + + static DevSuppDefn defn_atmega103 = { /* name */ "atmega103", /* stack_type */ STACK_MEMORY, @@ -231,7 +260,7 @@ /* ports */ "a8b8c8d8", { - /* size.pc */ 2, + /* size.pc */ 3, /* Changed [hnkraus]: For adressing 128k we need 17 bits, thus having a 3byte pc */ /* size.stack */ 0, /* size.flash */ 128*1024, /* size.sram */ 4*1024, @@ -258,7 +287,7 @@ /* ports */ "a8b8c8d8", { - /* size.pc */ 2, + /* size.pc */ 3, /* Changed [hnkraus]: For adressing 128k we need 17 bits, thus having a 3byte pc */ /* size.stack */ 0, /* size.flash */ 128*1024, /* size.sram */ 4*1024, @@ -283,6 +312,7 @@ &defn_at90s2313, &defn_at90s4414, &defn_at90s8515, + &defn_atmega16, &defn_atmega103, &defn_atmega128, NULL Index: src/intvects.c =================================================================== RCS file: /cvsroot/simulavr/simulavr/src/intvects.c,v retrieving revision 1.7 diff -u -r1.7 intvects.c --- src/intvects.c 28 Aug 2002 18:53:40 -0000 1.7 +++ src/intvects.c 30 Mar 2003 16:39:13 -0000 @@ -210,6 +210,68 @@ { NULL /* "IRQ_SPM_READY" */, 0x00, 0x00 }, }; + +/* + * Vector Table for devices: + * atmega16 + * + * Added by Hermann Kraus on 2003-03-29 + */ + +static IntVect vtab_atmega16[] = { + { "IRQ_RESET", 0x00, 0x00 }, + + { "IRQ_INT0", 0x02, 0x00 }, + { "IRQ_INT1", 0x04, 0x00 }, + { "IRQ_INT2", 0x24, 0x00 }, + { NULL /* "IRQ_INT3" */, 0x00, 0x00 }, + { NULL /* "IRQ_INT4" */, 0x00, 0x00 }, + { NULL /* "IRQ_INT5" */, 0x00, 0x00 }, + { NULL /* "IRQ_INT6",*/, 0x00, 0x00 }, + { NULL /* "IRQ_INT7",*/, 0x00, 0x00 }, + + { "IRQ_TIMER0_COMP", 0x26, 0x00 }, + { "IRQ_TIMER0_OVF", 0x12, 0x00 }, + + { "IRQ_TIMER1_CAPT", 0x0a, 0x00 }, + { "IRQ_TIMER1_COMPA", 0x0c, 0x00 }, + { "IRQ_TIMER1_COMPB", 0x0e, 0x00 }, + { NULL /* "IRQ_TIMER1_COMPC" */, 0x00, 0x00 }, + { "IRQ_TIMER1_OVF", 0x10, 0x00 }, + + { "IRQ_TIMER2_COMP", 0x06, 0x00 }, + { "IRQ_TIMER2_OVF", 0x08, 0x00 }, + + { NULL /* "IRQ_TIMER3_CAPT" */, 0x00, 0x00 }, + { NULL /* "IRQ_TIMER3_COMPA" */, 0x00, 0x00 }, + { NULL /* "IRQ_TIMER3_COMPB" */, 0x00, 0x00 }, + { NULL /* "IRQ_TIMER3_COMPC" */, 0x00, 0x00 }, + { NULL /* "IRQ_TIMER3_OVF" */, 0x00, 0x00 }, + + { "IRQ_SPI_STC", 0x14, 0x00 }, + { "IRQ_TWI", 0x22, 0x00 }, + + { "IRQ_UART_RX", 0x16, 0x00 }, + { "IRQ_UART_UDRE", 0x18, 0x00 }, + { "IRQ_UART_TX", 0x1a, 0x00 }, + + + { NULL /* "IRQ_USART0_RX" */, 0x00, 0x00 }, + { NULL /* "IRQ_USART0_UDRE" */, 0x00, 0x00 }, + { NULL /* "IRQ_USART0_TX" */, 0x00, 0x00 }, + + { NULL /* "IRQ_USART1_RX" */, 0x00, 0x00 }, + { NULL /* "IRQ_USART1_UDRE" */, 0x00, 0x00 }, + { NULL /* "IRQ_USART1_TX" */, 0x00, 0x00 }, + + { "IRQ_ADC", 0x1c, 0x00 }, + { "IRQ_ANA_COMP", 0x20, 0x00 }, + + { "IRQ_EE_READY", 0x1e, 0x00 }, + { "IRQ_SPM_READY", 0x28, 0x00 }, +}; + + /* * Vector Table for devices: * atmega103 @@ -341,6 +403,7 @@ vtab_at90s1200, vtab_at90s2313, vtab_at90s4414, + vtab_atmega16, vtab_atmega103, vtab_atmega128, NULL