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[PATCH v5 19/37] bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP
From: |
Warner Losh |
Subject: |
[PATCH v5 19/37] bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions |
Date: |
Sun, 7 Nov 2021 20:51:18 -0700 |
Implement EXCP_UDEF, EXCP_DEBUG, EXCP_INTERRUPT, EXCP_ATOMIC and
EXCP_YIELD. The first two generate a signal to the emulated
binary. EXCP_ATOMIC handles atomic operations. The remainder are fancy
nops.
Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Mikaƫl Urankar <mikael.urankar@gmail.com>
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
bsd-user/arm/target_arch_cpu.h | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/bsd-user/arm/target_arch_cpu.h b/bsd-user/arm/target_arch_cpu.h
index 2484bdc2f7..9f9b380b13 100644
--- a/bsd-user/arm/target_arch_cpu.h
+++ b/bsd-user/arm/target_arch_cpu.h
@@ -48,6 +48,39 @@ static inline void target_cpu_loop(CPUARMState *env)
cpu_exec_end(cs);
process_queued_cpu_work(cs);
switch (trapnr) {
+ case EXCP_UDEF:
+ {
+ /* See arm/arm/undefined.c undefinedinstruction(); */
+ info.si_addr = env->regs[15];
+
+ /* illegal instruction */
+ info.si_signo = TARGET_SIGILL;
+ info.si_errno = 0;
+ info.si_code = TARGET_ILL_ILLOPC;
+ queue_signal(env, info.si_signo, &info);
+
+ /* TODO: What about instruction emulation? */
+ }
+ break;
+ case EXCP_INTERRUPT:
+ /* just indicate that signals should be handled asap */
+ break;
+ case EXCP_DEBUG:
+ {
+
+ info.si_signo = TARGET_SIGTRAP;
+ info.si_errno = 0;
+ info.si_code = TARGET_TRAP_BRKPT;
+ info.si_addr = env->exception.vaddress;
+ queue_signal(env, info.si_signo, &info);
+ }
+ break;
+ case EXCP_ATOMIC:
+ cpu_exec_step_atomic(cs);
+ break;
+ case EXCP_YIELD:
+ /* nothing to do here for user-mode, just resume guest code */
+ break;
default:
fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
trapnr);
--
2.33.0
- [PATCH v5 01/37] bsd-user/mips*: Remove mips support, (continued)
- [PATCH v5 01/37] bsd-user/mips*: Remove mips support, Warner Losh, 2021/11/07
- [PATCH v5 07/37] bsd-user/i386: Move the inlines into signal.c, Warner Losh, 2021/11/07
- [PATCH v5 12/37] bsd-user/target_os_signal.h: Move signal prototypes to target_os_ucontext.h, Warner Losh, 2021/11/07
- [PATCH v5 26/37] bsd-user/arm/target_arch_elf.h: arm defines for ELF, Warner Losh, 2021/11/07
- [PATCH v5 33/37] bsd-user/arm/signal.c: arm get_mcontext, Warner Losh, 2021/11/07
- [PATCH v5 05/37] bsd-user/i386/target_arch_signal.h: use new target_os_ucontext.h, Warner Losh, 2021/11/07
- [PATCH v5 06/37] bsd-user/i386/target_arch_signal.h: Update mcontext_t to match FreeBSD, Warner Losh, 2021/11/07
- [PATCH v5 27/37] bsd-user/arm/target_arch_elf.h: arm get hwcap, Warner Losh, 2021/11/07
- [PATCH v5 08/37] bsd-user/x86_64/target_arch_signal.h: Remove target_sigcontext, Warner Losh, 2021/11/07
- [PATCH v5 10/37] bsd-user/x86_64/target_arch_signal.h: Fill in mcontext_t, Warner Losh, 2021/11/07
- [PATCH v5 19/37] bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions,
Warner Losh <=
- [PATCH v5 04/37] bsd-user/i386/target_arch_signal.h: Remove target_sigcontext, Warner Losh, 2021/11/07
- [PATCH v5 16/37] bsd-user/arm/target_arch_cpu.h: CPU Loop definitions, Warner Losh, 2021/11/07
- [PATCH v5 02/37] bsd-user/freebsd: Create common target_os_ucontext.h file, Warner Losh, 2021/11/07
- [PATCH v5 28/37] bsd-user/arm/target_arch_elf.h: arm get_hwcap2 impl, Warner Losh, 2021/11/07
- [PATCH v5 35/37] bsd-user/arm/signal.c: arm get_ucontext_sigreturn, Warner Losh, 2021/11/07
- [PATCH v5 25/37] bsd-user/arm/target_arch_thread.h: Routines to create and switch to a thread, Warner Losh, 2021/11/07
- [PATCH v5 17/37] bsd-user/arm/target_arch_cpu.h: Implement target_cpu_clone_regs, Warner Losh, 2021/11/07
- [PATCH v5 03/37] bsd-user: create a per-arch signal.c file, Warner Losh, 2021/11/07
- [PATCH v5 13/37] bsd-user/arm/target_arch_sysarch.h: Use consistent include guards, Warner Losh, 2021/11/07
- [PATCH v5 14/37] bsd-user/arm/target_syscall.h: Add copyright and update name, Warner Losh, 2021/11/07