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[PATCH 07/24] bsd-user/arm/target_arch_cpu.h: Implment trivial EXCP exce
From: |
Warner Losh |
Subject: |
[PATCH 07/24] bsd-user/arm/target_arch_cpu.h: Implment trivial EXCP exceptions |
Date: |
Tue, 19 Oct 2021 10:44:30 -0600 |
Implent EXCP_UDEF, EXCP_DEBUG, EXCP_INTERRUPT, EXCP_ATOMIC and
EXCP_YIELD. The first two generate a signal to the emulated
binary. EXCP_ATOMIC handles atomic operations. The remainder are fancy
nops.
Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Mikaƫl Urankar <mikael.urankar@gmail.com>
Signed-off-by: Klye Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
---
bsd-user/arm/target_arch_cpu.h | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/bsd-user/arm/target_arch_cpu.h b/bsd-user/arm/target_arch_cpu.h
index 94c9109c3f..f22384676a 100644
--- a/bsd-user/arm/target_arch_cpu.h
+++ b/bsd-user/arm/target_arch_cpu.h
@@ -47,6 +47,34 @@ static inline void target_cpu_loop(CPUARMState *env)
cpu_exec_end(cs);
process_queued_cpu_work(cs);
switch (trapnr) {
+ case EXCP_UDEF:
+ {
+ /* See arm/arm/undefined.c undefinedinstruction(); */
+ info.si_addr = env->regs[15];
+ info.si_signo = TARGET_SIGILL;
+ info.si_errno = 0;
+ info.si_code = TARGET_ILL_ILLADR;
+ queue_signal(env, info.si_signo, &info);
+ }
+ break;
+ case EXCP_INTERRUPT:
+ /* just indicate that signals should be handled asap */
+ break;
+ case EXCP_DEBUG:
+ {
+
+ info.si_signo = TARGET_SIGTRAP;
+ info.si_errno = 0;
+ info.si_code = TARGET_TRAP_BRKPT;
+ queue_signal(env, info.si_signo, &info);
+ }
+ break;
+ case EXCP_ATOMIC:
+ cpu_exec_step_atomic(cs);
+ break;
+ case EXCP_YIELD:
+ /* nothing to do here for user-mode, just resume guest code */
+ break;
default:
fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
trapnr);
--
2.32.0
- [PATCH 04/24] bsd-user/arm/target_arch_cpu.h: CPU Loop definitions, (continued)
- [PATCH 04/24] bsd-user/arm/target_arch_cpu.h: CPU Loop definitions, Warner Losh, 2021/10/19
- [PATCH 01/24] bsd-user/arm/target_arch_sysarch.h: Use consistent include guards, Warner Losh, 2021/10/19
- [PATCH 05/24] bsd-user/arm/target_arch_cpu.h: Implement target_cpu_clone_regs, Warner Losh, 2021/10/19
- [PATCH 07/24] bsd-user/arm/target_arch_cpu.h: Implment trivial EXCP exceptions,
Warner Losh <=
- [PATCH 08/24] bsd-user/arm/target_arch_cpu.h: Implement data abort exceptions, Warner Losh, 2021/10/19
- [PATCH 09/24] bsd-user/arm/target_arch_cpu.h: Implement system call dispatch, Warner Losh, 2021/10/19