[PATCH 07/10] hw/isa: Add the ISA_IRQ_RTC_DEFAULT definition

[Philippe Mathieu-Daudé]

The RTC time keep clock ses IRQ #8 by default. Add this
default definition to the IsaIrqNumber enum.

Avoid magic values in the code, replace them by the
newly introduced definition.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 include/hw/isa/isa.h         | 1 +
 include/hw/rtc/mc146818rtc.h | 1 -
 hw/isa/piix4.c               | 2 +-
 hw/rtc/m48t59-isa.c          | 2 +-
 hw/rtc/mc146818rtc.c         | 4 ++--
 hw/timer/hpet.c              | 8 ++++----
 tests/qtest/rtc-test.c       | 8 ++++----
 7 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h
index 081fa446152..9f78ff11246 100644
--- a/include/hw/isa/isa.h
+++ b/include/hw/isa/isa.h
@@ -14,6 +14,7 @@ enum IsaIrqNumber {
     ISA_IRQ_TPM_DEFAULT =  5,
     ISA_IRQ_FDC_DEFAULT =  6,
     ISA_IRQ_PAR_DEFAULT =  7,
+    ISA_IRQ_RTC_DEFAULT =  8,
     ISA_NUM_IRQS        = 16
 };
 
diff --git a/include/hw/rtc/mc146818rtc.h b/include/hw/rtc/mc146818rtc.h
index 5b45b229244..1cca26399ce 100644
--- a/include/hw/rtc/mc146818rtc.h
+++ b/include/hw/rtc/mc146818rtc.h
@@ -47,7 +47,6 @@ struct RTCState {
     QLIST_ENTRY(RTCState) link;
 };
 
-#define RTC_ISA_IRQ 8
 #define RTC_ISA_BASE 0x70
 
 ISADevice *mc146818_rtc_init(ISABus *bus, int base_year,
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
index a50d97834c7..d9cceff9c84 100644
--- a/hw/isa/piix4.c
+++ b/hw/isa/piix4.c
@@ -185,7 +185,7 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
     if (!qdev_realize(DEVICE(&s->rtc), BUS(isa_bus), errp)) {
         return;
     }
-    isa_init_irq(ISA_DEVICE(&s->rtc), &s->rtc.irq, RTC_ISA_IRQ);
+    isa_init_irq(ISA_DEVICE(&s->rtc), &s->rtc.irq, ISA_IRQ_RTC_DEFAULT);
 
     piix4_dev = dev;
 }
diff --git a/hw/rtc/m48t59-isa.c b/hw/rtc/m48t59-isa.c
index cae315e4885..bdde427a945 100644
--- a/hw/rtc/m48t59-isa.c
+++ b/hw/rtc/m48t59-isa.c
@@ -124,7 +124,7 @@ static void m48t59_isa_realize(DeviceState *dev, Error 
**errp)
 
     s->model = u->info.model;
     s->size = u->info.size;
-    isa_init_irq(isadev, &s->IRQ, 8);
+    isa_init_irq(isadev, &s->IRQ, ISA_IRQ_RTC_DEFAULT);
     m48t59_realize_common(s, errp);
     memory_region_init_io(&d->io, OBJECT(dev), &m48t59_io_ops, s, "m48t59", 4);
     if (d->io_base != 0) {
diff --git a/hw/rtc/mc146818rtc.c b/hw/rtc/mc146818rtc.c
index 7a38540cb9d..ba156b9a0bd 100644
--- a/hw/rtc/mc146818rtc.c
+++ b/hw/rtc/mc146818rtc.c
@@ -981,7 +981,7 @@ ISADevice *mc146818_rtc_init(ISABus *bus, int base_year, 
qemu_irq intercept_irq)
     if (intercept_irq) {
         qdev_connect_gpio_out(dev, 0, intercept_irq);
     } else {
-        isa_connect_gpio_out(isadev, 0, RTC_ISA_IRQ);
+        isa_connect_gpio_out(isadev, 0, ISA_IRQ_RTC_DEFAULT);
     }
 
     object_property_add_alias(qdev_get_machine(), "rtc-time", OBJECT(isadev),
@@ -1020,7 +1020,7 @@ static void rtc_build_aml(ISADevice *isadev, Aml *scope)
     crs = aml_resource_template();
     aml_append(crs, aml_io(AML_DECODE16, RTC_ISA_BASE, RTC_ISA_BASE,
                            0x01, 0x08));
-    aml_append(crs, aml_irq_no_flags(RTC_ISA_IRQ));
+    aml_append(crs, aml_irq_no_flags(ISA_IRQ_RTC_DEFAULT));
 
     dev = aml_device("RTC");
     aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0B00")));
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index 05fd86af817..579a9faecf3 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -196,7 +196,7 @@ static void update_irq(struct HPETTimer *timer, int set)
          * timer0 be routed to IRQ0 in NON-APIC or IRQ2 in the I/O APIC,
          * timer1 be routed to IRQ8 in NON-APIC or IRQ8 in the I/O APIC.
          */
-        route = (timer->tn == 0) ? 0 : RTC_ISA_IRQ;
+        route = (timer->tn == 0) ? 0 : ISA_IRQ_RTC_DEFAULT;
     } else {
         route = timer_int_route(timer);
     }
@@ -615,11 +615,11 @@ static void hpet_ram_write(void *opaque, hwaddr addr,
             if (activating_bit(old_val, new_val, HPET_CFG_LEGACY)) {
                 qemu_set_irq(s->pit_enabled, 0);
                 qemu_irq_lower(s->irqs[0]);
-                qemu_irq_lower(s->irqs[RTC_ISA_IRQ]);
+                qemu_irq_lower(s->irqs[ISA_IRQ_RTC_DEFAULT]);
             } else if (deactivating_bit(old_val, new_val, HPET_CFG_LEGACY)) {
                 qemu_irq_lower(s->irqs[0]);
                 qemu_set_irq(s->pit_enabled, 1);
-                qemu_set_irq(s->irqs[RTC_ISA_IRQ], s->rtc_irq_level);
+                qemu_set_irq(s->irqs[ISA_IRQ_RTC_DEFAULT], s->rtc_irq_level);
             }
             break;
         case HPET_CFG + 4:
@@ -711,7 +711,7 @@ static void hpet_handle_legacy_irq(void *opaque, int n, int 
level)
     } else {
         s->rtc_irq_level = level;
         if (!hpet_in_legacy_mode(s)) {
-            qemu_set_irq(s->irqs[RTC_ISA_IRQ], level);
+            qemu_set_irq(s->irqs[ISA_IRQ_RTC_DEFAULT], level);
         }
     }
 }
diff --git a/tests/qtest/rtc-test.c b/tests/qtest/rtc-test.c
index c7af34f6b1b..9ae90d4925c 100644
--- a/tests/qtest/rtc-test.c
+++ b/tests/qtest/rtc-test.c
@@ -278,7 +278,7 @@ static void alarm_time(void)
     /* set DEC mode */
     cmos_write(RTC_REG_B, REG_B_24H | REG_B_DM);
 
-    g_assert(!get_irq(RTC_ISA_IRQ));
+    g_assert(!get_irq(ISA_IRQ_RTC_DEFAULT));
     cmos_read(RTC_REG_C);
 
     now.tm_sec = (now.tm_sec + 2) % 60;
@@ -288,14 +288,14 @@ static void alarm_time(void)
     cmos_write(RTC_REG_B, cmos_read(RTC_REG_B) | REG_B_AIE);
 
     for (i = 0; i < 2 + wiggle; i++) {
-        if (get_irq(RTC_ISA_IRQ)) {
+        if (get_irq(ISA_IRQ_RTC_DEFAULT)) {
             break;
         }
 
         clock_step(1000000000);
     }
 
-    g_assert(get_irq(RTC_ISA_IRQ));
+    g_assert(get_irq(ISA_IRQ_RTC_DEFAULT));
     g_assert((cmos_read(RTC_REG_C) & REG_C_AF) != 0);
     g_assert(cmos_read(RTC_REG_C) == 0);
 }
@@ -645,7 +645,7 @@ static void uip_stuck(void)
 
 static uint64_t wait_periodic_interrupt(uint64_t real_time)
 {
-    while (!get_irq(RTC_ISA_IRQ)) {
+    while (!get_irq(ISA_IRQ_RTC_DEFAULT)) {
         real_time = clock_step_next();
     }
 
-- 
2.26.2