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Re: [Qemu-trivial] [Qemu-devel] [PATCH 09/10] sm501: Add some more missi


From: BALATON Zoltan
Subject: Re: [Qemu-trivial] [Qemu-devel] [PATCH 09/10] sm501: Add some more missing registers
Date: Fri, 24 Feb 2017 21:48:05 +0100 (CET)
User-agent: Alpine 2.20 (BSF 67 2015-01-07)

On Fri, 24 Feb 2017, Peter Maydell wrote:
On 19 February 2017 at 16:35, BALATON Zoltan <address@hidden> wrote:
Write only to allow clients to initialise these without failing

Signed-off-by: BALATON Zoltan <address@hidden>

What's the point in write-only register values?

U-boot writes this register during setting up the device and without this it would abort QEMU.

What does the real hardware do here?

This register contains bits to set up FIFO parameters and memory priorities which we are not emulating so these can be ignored here but the hardware would change parameters according the value written.

If the registers are writes-ignored, there's no need to store
the data written into the state struct; if the registers are
reads-as-written then implement them that way.

I'm not sure what you get on real hardware but it's documented to be R/W (except reserved bits that are masked which are always 0). Why is it not implemented as read-as-written or what do you mean by that?



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