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Re: [RFC PATCH 02/16] accel/tcg: memory access from CPU will pass access
From: |
Ethan Chen |
Subject: |
Re: [RFC PATCH 02/16] accel/tcg: memory access from CPU will pass access_type to IOMMU |
Date: |
Thu, 13 Jun 2024 13:34:05 +0800 |
User-agent: |
Mutt/2.1.4 (2021-12-11) |
On Wed, Jun 12, 2024 at 04:14:02PM +0800, Jim Shu wrote:
> [EXTERNAL MAIL]
>
> It is the preparation patch for upcoming RISC-V wgChecker device.
>
> Since RISC-V wgChecker could permit access in RO/WO permission, the
> IOMMUMemoryRegion could return different section for read & write
> access. The memory access from CPU should also pass the access_type to
> IOMMU translate function so that IOMMU could return the correct section
> of specified access_type.
>
Hi Jim,
Does this method take into account the situation where the CPU access type is
different from the access type when creating iotlb? I think the section
might be wrong in this situation.
Thanks,
Ethan
>
>
- [RFC PATCH 00/16] Implements RISC-V WorldGuard extension v0.4, Jim Shu, 2024/06/12
- [RFC PATCH 02/16] accel/tcg: memory access from CPU will pass access_type to IOMMU, Jim Shu, 2024/06/12
- Re: [RFC PATCH 02/16] accel/tcg: memory access from CPU will pass access_type to IOMMU,
Ethan Chen <=
- [RFC PATCH 04/16] hw/misc: riscv_worldguard: Add RISC-V WorldGuard global config, Jim Shu, 2024/06/12
- [RFC PATCH 05/16] target/riscv: Add CPU options of WorldGuard CPU extension, Jim Shu, 2024/06/12
- [RFC PATCH 07/16] target/riscv: Add defines for WorldGuard CSRs, Jim Shu, 2024/06/12
- [RFC PATCH 11/16] hw/misc: riscv_worldguard: Add API to enable WG extension of CPU, Jim Shu, 2024/06/12
- [RFC PATCH 13/16] hw/misc: riscv_wgchecker: Implement wgchecker slot registers, Jim Shu, 2024/06/12
- [RFC PATCH 15/16] hw/misc: riscv_wgchecker: Check the slot settings in translate, Jim Shu, 2024/06/12
- [RFC PATCH 16/16] hw/riscv: virt: Add WorldGuard support, Jim Shu, 2024/06/12
- [RFC PATCH 08/16] target/riscv: Allow global WG config to set WG CPU callbacks, Jim Shu, 2024/06/12
- [RFC PATCH 09/16] target/riscv: Implement WorldGuard CSRs, Jim Shu, 2024/06/12