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[PATCH v3 11/26] s390x/tcg: Implement VECTOR BIT PERMUTE
From: |
David Hildenbrand |
Subject: |
[PATCH v3 11/26] s390x/tcg: Implement VECTOR BIT PERMUTE |
Date: |
Mon, 7 Jun 2021 13:03:23 +0200 |
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.c.inc | 8 ++++++++
target/s390x/vec_helper.c | 22 ++++++++++++++++++++++
4 files changed, 33 insertions(+)
diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index 0cfb82ee8a..e99c9643eb 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -126,6 +126,7 @@ DEF_HELPER_FLAGS_1(stck, TCG_CALL_NO_RWG_SE, i64, env)
DEF_HELPER_FLAGS_3(probe_write_access, TCG_CALL_NO_WG, void, env, i64, i64)
/* === Vector Support Instructions === */
+DEF_HELPER_FLAGS_4(gvec_vbperm, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
DEF_HELPER_FLAGS_4(vll, TCG_CALL_NO_WG, void, env, ptr, i64, i64)
DEF_HELPER_FLAGS_4(gvec_vpk16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
DEF_HELPER_FLAGS_4(gvec_vpk32, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index 35a0086a85..1634a6bc5a 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -989,6 +989,8 @@
/* === Vector Support Instructions === */
+/* VECTOR BIT PERMUTE */
+ E(0xe785, VBPERM, VRR_c, VE, 0, 0, 0, 0, vbperm, 0, 0, IF_VEC)
/* VECTOR GATHER ELEMENT */
E(0xe713, VGEF, VRV, V, la2, 0, 0, 0, vge, 0, ES_32, IF_VEC)
E(0xe712, VGEG, VRV, V, la2, 0, 0, 0, vge, 0, ES_64, IF_VEC)
diff --git a/target/s390x/translate_vx.c.inc b/target/s390x/translate_vx.c.inc
index 91e2967c49..96283d4ddb 100644
--- a/target/s390x/translate_vx.c.inc
+++ b/target/s390x/translate_vx.c.inc
@@ -327,6 +327,14 @@ static void gen_addi2_i64(TCGv_i64 dl, TCGv_i64 dh,
TCGv_i64 al, TCGv_i64 ah,
tcg_temp_free_i64(bh);
}
+static DisasJumpType op_vbperm(DisasContext *s, DisasOps *o)
+{
+ gen_gvec_3_ool(get_field(s, v1), get_field(s, v2), get_field(s, v3), 0,
+ gen_helper_gvec_vbperm);
+
+ return DISAS_NEXT;
+}
+
static DisasJumpType op_vge(DisasContext *s, DisasOps *o)
{
const uint8_t es = s->insn->data;
diff --git a/target/s390x/vec_helper.c b/target/s390x/vec_helper.c
index 986e7cc825..599bab06bd 100644
--- a/target/s390x/vec_helper.c
+++ b/target/s390x/vec_helper.c
@@ -19,6 +19,28 @@
#include "exec/cpu_ldst.h"
#include "exec/exec-all.h"
+void HELPER(gvec_vbperm)(void *v1, const void *v2, const void *v3,
+ uint32_t desc)
+{
+ S390Vector tmp = {};
+ uint16_t result = 0;
+ int i;
+
+ for (i = 0; i < 16; i++) {
+ const uint8_t bit_nr = s390_vec_read_element8(v3, i);
+ uint16_t bit;
+
+ if (bit_nr >= 128) {
+ continue;
+ }
+ bit = (s390_vec_read_element8(v2, bit_nr / 8)
+ >> (7 - (bit_nr % 8))) & 1;
+ result |= (bit << (15 - i));
+ }
+ s390_vec_write_element16(&tmp, 3, result);
+ *(S390Vector *)v1 = tmp;
+}
+
void HELPER(vll)(CPUS390XState *env, void *v1, uint64_t addr, uint64_t bytes)
{
if (likely(bytes >= 16)) {
--
2.31.1
- Re: [PATCH v3 01/26] s390x/tcg: Fix FP CONVERT TO (LOGICAL) FIXED NaN handling, (continued)
- [PATCH v3 02/26] s390x/tcg: Fix instruction name for VECTOR FP LOAD (LENGTHENED|ROUNDED), David Hildenbrand, 2021/06/07
- [PATCH v3 03/26] s390x/tcg: Simplify vop64_3() handling, David Hildenbrand, 2021/06/07
- [PATCH v3 04/26] s390x/tcg: Simplify vop64_2() handling, David Hildenbrand, 2021/06/07
- [PATCH v3 05/26] s390x/tcg: Simplify vfc64() handling, David Hildenbrand, 2021/06/07
- [PATCH v3 06/26] s390x/tcg: Simplify vftci64() handling, David Hildenbrand, 2021/06/07
- [PATCH v3 07/26] s390x/tcg: Simplify vfma64() handling, David Hildenbrand, 2021/06/07
- [PATCH v3 08/26] s390x/tcg: Simplify vfll32() handling, David Hildenbrand, 2021/06/07
- [PATCH v3 09/26] s390x/tcg: Simplify vflr64() handling, David Hildenbrand, 2021/06/07
- [PATCH v3 10/26] s390x/tcg: Simplify wfc64() handling, David Hildenbrand, 2021/06/07
- [PATCH v3 11/26] s390x/tcg: Implement VECTOR BIT PERMUTE,
David Hildenbrand <=
- [PATCH v3 12/26] s390x/tcg: Implement VECTOR MULTIPLY SUM LOGICAL, David Hildenbrand, 2021/06/07
- [PATCH v3 13/26] s390x/tcg: Implement 32/128 bit for VECTOR FP (ADD|DIVIDE|MULTIPLY|SUBTRACT), David Hildenbrand, 2021/06/07
- [PATCH v3 14/26] s390x/tcg: Implement 32/128 bit for VECTOR (LOAD FP INTEGER|FP SQUARE ROOT), David Hildenbrand, 2021/06/07
- [PATCH v3 15/26] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE *, David Hildenbrand, 2021/06/07
- [PATCH v3 16/26] s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE (AND SIGNAL) SCALAR, David Hildenbrand, 2021/06/07
- [PATCH v3 17/26] s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENED, David Hildenbrand, 2021/06/07
- [PATCH v3 18/26] s390x/tcg: Implement 128 bit for VECTOR FP LOAD ROUNDED, David Hildenbrand, 2021/06/07
- [PATCH v3 19/26] s390x/tcg: Implement 32/128 bit for VECTOR FP PERFORM SIGN OPERATION, David Hildenbrand, 2021/06/07
- [PATCH v3 21/26] s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT), David Hildenbrand, 2021/06/07
- [PATCH v3 20/26] s390x/tcg: Implement 32/128 bit for VECTOR FP TEST DATA CLASS IMMEDIATE, David Hildenbrand, 2021/06/07