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[qemu-s390x] [PATCH v1 6/7] s390x/tcg: Implement LOAD LENGTHENED short H
From: |
David Hildenbrand |
Subject: |
[qemu-s390x] [PATCH v1 6/7] s390x/tcg: Implement LOAD LENGTHENED short HFP to long HFP |
Date: |
Mon, 25 Feb 2019 12:55:51 +0100 |
Nice trick to load a 32 bit value into vector element 0 (32 bit element
size) from memory, zeroing out element1. The short HFP to long HFP
conversion really only is a shift.
Signed-off-by: David Hildenbrand <address@hidden>
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate.c | 6 ++++++
2 files changed, 8 insertions(+)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index 61582372ab..fb6ee18650 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -598,6 +598,8 @@
F(0xed04, LDEB, RXE, Z, 0, m2_32u, new, f1, ldeb, 0, IF_BFP)
F(0xed05, LXDB, RXE, Z, 0, m2_64, new_P, x1, lxdb, 0, IF_BFP)
F(0xed06, LXEB, RXE, Z, 0, m2_32u, new_P, x1, lxeb, 0, IF_BFP)
+ F(0xb324, LDER, RXE, Z, 0, e2, new, f1, lde, 0, IF_AFP1)
+ F(0xed24, LDE, RXE, Z, 0, m2_32u, new, f1, lde, 0, IF_AFP1)
/* LOAD ROUNDED */
F(0xb344, LEDBR, RRE, Z, 0, f2, new, e1, ledb, 0, IF_BFP)
F(0xb345, LDXBR, RRE, Z, x2h, x2l, new, f1, ldxb, 0, IF_BFP)
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index 322fbbdf81..34799a8704 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -2724,6 +2724,12 @@ static DisasJumpType op_lxeb(DisasContext *s, DisasOps
*o)
return DISAS_NEXT;
}
+static DisasJumpType op_lde(DisasContext *s, DisasOps *o)
+{
+ tcg_gen_shli_i64(o->out, o->in2, 32);
+ return DISAS_NEXT;
+}
+
static DisasJumpType op_llgt(DisasContext *s, DisasOps *o)
{
tcg_gen_andi_i64(o->out, o->in2, 0x7fffffff);
--
2.17.2
- [qemu-s390x] [PATCH v1 4/7] s390x/tcg: Factor out vec_full_reg_offset(), (continued)
[qemu-s390x] [PATCH v1 6/7] s390x/tcg: Implement LOAD LENGTHENED short HFP to long HFP,
David Hildenbrand <=
[qemu-s390x] [PATCH v1 1/7] s390x/tcg: RXE has an optional M3 field, David Hildenbrand, 2019/02/25
[qemu-s390x] [PATCH v1 2/7] s390x/tcg: Simplify disassembler operands initialization, David Hildenbrand, 2019/02/25