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[qemu-s390x] [PATCH v3 for-2.12 06/14] s390x/tcg: ASI/ASGI/ALSI/ALSGI ar
From: |
David Hildenbrand |
Subject: |
[qemu-s390x] [PATCH v3 for-2.12 06/14] s390x/tcg: ASI/ASGI/ALSI/ALSGI are atomic with Interlocked-acccess facility 1 |
Date: |
Fri, 8 Dec 2017 17:01:59 +0100 |
The semantics of ASI/ASGI/ALSI/ALSGI changed. Let's implement them just
like LOAD AND ADD, so they are atomic. Emulate old behavior.
This fixes random crashes when booting a Linux kernel compiled for
z196+ with SMP + MTTCG.
Signed-off-by: David Hildenbrand <address@hidden>
---
target/s390x/insn-data.def | 8 ++++----
target/s390x/translate.c | 21 +++++++++++++++++++++
2 files changed, 25 insertions(+), 4 deletions(-)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index 43ab1963c8..166ee7c80b 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -39,10 +39,10 @@
C(0xb9d8, AHHLR, RRF_a, HW, r2_sr32, r3, new, r1_32h, add, adds32)
/* ADD IMMEDIATE */
C(0xc209, AFI, RIL_a, EI, r1, i2, new, r1_32, add, adds32)
- C(0xeb6a, ASI, SIY, GIE, m1_32s, i2, new, m1_32, add, adds32)
+ D(0xeb6a, ASI, SIY, GIE, la1, i2, new, 0, asi, adds32, MO_TESL)
C(0xecd8, AHIK, RIE_d, DO, r3, i2, new, r1_32, add, adds32)
C(0xc208, AGFI, RIL_a, EI, r1, i2, r1, 0, add, adds64)
- C(0xeb7a, AGSI, SIY, GIE, m1_64, i2, new, m1_64, add, adds64)
+ D(0xeb7a, AGSI, SIY, GIE, la1, i2, new, 0, asi, adds64, MO_TEQ)
C(0xecd9, AGHIK, RIE_d, DO, r3, i2, r1, 0, add, adds64)
/* ADD IMMEDIATE HIGH */
C(0xcc08, AIH, RIL_a, HW, r1_sr32, i2, new, r1_32h, add, adds32)
@@ -70,9 +70,9 @@
C(0xc20b, ALFI, RIL_a, EI, r1, i2_32u, new, r1_32, add, addu32)
C(0xc20a, ALGFI, RIL_a, EI, r1, i2_32u, r1, 0, add, addu64)
/* ADD LOGICAL WITH SIGNED IMMEDIATE */
- C(0xeb6e, ALSI, SIY, GIE, m1_32u, i2, new, m1_32, add, addu32)
+ D(0xeb6e, ALSI, SIY, GIE, la1, i2, new, 0, asi, addu32, MO_TEUL)
C(0xecda, ALHSIK, RIE_d, DO, r3, i2, new, r1_32, add, addu32)
- C(0xeb7e, ALGSI, SIY, GIE, m1_64, i2, new, m1_64, add, addu64)
+ D(0xeb7e, ALGSI, SIY, GIE, la1, i2, new, 0, asi, addu64, MO_TEQ)
C(0xecdb, ALGHSIK, RIE_d, DO, r3, i2, r1, 0, add, addu64)
/* ADD LOGICAL WITH SIGNED IMMEDIATE HIGH */
C(0xcc0a, ALSIH, RIL_a, HW, r1_sr32, i2, new, r1_32h, add, addu32)
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index 08c1ace0d8..7ab8e853ab 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -1364,6 +1364,27 @@ static ExitStatus op_addc(DisasContext *s, DisasOps *o)
return NO_EXIT;
}
+static ExitStatus op_asi(DisasContext *s, DisasOps *o)
+{
+ o->in1 = tcg_temp_new_i64();
+
+ if (!s390_has_feat(S390_FEAT_STFLE_45)) {
+ tcg_gen_qemu_ld_tl(o->in1, o->addr1, get_mem_index(s), s->insn->data);
+ } else {
+ /* Perform the atomic addition in memory. */
+ tcg_gen_atomic_fetch_add_i64(o->in1, o->addr1, o->in2,
get_mem_index(s),
+ s->insn->data);
+ }
+
+ /* Recompute also for atomic case: needed for setting CC. */
+ tcg_gen_add_i64(o->out, o->in1, o->in2);
+
+ if (!s390_has_feat(S390_FEAT_STFLE_45)) {
+ tcg_gen_qemu_st_tl(o->out, o->addr1, get_mem_index(s), s->insn->data);
+ }
+ return NO_EXIT;
+}
+
static ExitStatus op_aeb(DisasContext *s, DisasOps *o)
{
gen_helper_aeb(o->out, cpu_env, o->in1, o->in2);
--
2.14.3
- [qemu-s390x] [PATCH v3 for-2.12 00/14] s390x/tcg: CCW hotplug, facilities, instructions, David Hildenbrand, 2017/12/08
- [qemu-s390x] [PATCH v3 for-2.12 02/14] s390x/tcg: fix and cleanup mcck injection, David Hildenbrand, 2017/12/08
- [qemu-s390x] [PATCH v3 for-2.12 03/14] s390x/tcg: implement SET CLOCK PROGRAMMABLE FIELD, David Hildenbrand, 2017/12/08
- [qemu-s390x] [PATCH v3 for-2.12 01/14] s390x/kvm: factor out build_channel_report_mcic() into cpu.h, David Hildenbrand, 2017/12/08
- [qemu-s390x] [PATCH v3 for-2.12 04/14] s390x/tcg: indicate value of TODPR in STCKE, David Hildenbrand, 2017/12/08
- [qemu-s390x] [PATCH v3 for-2.12 05/14] s390x/tcg: wire up STORE CHANNEL REPORT WORD, David Hildenbrand, 2017/12/08
- [qemu-s390x] [PATCH v3 for-2.12 06/14] s390x/tcg: ASI/ASGI/ALSI/ALSGI are atomic with Interlocked-acccess facility 1,
David Hildenbrand <=
- [qemu-s390x] [PATCH v3 for-2.12 07/14] s390x/tcg: implement Interlocked-Access Facility 2, David Hildenbrand, 2017/12/08
- [qemu-s390x] [PATCH v3 for-2.12 08/14] s390x/tcg: wire up SET ADDRESS LIMIT, David Hildenbrand, 2017/12/08
- [qemu-s390x] [PATCH v3 for-2.12 09/14] s390x/tcg: wire up SET CHANNEL MONITOR, David Hildenbrand, 2017/12/08
- [qemu-s390x] [PATCH v3 for-2.12 13/14] s390x/tcg: we already implement the Set-Program-Parameter facility, David Hildenbrand, 2017/12/08
- [qemu-s390x] [PATCH v3 for-2.12 12/14] s390x/tcg: implement extract-CPU-time facility, David Hildenbrand, 2017/12/08
- [qemu-s390x] [PATCH v3 for-2.12 11/14] s390x/tcg: Implement SIGNAL ADAPTER instruction, David Hildenbrand, 2017/12/08
- [qemu-s390x] [PATCH v3 for-2.12 10/14] s390x/tcg: Implement STORE CHANNEL PATH STATUS, David Hildenbrand, 2017/12/08
- [qemu-s390x] [PATCH v3 for-2.12 14/14] s390x: change the QEMU cpu model to a stripped down z12, David Hildenbrand, 2017/12/08