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[PATCH 0/3] riscv: set vstart_eq_zero on mark_vs_dirty
From: |
Daniel Henrique Barboza |
Subject: |
[PATCH 0/3] riscv: set vstart_eq_zero on mark_vs_dirty |
Date: |
Fri, 16 Feb 2024 08:28:03 -0300 |
Hi,
This is my shot to fix https://gitlab.com/qemu-project/qemu/-/issues/1976.
First patch ensures that every vector instruction that changes the
vector state will call mark_vs_dirty(). Second patch is a trivial
simplification.
Third patch is where the bug is solved: check if 'vstart' is zeroed and
set vstart_eq_zero accordingly.
Patches based on alistair/riscv-to-apply.next. It can also be fetched
here:
https://gitlab.com/danielhb/qemu/-/tree/vstart_bug1976_v1
Daniel Henrique Barboza (3):
trans_rvv.c.inc: write CSRs must call mark_vs_dirty() too
trans_rvv.c.inc: remove redundant mark_vs_dirty() calls
target/riscv/translate.c: set vstart_eq_zero in mark_vs_dirty()
target/riscv/insn_trans/trans_rvv.c.inc | 28 +++++++------------------
target/riscv/translate.c | 22 +++++++++++++++++++
2 files changed, 29 insertions(+), 21 deletions(-)
--
2.43.0
- [PATCH 0/3] riscv: set vstart_eq_zero on mark_vs_dirty,
Daniel Henrique Barboza <=