Re: [PATCH 1/5] target/riscv: Fix effective address for pointer mask

[liweiwei]

On 2023/3/28 11:18, Richard Henderson wrote:

> On
>       3/27/23 19:48, liweiwei wrote:
>       
> >         
> >         On 2023/3/28 10:20, LIU Zhiwei wrote:
> >         
> > >           
> > >           On 2023/3/27 18:00, Weiwei Li wrote:
> > >           
> > > > Since pointer mask works on effective
> > > >             address, and the xl works on the
> > > >             
> > > >             generation of effective address, so xl related calculation
> > > >             should be done
> > > >             
> > > >             before pointer mask.
> > > >             
> > > >           
> > >           
> > >           Incorrect. It has been done.
> > >           
> > >           
> > >           When updating the pm_mask,  we have already considered the
> > >           env->xl.
> > >           
> > >           
> > >           You can see it in riscv_cpu_update_mask
> > >           
> > >           
> > >               if (env->xl == MXL_RV32) {
> > >           
> > >                   env->cur_pmmask = mask & UINT32_MAX;
> > >           
> > >                   env->cur_pmbase = base & UINT32_MAX;
> > >           
> > >               } else {
> > >           
> > >                   env->cur_pmmask = mask;
> > >           
> > >                   env->cur_pmbase = base;
> > >           
> > >               }
> > >           
> > >           
> > >         
> >         Yeah, I missed this part. Then we should ensure cur_pmmask/base
> >         is updated when xl changes.
> >         
> >       
>       
>       Is that even possible?  XL can change on priv level changes (SXL,
>       UXL).
>       
>

Yeah. Not possible, since only UXL is changable currently, and SXL/UXL can only be changed in higher priv level.

So the recompute for xl in write_mstatus() seems redundant.

Maybe there is a way to change current xl in future if misa.mxl is changable.

Regards,

Weiwei Li

>       
>       
>       r~
>       
>